Patents by Inventor Jenn-yu G. Lin

Jenn-yu G. Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6862194
    Abstract: A primary-side flyback power converter supplies a constant voltage and a constant current output. To generate a well-regulated output voltage under varying load conditions, the power converter includes a PWM controller. The PWM controller generates a PWM signal to control a switching transistor in response to a flyback voltage detected from the first primary winding of the power supply transformer. To reduce power consumption, the flyback energy of the first primary winding is used as a DC power source for the PWM controller. The flyback voltage is sampled following a delay time to reduce interference from the inductance leakage of the transformer. To generate a more accurate DC output voltage, a bias current is pulled from the detection input to form a voltage drop across a detection resistor for compensating for the voltage drop of the output rectifying diode.
    Type: Grant
    Filed: June 18, 2003
    Date of Patent: March 1, 2005
    Assignee: System General Corp.
    Inventors: Ta-yung Yang, Chern-Lin Chen, Jenn-yu G. Lin, Song-Yi Lin
  • Patent number: 6853563
    Abstract: The present invention provides a primary-side flyback power converter that supplies a constant voltage output and a constant current output. To generate a well-regulated output voltage under varying load conditions, a PWM controller is included in the power converter in order to generate a PWM signal controlling a switching transistor in response to a flyback voltage sampled from a first primary winding of the power supply transformer. Several improvements are included in this present invention to overcome the disadvantages of prior-art flyback power converters. Firstly, the flyback energy of the first primary winding is used as a DC power source for the PWM controller in order to reduce power consumption. A double sample amplifier samples the flyback voltage just before the transformer current drops to zero. Moreover, an offset current is pulled from a detection input of the double sample amplifier in order to generate a more accurate DC output voltage.
    Type: Grant
    Filed: July 28, 2003
    Date of Patent: February 8, 2005
    Assignee: System General Corp.
    Inventors: Ta-yung Yang, Jenn-yu G. Lin, Chern-Lin Chen
  • Patent number: 6839247
    Abstract: A PFC-PWM controller with a power saving means is disclosed. A built-in current synthesizer generates a bias current in response to feedback voltages sampled from the PWM circuit and the PFC circuit. The bias current modulates the oscillation frequency to further reduce the switching frequencies of the PWM signal and the PFC signal under light-load and zero-load conditions. Thus, power consumption is greatly reduced. The PFC and the PWM switching signals interleave each other, so that power can be transferred more smoothly from the PFC circuit to the PWM circuit. The saturation of the switching components can be avoided by limiting the maximum on-time of the PWM signal. Further, an external resistor is used to start up the PFC-PWM controller and provide an AC template signal for PFC control.
    Type: Grant
    Filed: July 10, 2003
    Date of Patent: January 4, 2005
    Assignee: System General Corp.
    Inventors: Ta-yung Yang, Jenn-yu G. Lin, Chern-Lin Chen
  • Patent number: 6836415
    Abstract: The present invention provides a primary-side regulated PWM controller with improved load regulation. In every PWM cycle, a built-in feedback voltage samples and holds a flyback voltage from the auxiliary winding of the transformer via a sampling switch and generates a feedback voltage accordingly. A bias current sink pulls a bias current that is proportional to the feedback voltage. Via a detection resistor, the bias current will produce a voltage drop to compensate the voltage drop of an output rectifying diode as the output load changes. According to the present invention, the bias current can enable the PWM controller to regulate the output voltage very precisely without using a secondary feedback circuit.
    Type: Grant
    Filed: June 18, 2003
    Date of Patent: December 28, 2004
    Assignee: Systems General Corp.
    Inventors: Ta-yung Yang, Chem-Lin Chen, Jenn-yu G. Lin, Song-Yi Lin
  • Publication number: 20040257833
    Abstract: A primary-side flyback power converter supplies a constant voltage and a constant current output. To generate a well-regulated output voltage under varying load conditions, the power converter includes a PWM controller. The PWM controller generates a PWM signal to control a switching transistor in response to a flyback voltage detected from the first primary winding of the power supply transformer. To reduce power consumption, the flyback energy of the first primary winding is used as a DC power source for the PWM controller. The flyback voltage is sampled following a delay time to reduce interference from the inductance leakage of the transformer. To generate a more accurate DC output voltage, a bias current is pulled from the detection input to form a voltage drop across a detection resistor for compensating for the voltage drop of the output rectifying diode.
    Type: Application
    Filed: June 18, 2003
    Publication date: December 23, 2004
    Inventors: Ta-Yung Yang, Chern-Lin Chen, Jenn-Yu G. Lin, Song-Yi Lin
  • Publication number: 20040257839
    Abstract: The present invention provides a primary-side regulated PWM controller with improved load regulation. In every PWM cycle, a built-in feedback voltage samples and holds a flyback voltage from the auxiliary winding of the transformer via a sampling switch and generates a feedback voltage accordingly. A bias current sink pulls a bias current that is proportional to the feedback voltage. Via a detection resistor, the bias current will produce a voltage drop to compensate the voltage drop of an output rectifying diode as the output load changes. According to the present invention, the bias current can enable the PWM controller to regulate the output voltage very precisely without using a secondary feedback circuit.
    Type: Application
    Filed: June 18, 2003
    Publication date: December 23, 2004
    Inventors: Ta-Yung Yang, Chern-Lin Chen, Jenn-Yu G. Lin, Song-Yi Lin
  • Patent number: 6812769
    Abstract: The switched charge multiplier-divider according to the present invention is constructed of CMOS devices. Capacitor charge theory is employed to implement the circuit of the switched charge multiplier-divider. The switched charge multiplier-divider includes an output capacitor and controls the voltage across the output capacitor, so that it is proportional to the product of the charge current and the charge-time interval. The switched charge multiplier-divider is ideal for use in the power factor correction (PFC) of switching mode power supplies. Potentially, it can also be applied to automatic gain control (AGC) circuits.
    Type: Grant
    Filed: August 12, 2003
    Date of Patent: November 2, 2004
    Assignee: System Chemical Corp.
    Inventors: Ta-yung Yang, Jenn-yu G. Lin, Rui-Hong Lu
  • Patent number: 6781356
    Abstract: A modulator of a PWM controller is provided for saving power and reducing acoustic noise in the light load and no load conditions. The maximum on-time is kept as a constant and a bias current of the oscillator in the PWM controller is moderated to achieve the off-time modulation. The bias current is a function of the supply voltage and the feedback voltage, which is derived from a voltage feedback loop. A threshold voltage defines the level of the light load. A limit voltage defines the low level of the supply voltage. A bias current synthesizer generates the bias current. Reducing the bias current increases the off-time of the switching period. Once the feedback voltage is decreased lower than the threshold voltage, the bias current is reduced linearly and the off-time of the switching period is increased gradually. When the supply voltage is lower than the limit voltage, the bias current increases and determines a maximum off-time of the switching period.
    Type: Grant
    Filed: March 24, 2003
    Date of Patent: August 24, 2004
    Assignee: System General Corp.
    Inventors: Ta-yung Yang, Chem-Lin Chen, Jenn-yu G. Lin
  • Patent number: 6768657
    Abstract: Incorporating the PWM function with the power saving means develops the PWM controller in which the switching frequency is decreased in response to the decrease of the load. Further, the current-driven design minimizes the circuitry and reduces the cost of the PWM controller. Since most of the control signals are operated in current mode, the die size of integrated circuit of the PWM controller is greatly reduced. An off-time modulator is provided for power saving in which the discharge current of the oscillator is modulated. Keeping the maximum on-time of the PWM signal as a constant and increasing the off-time of the PWM signal extends the switching period in light load conditions. The off-time modulation is the function of a feedback current, which is derived from the feedback loop. An array of current operation is designed to generate the feedback voltage for the PWM control and meanwhile produces a modulated discharge current for power saving.
    Type: Grant
    Filed: March 19, 2003
    Date of Patent: July 27, 2004
    Assignee: System General Corp.
    Inventors: Ta-yung Yang, Chern-Lin Chen, Jenn-yu G. Lin
  • Patent number: 6768655
    Abstract: The present invention discloses a ZCS discontinuous mode PFC controller having a power saving modulator. The controller turns on through the feedback resistor and the parasitic diode of the controller, thus eliminating the need for a startup resistor. To achieve ZCS, the inductor current is released to zero, while the switching signal is off, before the next switching cycle starts. In order to decrease the switching frequency for light load conditions, an off-time delay is inserted right before the start of every switching cycle. The off-time delay is modulated to be the function of the feedback voltage and supply voltage. When the supply voltage is lower than the limit voltage, the off-time delay will decrease to inhibit the decrease of a switching frequency therefore prevents a low supply voltage. The switching frequency is decreased in accordance with the decrease of the load. Consequently, the switching losses and power consumption for light load and no load conditions are reduced.
    Type: Grant
    Filed: February 3, 2003
    Date of Patent: July 27, 2004
    Assignee: System General Corp.
    Inventors: Ta-yung Yang, Chern-Lin Chen, Jenn-yu G. Lin
  • Patent number: 6765374
    Abstract: A method an apparatus to dynamically modify the internal compensation of a low drop-out (LDO) linear voltage regulator is presented. The process involves creating an additional equivalent series resistance (ESR) from an internal circuit. The additional ESR of the internal circuit is sufficient to ensure DC output stability. This allows the ESR of the output capacitance to be reduced to zero if desired, for improved transient response. The zero induced by the ESR of the internal circuit is frequency compensated, so that it tracks the position of the output pole as the load varies.
    Type: Grant
    Filed: July 10, 2003
    Date of Patent: July 20, 2004
    Assignee: System General Corp.
    Inventors: Ta-yung Yang, Hsuan-I Pan, Chern-Lin Chen, Jenn-yu G. Lin
  • Publication number: 20040125619
    Abstract: A pulse width modulated soft-switching power converter, having a transformer with a primary winding and a secondary winding, a secondary circuit coupled to the secondary winding, and a pair of main switches and a pair of auxiliary switches coupled to the primary winding. The main switches and auxiliary switches intermittently conduct an input voltage source to the primary winding of the transformer to operate the soft-switching power converter in four operation stages in each switching cycle. The main switches conduct the input voltage source to the transformer in a first operation stage. In a second operation stage, the conduction is cut off. The transformer operates as an inductor with the auxiliary switches switched on under zero-voltage or zero-current switching mode in a third operation stage. In the fourth operation stage, the auxiliary switches are switched off to achieve zero-voltage transition.
    Type: Application
    Filed: December 29, 2002
    Publication date: July 1, 2004
    Inventors: Ta-yung Yang, Jenn-yu G. Lin, Chern-Lin Chen
  • Publication number: 20040125621
    Abstract: A flyback power converter has a transformer, a primary circuit and a secondary circuit. A switching device controlled by a switching signal is disposed in the primary circuit to control the switching of the transformer. The secondary circuit further has an output capacitor connected at the output of the power converter and a synchronous rectifier connected in between the transformer and the output capacitor. A controller is connected to the synchronous rectifier to control on/off status of thereof in response to a secondary current and a synchronous detection signal for both discontinuous and continuous operation mode, wherein the secondary current is generated in the secondary circuit and the synchronous detection signal is produced by detecting the switching signal through the secondary winding of the transformer. In one embodiment, the equivalent series resistance (ESR) of the output capacitor is used as a sensor to detect the secondary current.
    Type: Application
    Filed: December 30, 2002
    Publication date: July 1, 2004
    Inventors: Ta-yung Yang, Jenn-yu G. Lin, Chern-Lin Chen
  • Patent number: 6744649
    Abstract: A pulse width modulated soft-switching power converter, having a pair of main switches and a pair of auxiliary switches coupled to the primary winding of the transformer. The main switches and auxiliary switches intermittently conduct an input voltage source to the primary winding to operate the soft-switching power converter in four operation stages in each switching cycle. The main switches conduct the input voltage source to the transformer in a first operation stage. In a second operation stage, the conduction is cut off. The transformer operates as an inductor with the auxiliary switches switched on under zero-voltage or zero-current switching mode in a third operation stage. In the fourth operation stage, the auxiliary switches are switched off, whereby the flyback energy achieves the zero-voltage transition. A zero-voltage-detection is employed to optimize the zero-voltage switching. The switching frequency is decreased in response to the decrease of the load.
    Type: Grant
    Filed: December 27, 2002
    Date of Patent: June 1, 2004
    Assignee: System General Corp.
    Inventors: Ta-yung Yang, Jenn-yu G. Lin, Chern-Lin Chen
  • Patent number: 6744611
    Abstract: FI over-voltage crowbar provides lightning surge and ESD protection. The crowbar has a clamping transistor, which is driven by a mirror-amplifier. When an input surge voltage is higher than the voltage of a Zener diode, the mirror-amplifier will be switched on and generate an amplified voltage. The amplified voltage works together with a speed-up capacitor easily to switch on the clamping transistor. The mirror-amplifier has an n-transistor and two p-transistors, which provide sufficient headroom for the turn-on of a clamping transistor. The over-voltage crowbar of this invention rapidly drives the clamping transistor to low impedance, thereby achieving a higher sustenance rating for lightning surge and ESD in the integrated circuit.
    Type: Grant
    Filed: October 28, 2002
    Date of Patent: June 1, 2004
    Assignee: System General Corporation
    Inventors: Ta-yung Yang, Jenn-yu G. Lin
  • Publication number: 20040080880
    Abstract: Fl over-voltage crowbar provides lightning surge and ESD protection. The crowbar has a clamping transistor, which is driven by a mirror-amplifier. When an input surge voltage is higher than the voltage of a Zener diode, the mirror-amplifier will be switched on and generate an amplified voltage. The amplified voltage works together with a speed-up capacitor easily to switch on the clamping transistor. The mirror-amplifier has an n-transistor and two p-transistors, which provide sufficient headroom for the turn-on of a clamping transistor. The over-voltage crowbar of this invention rapidly drives the clamping transistor to low impedance, thereby achieving a higher sustenance rating for lightning surge and ESD in the integrated circuit.
    Type: Application
    Filed: October 28, 2002
    Publication date: April 29, 2004
    Inventors: Ta-yung Yang, Jenn-yu G. Lin
  • Patent number: 6721192
    Abstract: A PWM controller according to the present invention provides a technique to control the output voltage and output current of the power supply without the feedback control circuit in the secondary side of the transformer. In order to achieve better regulation, an adaptive load and a feedback synthesizer are equipped into the PWM controller, which associated with the auxiliary winding of the transformer regulate the output voltage of the power supply as a constant. Furthermore, a programmable power limiter in the PWM controller controls the power that is delivered from the primary side to the output of the power supply. The threshold of the power limit is varied in accordance with the change of output voltage. Because the output power is the function of the output voltage of the power supply, a constant current output is realized when the output current of the power supply is greater than a maximum value.
    Type: Grant
    Filed: March 24, 2003
    Date of Patent: April 13, 2004
    Assignee: System General Corp.
    Inventors: Ta-yung Yang, Chern-Lin Chen, Jenn-yu G. Lin, Yi-Hsin Leu
  • Patent number: 6674656
    Abstract: A PWM controller having a saw-limiter for power limit without input voltage sensing. The saw-limiter has an adder, a reference voltage, a scaler and a saw-tooth signal that is generated by the PWM oscillator. The saw-limiter produces a saw-limited voltage. The PWM controller will turn off its output when the current-sense input signal of the PWM controller is higher than the saw-limited voltage. The saw-limited voltage is equal to the reference voltage while a PWM switching period starts. After that, the amplitude of the saw-limited voltage will gradually increase until it reaches its maximum voltage. Subsequently, a saw-tooth like waveform is generated for the saw-limited voltage. The slope of the current-sense input signal is proportional to the line voltage. Therefore, a higher line voltage creates a sharp slope for the current-sense input signal, which will be restricted by a lower saw-limited voltage and produces a shorter PWM signal.
    Type: Grant
    Filed: October 28, 2002
    Date of Patent: January 6, 2004
    Assignee: System General Corporation
    Inventors: Ta-yung Yang, Jenn-yu G. Lin
  • Patent number: 6661679
    Abstract: An adaptive off-time modulator of a PWM controller is provided for power saving in the light-load and no-load conditions. The maximum on-time is kept as a constant and a bias current of the oscillator in the PWM controller is moderated to achieve the off-time modulation. Reduction of the bias current increases the off-time of the switching period. The bias current is a function of the supply voltage and the feedback voltage, which is derived from a voltage feedback loop. A threshold voltage defines the level of the light load. A limit voltage defines the low level of the supply voltage. A bias current synthesizer generates the bias current. Once the feedback voltage is decreased lower than the threshold voltage, the bias current is reduced linearly and the off-time of the switching period is increased gradually. When the supply voltage is lower than the limit voltage, the bias current increases and determines a maximum off-time of the switching period.
    Type: Grant
    Filed: October 28, 2002
    Date of Patent: December 9, 2003
    Assignee: System General Corporation
    Inventors: Ta-yung Yang, Jenn-yu G. Lin
  • Patent number: 6611439
    Abstract: A PWM controller has a line voltage input that allows using an input resistor for both start-up and power-limit compensation, thus saving the power consumption, easing the PCB layout, and shrinking the power supply size. In the integrated circuit, a mirrored-resistor used for the power limit compensation is composed of a mirror MOSFET, which is associated with an op amplifier, a constant voltage and a constant current to provide a precise resistance. Thus, by properly selecting the value of the input resistor, an identical output power limit for low line and high line voltage input can be achieved.
    Type: Grant
    Filed: October 28, 2002
    Date of Patent: August 26, 2003
    Assignee: System General Corporation
    Inventors: Ta-yung Yang, Jenn-yu G. Lin, Shu-chung Yi