Patents by Inventor Jennifer O'Loughlin

Jennifer O'Loughlin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100317178
    Abstract: Embodiments related to the cleaning of interface surfaces in a semiconductor wafer fabrication process via remote plasma processing are disclosed herein. For example, in one disclosed embodiment, a semiconductor processing apparatus comprises a processing chamber, a load lock coupled to the processing chamber via a transfer port, a wafer pedestal disposed in the load lock and configured to support a wafer in the load lock, a remote plasma source configured to provide a remote plasma to the load lock, and an ion filter disposed between the remote plasma source and the wafer pedestal.
    Type: Application
    Filed: June 12, 2009
    Publication date: December 16, 2010
    Applicant: Novellus Systems, Inc.
    Inventors: George Andrew Antonelli, Jennifer O' Loughlin, Tony Xavier, Mandyam Sriram, Bart Van Schravendijk, Vishwanathan Rangarajan, Seshasayee Varadarajan, Bryan L. Buckalew
  • Publication number: 20100308463
    Abstract: Adhesive layers residing at an interface between metal lines and dielectric diffusion barrier (or etch stop) layers are used to improve electromigration performance of interconnects. Adhesion layers are formed by depositing a precursor layer of metal-containing material (e.g., material containing Al, Ti, Ca, Mg, etc.) over an exposed copper line, and converting the precursor layer to a passivated layer (e.g., nitridized layer). For example, a substrate containing exposed copper line having exposed Cu—O bonds is contacted with trimethylaluminum to form a precursor layer having Al—O bonds and Al—C bonds on copper surface. The precursor layer is then treated to remove residual organic substituents and to form Al—N, Al—H bonds or both. The treatment can include direct plasma treatment, remote plasma treatment, UV-treatment, and thermal treatment with a gas such as NH3, H2, N2, and mixtures thereof. A dielectric diffusion barrier layer is then deposited.
    Type: Application
    Filed: January 15, 2010
    Publication date: December 9, 2010
    Inventors: Jengyi Yu, Hui-Jung Wu, Girish Dixit, Bart van Schravendijk, Pramod Subramonium, Gengwei Jiang, George Andrew Antonelli, Jennifer O'loughlin
  • Patent number: 7648899
    Abstract: Protective caps residing at an interface between metal lines and dielectric diffusion barrier (or etch stop) layers are used to improve electromigration performance of interconnects. Protective caps are formed by depositing a source layer of dopant-generating material (e.g., material generating B, Al, Ti, etc.) over an exposed copper line, converting the upper portion of the source layer to a passivated layer (e.g., nitride or oxide) while allowing an unmodified portion of a dopant-generating source layer to remain in contact with copper, and, subsequently, allowing the dopant from the unmodified portion of source layer to controllably diffuse into and/or react with copper, thereby forming a thin protective cap within copper line. The cap may contain a solid solution or an alloy of copper with the dopant.
    Type: Grant
    Filed: February 28, 2008
    Date of Patent: January 19, 2010
    Assignee: Novellus Systems, Inc.
    Inventors: Ananda Banerji, George Andrew Antonelli, Jennifer O'loughlin, Mandyam Sriram, Bart Van Schravendijk, Seshasayee Varadarajan
  • Patent number: 7223705
    Abstract: A method of modifying the porosity of a thickness of a layer of porous dielectric material having a surface and formed on a semiconductor substrate is provided by exposing the porous dielectric material to a sufficient temperature in the presence of a first gas to drive moisture particles out of the pores. Modifying also includes, exposing the porous dielectric material to a radio frequency stimulus of sufficient power in the presence of a second gas to densify a thickness of the porous dielectric material to reduce or prohibit subsequent absorption of moisture or reactant gas particles by the thickness or porous dielectric material.
    Type: Grant
    Filed: May 6, 2003
    Date of Patent: May 29, 2007
    Assignee: Intel Corporation
    Inventors: Mandyam A. Sriram, Jennifer O'Loughlin
  • Publication number: 20040224536
    Abstract: A method of modifying the porosity of a thickness of a layer of porous dielectric material having a surface and formed on a semiconductor substrate is provided by exposing the porous dielectric material to a sufficient temperature in the presence of a first gas to drive moisture particles out of the pores. Modifying also includes, exposing the porous dielectric material to a radio frequency stimulus of sufficient power in the presence of a second gas to densify a thickness of the porous dielectric material to reduce or prohibit subsequent absorption of moisture or reactant gas particles by the thickness or porous dielectric material.
    Type: Application
    Filed: May 6, 2003
    Publication date: November 11, 2004
    Inventors: Mandyam A. Sriram, Jennifer O'Loughlin
  • Publication number: 20040101667
    Abstract: The present invention discloses a method including: determining whether a surface of a dielectric layer is reactive; activating the surface if the surface is not reactive; performing a cycle on the surface, the cycle including: reacting the surface with a metal; and activating the metal.
    Type: Application
    Filed: November 6, 2003
    Publication date: May 27, 2004
    Inventors: Jennifer O'Loughlin, Andrew W. Ott, Bruce J. Tufts
  • Patent number: 6713873
    Abstract: The present invention discloses a method including: determining whether a surface of a dielectric layer is reactive; activating the surface if the surface is not reactive; performing a cycle on the surface, the cycle including: reacting the surface with a metal; and activating the metal. The present invention also discloses a structure including: a substrate; a first interlayer dielectric located over the substrate; a first adhesion promoter layer located over the first interlayer dielectric; an etch stop layer located over the first adhesion promoter layer; a second adhesion promoter layer located over the etch stop layer; and a second interlayer dielectric located over the second adhesion promoter layer.
    Type: Grant
    Filed: November 27, 2002
    Date of Patent: March 30, 2004
    Assignee: Intel Corporation
    Inventors: Jennifer O'Loughlin, Andrew W. Ott, Bruce J. Tufts