Patents by Inventor Jeong Bok Kwak

Jeong Bok Kwak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7562447
    Abstract: Disclosed is a method of manufacturing a printed circuit board for fine circuit formation, in which an unnecessary metal layer formed on the upper portion of a circuit pattern is removed through mechanical polishing and then chemical etching. In place of expensive chemical mechanical polishing, in the method of the invention, mechanical polishing and chemical etching are continuously applied to thus sequentially remove and planarize the unnecessary metal layer. Thereby, through an inexpensive, simple, and continuous process, the planarization procedure can be precisely performed, thus making it possible to apply the method to large areas and economically realize a fine circuit pattern.
    Type: Grant
    Filed: March 27, 2007
    Date of Patent: July 21, 2009
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Choon Keun Lee, Seung Hyun Ra, Sang Moon Lee, Jung Woo Lee, Jeong Bok Kwak, Jae Choon Cho, Chi Seong Kim
  • Publication number: 20080086877
    Abstract: A manufacturing method for imprinting stamper is disclosed. The manufacturing method includes forming a plurality of concave patterns on an insulation layer, forming a stamper by filling copper in the concave patterns, separating the stamper from the insulation layer, providing roughness on the surface of the stamper, can separate the stamper from the insulation layer, can prevent the deformation of the stamper and can manufacture pluralities of stampers repeatedly.
    Type: Application
    Filed: October 10, 2007
    Publication date: April 17, 2008
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jeong-Bok Kwak, Seung-Hyun Ra, Choon-Keun Lee, Jae-Choon Cho, Sang-Moon Lee
  • Publication number: 20080054518
    Abstract: A method of manufacturing a stamper is disclosed. By using a method that includes: manufacturing a small stamper, in which a first relievo is formed; repeatedly imprinting the small stamper on a large master mold to form a first intaglio corresponding to the first relievo; and molding such that a second relievo is formed, which is in correspondence with the first intaglio, a broad stamper having identical repeated patterns may be manufactured.
    Type: Application
    Filed: August 29, 2007
    Publication date: March 6, 2008
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seung-Hyun RA, Myeong-Ho HONG, Hyuk-Soo LEE, Jung-Woo LEE, Jeong-Bok KWAK
  • Publication number: 20080012168
    Abstract: A method for manufacturing printed circuit board is disclosed.
    Type: Application
    Filed: July 11, 2007
    Publication date: January 17, 2008
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Senug-Hyun Ra, Myeong-Ho Hong, Hyuk-Soo Lee, Choon-Keun Lee, Sang-Moon Lee, Jae-Choon Cho, Jung-Woo Lee, Jeong-Bok Kwak
  • Publication number: 20080008824
    Abstract: The present invention relates to a method for manufacturing a printed circuit board, more particularly to a method for manufacturing a printed circuit board, in which an oxidant capable of polymerizing conductive polymers is selectively marked on a board using imprinting, and the monomer of a conductive polymer is filled in the selected pattern and polymerized, to provide a conductive polymer wiring pattern. With the method for manufacturing a printed circuit board according to certain aspects of the invention as set forth above, a printed circuit board can be given finer wiring widths to allow a highly integrated, highly efficient printed circuit board. Thus, a printed circuit board (PCB) or a flexible printed circuit boards (FPCB) can be manufactured that is applicable to industrial, clerical, and domestic electric electronic products, by a new technique of forming conductive polymer wiring using imprinting.
    Type: Application
    Filed: June 28, 2007
    Publication date: January 10, 2008
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jae-Choon Cho, Myeong-Ho Hong, Senug-Hyun Ra, Hyuk-Soo Lee, Jeong-Bok Kwak, Jung-Woo Lee, Choon-Keun Lee, Sang-Moon Lee
  • Publication number: 20070264755
    Abstract: Disclosed is a method of manufacturing a printed circuit board for fine circuit formation, in which an unnecessary metal layer formed on the upper portion of a circuit pattern is removed through mechanical polishing and then chemical etching. In place of expensive chemical mechanical polishing, in the method of the invention, mechanical polishing and chemical etching are continuously applied to thus sequentially remove and planarize the unnecessary metal layer. Thereby, through an inexpensive, simple, and continuous process, the planarization procedure can be precisely performed, thus making it possible to apply the method to large areas and economically realize a fine circuit pattern.
    Type: Application
    Filed: March 27, 2007
    Publication date: November 15, 2007
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Choon Keun Lee, Seung Hyun Ra, Sang Moon Lee, Jung Woo Lee, Jeong Bok Kwak, Jae Choon Cho, Chi Seong Kim