Abstract: The present invention is related to a heating device for heating an object material using a laser beam, the heating device comprising a stage on which the object material is placed; a laser module for generating and outputting a laser beam; an optical module for controlling a path of the laser beam; a polygon mirror rotating around an axis of rotation and having a plurality of reflecting surfaces which reflect the laser beam; and a beam guide module for controlling an incidence range within which the laser beam reflected by the polygon mirror is incident on the object material, and an indirect heating method using a laser beam in a heating device.

Abstract: The present invention is related to a heating device for heating an object material using a laser beam, the heating device comprising a stage on which the object material is placed; a laser module for generating and outputting a laser beam; an optical module for controlling a path of the laser beam; a polygon mirror rotating around an axis of rotation and having a plurality of reflecting surfaces which reflect the laser beam; and a beam guide module for controlling an incidence range within which the laser beam reflected by the polygon mirror is incident on the object material, and an indirect heating method using a laser beam in a heating device.

Abstract: An indirect heating method using a laser according to an aspect of the present disclosure includes: a first process of adjacently placing a first material structure containing metal and a second material structure containing inorganic material; and a second process of directly heating the first material structure to indirectly heat the second material structure adjacent to the first material structure by radiating a laser to the first material structure.

Abstract: The present invention is related to a heating device for heating an object material using a laser beam, the heating device comprising a stage on which the object material is placed; a laser module for generating and outputting a laser beam; an optical module for controlling a path of the laser beam; a polygon mirror rotating around an axis of rotation and having a plurality of reflecting surfaces which reflect the laser beam; and a beam guide module for controlling an incidence range within which the laser beam reflected by the polygon mirror is incident on the object material, and an indirect heating method using a laser beam in a heating device.

Abstract: A method of manufacturing a semiconductor device comprises providing a substrate; forming an insulating layer on the substrate; etching the insulating layer to form an opening that exposes the substrate; forming a contact plug in the opening and on the insulating layer; forming a metal layer on the contact plug; and irradiating the metal layer with a laser.

Abstract: An indirect heating method using a laser according to an aspect of the present disclosure includes: a first process of adjacently placing a first material structure containing metal and a second material structure containing inorganic material; and a second process of directly heating the first material structure to indirectly heat the second material structure adjacent to the first material structure by radiating a laser to the first material structure.

Abstract: An indirect heating method using a laser according to an aspect of the present disclosure includes: a first process of adjacently placing a first material structure containing a metal and a second material structure containing a mineral; and a second process of directly heating the first material structure to indirectly heat the second material structure adjacent to the first material structure by emitting a laser to the first material structure.

Abstract: The present invention is related to a heating device for heating an object material using a laser beam, the heating device comprising a stage on which the object material is placed; a laser module for generating and outputting a laser beam; an optical module for controlling a path of the laser beam; a polygon mirror rotating around an axis of rotation and having a plurality of reflecting surfaces which reflect the laser beam; and a beam guide module for controlling an incidence range within which the laser beam reflected by the polygon mirror is incident on the object material, and an indirect heating method using a laser beam in a heating device.

Abstract: An indirect heating method using a laser according to an aspect of the present disclosure includes: a first process of adjacently placing a first material structure containing a metal and a second material structure containing a mineral; and a second process of directly heating the first material structure to indirectly heat the second material structure adjacent to the first material structure by emitting a laser to the first material structure.

Abstract: A recessed channel array transistor may include a substrate, a gate oxide layer, a gate electrode and source/drain regions. The substrate may have an active region and an isolation region. A recess may be formed in the active region. The gate oxide layer may be formed on the recess and the substrate. The gate oxide layer may include a first portion on an intersection between a side end of the recess and a sidewall of the active region and a second portion on a side surface of the recess. The first portion may include a thickness greater than about 70% of a thickness of the second portion. The gate electrode may be formed on the gate oxide layer. The source/drain regions may be formed in the substrate. Thus, the recessed channel array transistor may have a decreased leakage current and an increased on-current.

Abstract: In methods of manufacturing a recessed channel array transistor, a recess may be formed in an active region of a substrate. A plasma oxidation process may be performed on the substrate to form a preliminary gate oxide layer on an inner surface of the recess and an upper surface of the substrate. Moistures may be absorbed in a surface of the preliminary gate oxide layer to form a gate oxide layer. A gate electrode may be formed on the gate oxide layer to fill up the recess. Source/drain regions may be formed in an upper surface of the substrate at both sides of the gate electrode. Thus, the oxide layer may have a uniform thickness distribution and a dense structure.

Abstract: Methods of forming integrated circuit devices include forming an electrically conductive layer containing silicon on a substrate and forming a mask pattern on the electrically conductive layer. The electrically conductive layer is selectively etched to define a first sidewall thereon, using the mask pattern as an etching mask. The first sidewall of the electrically conductive layer may be exposed to a nitrogen plasma to thereby form a first silicon nitride layer on the first sidewall. The electrically conductive layer is then selectively etched again to expose a second sidewall thereon that is free of the first silicon nitride layer. The mask pattern may be used again as an etching mask during this second step of selectively etching the electrically conductive layer.

Abstract: Methods of forming integrated circuit devices include forming an electrically conductive layer containing silicon on a substrate and forming a mask pattern on the electrically conductive layer. The electrically conductive layer is selectively etched to define a first sidewall thereon, using the mask pattern as an etching mask. The first sidewall of the electrically conductive layer may be exposed to a nitrogen plasma to thereby form a first silicon nitride layer on the first sidewall. The electrically conductive layer is then selectively etched again to expose a second sidewall thereon that is free of the first silicon nitride layer. The mask pattern may be used again as an etching mask during this second step of selectively etching the electrically conductive layer.

Abstract: Methods of forming integrated circuit devices include forming an electrically conductive layer containing silicon on a substrate and forming a mask pattern on the electrically conductive layer. The electrically conductive layer is selectively etched to define a first sidewall thereon, using the mask pattern as an etching mask. The first sidewall of the electrically conductive layer may be exposed to a nitrogen plasma to thereby form a first silicon nitride layer on the first sidewall. The electrically conductive layer is then selectively etched again to expose a second sidewall thereon that is free of the first silicon nitride layer. The mask pattern may be used again as an etching mask during this second step of selectively etching the electrically conductive layer.

Abstract: In methods of manufacturing a recessed channel array transistor, a recess may be formed in an active region of a substrate. A plasma oxidation process may be performed on the substrate to form a preliminary gate oxide layer on an inner surface of the recess and an upper surface of the substrate. Moistures may be absorbed in a surface of the preliminary gate oxide layer to form a gate oxide layer. A gate electrode may be formed on the gate oxide layer to fill up the recess. Source/drain regions may be formed in an upper surface of the substrate at both sides of the gate electrode. Thus, the oxide layer may have a uniform thickness distribution and a dense structure.

Abstract: A fin field effect transistor includes a fin protruding from a semiconductor substrate, a gate insulating layer formed so as to cover upper and lateral surfaces of the fin, and a gate electrode formed across the fin so as to cover the gate insulating layer. An upper edge of the fin is rounded so that an electric field concentratedly applied to the upper edge of the fin through the gate electrode is dispersed. A thickness of a portion of the gate insulating layer formed on an upper surface of the fin is greater than a thickness of a portion of the gate insulating layer formed on a lateral surface of the fin, in order to reduce an electric field applied through the gate electrode.

Abstract: A fin field effect transistor includes a fin protruding from a semiconductor substrate, a gate insulating layer formed so as to cover upper and lateral surfaces of the fin, and a gate electrode formed across the fin so as to cover the gate insulating layer. An upper edge of the fin is rounded so that an electric field concentratedly applied to the upper edge of the fin through the gate electrode is dispersed. A thickness of a portion of the gate insulating layer formed on an upper surface of the fin is greater than a thickness of a portion of the gate insulating layer formed on a lateral surface of the fin, in order to reduce an electric field applied through the gate electrode.

Abstract: A recessed channel array transistor may include a substrate, a gate oxide layer, a gate electrode and source/drain regions. The substrate may have an active region and an isolation region. A recess may be formed in the active region. The gate oxide layer may be formed on the recess and the substrate. The gate oxide layer may include a first portion on an intersection between a side end of the recess and a sidewall of the active region and a second portion on a side surface of the recess. The first portion may include a thickness greater than about 70% of a thickness of the second portion. The gate electrode may be formed on the gate oxide layer. The source/drain regions may be formed in the substrate. Thus, the recessed channel array transistor may have a decreased leakage current and an increased on-current.

Abstract: Methods of forming integrated circuit devices include forming an electrically conductive layer containing silicon on a substrate and forming a mask pattern on the electrically conductive layer. The electrically conductive layer is selectively etched to define a first sidewall thereon, using the mask pattern as an etching mask. The first sidewall of the electrically conductive layer may be exposed to a nitrogen plasma to thereby form a first silicon nitride layer on the first sidewall. The electrically conductive layer is then selectively etched again to expose a second sidewall thereon that is free of the first silicon nitride layer. The mask pattern may be used again as an etching mask during this second step of selectively etching the electrically conductive layer.

Abstract: A semiconductor device may include an isolation layer, gate electrodes, an insulating interlayer, an impurity region, a capping layer and a plug. The isolation layer may be formed in the substrate. The gate electrodes may be formed on the substrate. The insulating interlayer may be formed on the gate electrodes. The insulating interlayer may have a contact hole between the gate electrodes. The impurity region may be in the substrate exposed through the contact hole. The capping layer may be on the impurity region. The plug may be on the capping layer. Thus, the impurities may not be lost from the impurity region.