Abstract: A display device includes a display panel including a main area, a bending area at which the display panel is bendable, and a sub area, in order. The main area includes a display area and a non-display area which is adjacent to the display area. The bending area connects the sub area to the main area at the non-display area thereof, and is recessed from outer side surfaces of the main area and the sub area, to define a recess portion of the display panel at the bending area.

Abstract: A display device and a method of manufacturing the same are provided. The display device comprises a substrate comprising a display area in which emission areas are arranged, a main non-display area around the display area, a hole area surrounded by the display area, and an additional non-display area between the hole area and the display area; a circuit layer; a light emitting element layer; a sealing layer; a through portion in the hole area and penetrating at least the substrate; and sealing auxiliary structures in the additional non-display area and sequentially surrounding the hole area. Each of the sealing auxiliary structures comprises a first undercut portion in which a first cover layer protrudes from a first main layer; and a second undercut portion in which a second cover layer protrudes from a second main layer.

Abstract: A photocurable coating composition includes 50 to 150 parts by weight of a urethane acrylate oligomer having a number average molecular weight of 1300 to 1700 g/mol and 9 functional groups, 50 to 150 parts by weight of an acrylate monomer, 10 to 15 parts by weight of a photoinitiator, and 1 to 3 parts by weight of a surfactant.

Abstract: A photocurable coating composition includes 50 to 150 parts by weight of a urethane acrylate oligomer having a number average molecular weight of 1300 to 1700 g/mol and 9 functional groups, 50 to 150 parts by weight of an acrylate monomer, 10 to 15 parts by weight of a photoinitiator, and 1 to 3 parts by weight of a surfactant.

Abstract: A variable-period permanent-magnet undulator which is applicable not only to a planar undulator but also to a helical undulator, in which permanent-magnets and ferromagnetic substances are alternately arranged, and the ferromagnetic substance interposed between the permanent-magnets is saturated to thus enable the magnets to be effectively spaced apart from each other by the repulsive force between the permanent-magnets, thereby adjusting the period of the magnetic field in an easy and precise manner.

Abstract: A variable-period permanent-magnet undulator which is applicable not only to a planar undulator but also to a helical undulator, in which permanent-magnets and ferromagnetic substances are alternately arranged, and the ferromagnetic substance interposed between the permanent-magnets is saturated to thus enable the magnets to be effectively spaced apart from each other by the repulsive force between the permanent-magnets, thereby adjusting the period of the magnetic field in an easy and precise manner.

Abstract: A printed circuit board including: a first insulation layer; a second insulation layer stacked over the first insulation layer; a circuit pattern and a via land buried in the second insulation layer; and a via penetrating the first insulation layer and integrated with the via land, the via made of a conductive material.

Abstract: A printed circuit board and a method of manufacturing the printed circuit board are disclosed. The printed circuit board can include a first insulation layer, a second insulation layer stacked over the first insulation layer, a circuit pattern and a via land buried in the second insulation layer, and a via made of a conductive material penetrating the first insulation layer and integrated with the via land. The circuit pattern and via land can be buried in the insulation material, and the circuit pattern, via land, and via can be formed simultaneously as an integrated structure. Thus, the electrical reliability between the wiring pattern and the via can be increased, the heat-releasing effect of the via can be improved, and the procedure for forming the circuit patterns, via lands, and vias can be simplified, allowing greater productivity in manufacturing the substrate.

Abstract: A method of plating a substrate and a method of manufacturing a circuit board using the method of plating a substrate. The method of manufacturing a circuit board may include: providing a panel substrate, the panel substrate divided into a circuit board area and a dummy area; calculating a ratio of an area of a circuit pattern to be formed by plating in the circuit board area; determining a ratio of an area being plated in the dummy area by considering the ratio of the area being plated in the circuit board area; setting a plating part in the circuit board area and the dummy area; and forming the circuit pattern by electroplating the panel substrate. Accordingly, deviation in thickness of plating between circuit patterns can be improved.

Abstract: Disclosed herein is a method for forming a plating layer of a printed circuit board. A deviation in plating thickness of a copper plating layer filled in a circuit pattern part and a through-hole part in a SIP product group having a narrow through-hole pitch and a large through-hole volume may be reduced. To this end, there is provided a method for forming a plating layer of a printed circuit board, the method including: processing a though-hole in a copper clad lamination (CCL); forming a seed plating layer in the through hole; applying a resist on the CCL and the seed plating layer and exposing and developing the resist; forming a primary plating layer on the seed plating layer; forming a copper plating layer on the primary plating layer; and removing the resist remaining on the primary plating layer and the seed plating layer to thereby form patterns.

Abstract: A method for forming a plating layer and a method for forming a printed circuit board using the same are disclosed. The method for forming a plating layer in accordance with an embodiment of the present invention can include: providing a metal foil coated with a primer resin layer on one surface thereof, roughness formed the one surface of the primer resin layer; transcribing the primer resin layer, on which roughness is formed, to an insulation layer; reducing the primer resin layer so that an anticorrosive material of the metal foil that remains on the primer resin layer is removed; and plating the primer resin layer, on which roughness is formed.

Abstract: Provided is a device for generating a chaotic signal comprising a PN signal generator that is composed of a digital logic circuit and generates a digital pseudo random signal with a predetermined frequency; a voltage control that generates a clock signal with a predetermined frequency; a mixer that mixes the pseudo random signal and the clock signal so as to generate a chaotic signal to output; and a band-pass filter that filters the chaotic signal, output from the mixer, into a chaotic signal of a desired band and then outputs the filtered signal.

Abstract: A printed circuit board and a method of manufacturing the printed circuit board are disclosed. The printed circuit board can include a first insulation layer, a second insulation layer stacked over the first insulation layer, a circuit pattern and a via land buried in the second insulation layer, and a via made of a conductive material penetrating the first insulation layer and integrated with the via land. The circuit pattern and via land can be buried in the insulation material, and the circuit pattern, via land, and via can be formed simultaneously as an integrated structure. Thus, the electrical reliability between the wiring pattern and the via can be increased, the heat-releasing effect of the via can be improved, and the procedure for forming the circuit patterns, via lands, and vias can be simplified, allowing greater productivity in manufacturing the substrate.

Abstract: A current mode logic (CML)-CMOS converter comprises an input stage that is turned on/off by receiving an input voltage from the outside; a voltage control unit that outputs a constant voltage; a first switching unit that is connected to the input stage and the voltage control unit and is turned on/off by the constant voltage applied from the voltage control unit; and a second switching unit that is connected to the input stage and is turned on/off by a signal applied from the input stage.

Abstract: A current mode logic (CML)-CMOS converter comprises an input stage that is turned on/off by receiving an input voltage from the outside; a voltage control unit that outputs a constant voltage; a first switching unit that is connected to the input stage and the voltage control unit and is turned on/off by the constant voltage applied from the voltage control unit; and a second switching unit that is connected to the input stage and is turned on/off by a signal applied from the input stage.