Patents by Inventor Jeong Hoon Ko

Jeong Hoon Ko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240114709
    Abstract: The quantum dot comprises a ligand which is a copolymer comprising a first repeating unit comprising at least one or more hole transporting functional groups and a second repeating unit comprising at least one or more photocrosslinking functional groups.
    Type: Application
    Filed: September 22, 2020
    Publication date: April 4, 2024
    Applicants: LG DISPLAY CO., LTD., KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION
    Inventors: Joona BANG, Ki Seok CHANG, Jeong Min MOON, Soon Shin JUNG, Dong Hoon CHOI, Hyung Jong KIM, Jae Wan KO
  • Publication number: 20240085777
    Abstract: Provided is a process proximity effect correction method capable of efficiently improving the dispersion of patterns. There is a process proximity effect correction method according to some embodiments, the process proximity effect correction method of a process proximity effect correction device for performing process proximity effect correction (PPC) of a plurality of patterns using a machine learning module executed by a processor, comprising: training a sensitivity model by inputting a layout image of the plurality of patterns and a layout critical dimension (CD) of the plurality of patterns into the machine learning module; estimating an after cleaning inspection critical dimension (ACI-CD) sensitivity prediction value of the plurality of patterns by inferring an ACI-CD prediction value of the plurality of patterns; and determining a correction rate of the layout CD of the plurality of patterns using the estimated sensitivity prediction value.
    Type: Application
    Filed: May 31, 2023
    Publication date: March 14, 2024
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Dae Young PARK, Jeong Hoon KO, Seong Ryeol KIM, Young-Gu KIM, Tae Hoon KIM, Hyun Joong KIM, Young Ju LEE
  • Publication number: 20240086603
    Abstract: A method of reinforcement learning of a neural network device for generating a verification vector for verifying a circuit design comprising a circuit block includes inputting a test vector to the circuit block, generating one or more rewards based on a coverage corresponding to the test vector, the coverage being determined based on a state transition of the circuit block based on the test vector, and applying the one or more rewards to a reinforcement learning.
    Type: Application
    Filed: November 16, 2023
    Publication date: March 14, 2024
    Applicant: SAMSUNG ELECTRONICS CO, LTD.
    Inventors: In HUH, Jeong-hoon KO, Hyo-jin CHOI, Seung-ju KIM, Chang-wook JEONG, Joon-wan CHAI, Kwang-II PARK, Youn-sik PARK, Hyun-sun PARK, Young-min OH, Jun-haeng LEE, Tae-ho LEE
  • Patent number: 11861280
    Abstract: A method of reinforcement learning of a neural network device for generating a verification vector for verifying a circuit design comprising a circuit block includes inputting a test vector to the circuit block, generating one or more rewards based on a coverage corresponding to the test vector, the coverage being determined based on a state transition of the circuit block based on the test vector, and applying the one or more rewards to a reinforcement learning.
    Type: Grant
    Filed: March 11, 2022
    Date of Patent: January 2, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: In Huh, Jeong-hoon Ko, Hyo-jin Choi, Seung-ju Kim, Chang-wook Jeong, Joon-wan Chai, Kwang-il Park, Youn-sik Park, Hyun-sun Park, Young-min Oh, Jun-haeng Lee, Tae-ho Lee
  • Publication number: 20230355242
    Abstract: Aspects disclosed herein include an implantable, detachable, and removable medical device comprising: a therapeutic balloon configured to perform a therapeutic activity inside a living subject; and a focused-ultrasound activatable actuator operably connected to the therapeutic balloon; wherein the actuator is capable of being activated between a closed state and an open state remotely via a focused ultrasound beam; wherein the device is configured to be in an implantation state to facilitate implantation of the device in the living subject, in a therapeutic state to facilitate performance of the therapeutic activity, and subsequently in an expulsion state to facilitate expulsion of the medical device from the living subject; and wherein the implantation state, therapeutic state, and expulsion state are different from each other
    Type: Application
    Filed: January 12, 2023
    Publication date: November 9, 2023
    Inventors: Max KUDISCH, Jeong Hoon KO, Chiara DARAIO, Mikhail G. SHAPIRO, Di WU, Gunho KIM, Robert H. GRUBBS, Michael R. HARRISON, Sunghoon KIM
  • Publication number: 20230298154
    Abstract: A method for analyzing a wafer map using a wafer map analyzer includes generating first wafer maps each displaying characteristics of a first wafer for a corresponding channel of a plurality of channels. The first wafer maps are auto-encoded together to extract a first feature. The method also includes determining whether the first feature is a valid pattern, classifying the type of the first feature based on unsupervised learning when the first feature is a valid pattern and extracting a representative image of features classified into the same type as the first feature.
    Type: Application
    Filed: May 25, 2023
    Publication date: September 21, 2023
    Inventors: MIN CHUL PARK, JEONG HOON KO, JI YONG PARK, JE HYUN LEE, DAE SIN KIM
  • Publication number: 20230219282
    Abstract: Aspects disclosed herein include a composite material comprising: one or more shape memory polymers; and a first additive provided in the shape memory polymer(s); wherein: the first additive increases one or more ultrasound-absorption characteristics of the composite material compared to that of the same shape memory polymer(s) free of said first additive; the composite material is characterized by a composite transition temperature (Tcm,trans); and the composite material or one or more portions thereof undergo a shape change from a temporary shape to a permanent shape when the composite material or said one or more portions thereof are heated to within 35° C. of Tcm,trans or a temperature approximately equal to or greater than Tcm,trans.
    Type: Application
    Filed: January 12, 2023
    Publication date: July 13, 2023
    Inventors: Max KUDISCH, Jeong Hoon KO, Chiara DARAIO, Mikhail G. SHAPIRO, Di WU, Gunho KIM, Robert H. GRUBBS, Ki-Young YOON
  • Patent number: 11688050
    Abstract: A method for analyzing a wafer map using a wafer map analyzer includes generating first wafer maps each displaying characteristics of a first wafer for a corresponding channel of a plurality of channels. The first wafer maps are auto-encoded together to extract a first feature. The method also includes determining whether the first feature is a valid pattern, classifying the type of the first feature based on unsupervised learning when the first feature is a valid pattern and extracting a representative image of features classified into the same type as the first feature.
    Type: Grant
    Filed: April 24, 2018
    Date of Patent: June 27, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Min Chul Park, Jeong Hoon Ko, Ji Yong Park, Je Hyun Lee, Dae Sin Kim
  • Patent number: 11681947
    Abstract: A method of selecting a model of machine learning executed by a processor is provided. The method includes: receiving at least one data-set; configuring a configuration space for machine learning of the at least one data-set; extracting, from the at least one data-set, a meta-feature including quantitative information about the data-set; calculating performance of the machine learning for the at least one data-set based on a plurality of configurations included in the configuration space; executing meta-learning based on the meta-feature, the plurality of configurations, and the calculated performance; and optimizing the configuration space based on a result of executing the meta-learning.
    Type: Grant
    Filed: July 22, 2019
    Date of Patent: June 20, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD
    Inventors: Jeong-Hoon Ko, Jae-Jun Lee, Seong-Je Kim, In Huh, Chang-Wook Jeong
  • Publication number: 20220198111
    Abstract: A method of reinforcement learning of a neural network device for generating a verification vector for verifying a circuit design comprising a circuit block includes inputting a test vector to the circuit block, generating one or more rewards based on a coverage corresponding to the test vector, the coverage being determined based on a state transition of the circuit block based on the test vector, and applying the one or more rewards to a reinforcement learning.
    Type: Application
    Filed: March 11, 2022
    Publication date: June 23, 2022
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: In Huh, Jeong-hoon Ko, Hyo-jin Choi, Seung-ju Kim, Chang-wook Jeong, Joon-wan Chai, Kwang-il Park, Youn-sik Park, Hyun-sun Park, Young-min Oh, Jun-haeng Lee, Tae-ho Lee
  • Patent number: 11281832
    Abstract: A device for verifying a circuit design including a first circuit block and a second circuit block includes a verification vector generator and a design verifier. The verification vector generator determines a first verification vector by performing reinforcement learning through neural network computation based on a coverage corresponding to a first test vector, the coverage being determined based on a state transition of the first circuit block generated by inputting the first test vector to the first circuit block. The design verifier performs design verification for the first circuit block by using the first verification vector.
    Type: Grant
    Filed: February 12, 2020
    Date of Patent: March 22, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: In Huh, Jeong-hoon Ko, Hyo-jin Choi, Seung-ju Kim, Chang-wook Jeong, Joon-wan Chai, Kwang-il Park, Youn-sik Park, Hyun-sun Park, Young-min Oh, Jun-haeng Lee, Tae-ho Lee
  • Publication number: 20200257840
    Abstract: A device for verifying a circuit design including a first circuit block and a second circuit block includes a verification vector generator and a design verifier. The verification vector generator determines a first verification vector by performing reinforcement learning through neural network computation based on a coverage corresponding to a first test vector, the coverage being determined based on a state transition of the first circuit block generated by inputting the first test vector to the first circuit block. The design verifier performs design verification for the first circuit block by using the first verification vector.
    Type: Application
    Filed: February 12, 2020
    Publication date: August 13, 2020
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: In HUH, Jeong-hoon KO, Hyo-jin CHOI, Seung-ju KIM, Chang-wook JEONG, Joon-wan CHAI, Kwang-il PARK, Youn-sik PARK, Hyun-sun PARK, Young-min OH, Jun-haeng LEE, Tae-ho LEE
  • Patent number: 10614186
    Abstract: A yield prediction apparatus is provided. The yield prediction apparatus may include at least one processor coupled to at least one non-transitory computer-readable medium. The at least one processor may be configured to receive a first variable associated with operating characteristics of a semiconductor device, perform a simulation for the operating characteristics of the semiconductor device, perform a neural network regression analysis using a result of the simulation to determine a first function for the first variable, and predict a yield of the semiconductor integrated circuit based on an advanced Monte Carlo simulation. An input of the advanced Monte Carlo simulation may include the determined first function.
    Type: Grant
    Filed: February 21, 2018
    Date of Patent: April 7, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seong Ryeol Kim, Jeong Hoon Ko, Seong Je Kim, Je Hyun Lee, Jong Wook Jeon
  • Publication number: 20200042896
    Abstract: A method of selecting a model of machine learning executed by a processor is provided. The method includes: receiving at least one data-set; configuring a configuration space for machine learning of the at least one data-set; extracting, from the at least one data-set, a meta-feature including quantitative information about the data-set; calculating performance of the machine learning for the at least one data-set based on a plurality of configurations included in the configuration space; executing meta-learning based on the meta-feature, the plurality of configurations, and the calculated performance; and optimizing the configuration space based on a result of executing the meta-learning.
    Type: Application
    Filed: July 22, 2019
    Publication date: February 6, 2020
    Inventors: JEONG-HOON KO, Jae-Jun Lee, Seong-Je Kim, In Huh, Chang-Wook Jeong
  • Publication number: 20190065630
    Abstract: A yield prediction apparatus is provided. The yield prediction apparatus may include at least one processor coupled to at least one non-transitory computer-readable medium. The at least one processor may be configured to receive a first variable associated with operating characteristics of a semiconductor device, perform a simulation for the operating characteristics of the semiconductor device, perform a neural network regression analysis using a result of the simulation to determine a first function for the first variable, and predict a yield of the semiconductor integrated circuit based on an advanced Monte Carlo simulation. An input of the advanced Monte Carlo simulation may include the determined first function.
    Type: Application
    Filed: February 21, 2018
    Publication date: February 28, 2019
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Seong Ryeol KIM, Jeong Hoon KO, Seong Je KIM, Je Hyun LEE, Jong Wook JEON
  • Publication number: 20190050979
    Abstract: A method for analyzing a wafer map using a wafer map analyzer includes generating first wafer maps each displaying characteristics of a first wafer for a corresponding channel of a plurality of channels. The first wafer maps are auto-encoded together to extract a first feature. The method also includes determining whether the first feature is a valid pattern, classifying the type of the first feature based on unsupervised learning when the first feature is a valid pattern and extracting a representative image of features classified into the same type as the first feature.
    Type: Application
    Filed: April 24, 2018
    Publication date: February 14, 2019
    Inventors: MIN CHUL PARK, JEONG HOON KO, JI YONG PARK, JE HYUN LEE, DAE SIN KIM
  • Patent number: 10055829
    Abstract: A thickness of a first layer in a structure may be measured based on an original image of the structure. A first boundary of the first layer may be identified in the original image. A second boundary that is substantially indistinguishable in the original image may be identified based on converting the original image into a first image based on the first boundary and generating a second image based on filtering the first image. The first image may be generated based on adjusting partial image portions of the original image to align the representation of the first boundary with an axis line, such that the first image includes a representation of the first boundary that extends substantially in parallel with the axis line. The second boundary may be identified from the second image, and the thickness of the layer may be determined based on the identified first and second boundaries.
    Type: Grant
    Filed: August 31, 2016
    Date of Patent: August 21, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Min-Chul Park, Je-Hyun Lee, Jeong-Hoon Ko, Young-Gu Kim, Keun-Ho Lee
  • Publication number: 20170109896
    Abstract: A thickness of a first layer in a structure may be measured based on an original image of the structure. A first boundary of the first layer may be identified in the original image. A second boundary that is substantially indistinguishable in the original image may be identified based on converting the original image into a first image based on the first boundary and generating a second image based on filtering the first image. The first image may be generated based on adjusting partial image portions of the original image to align the representation of the first boundary with an axis line, such that the first image includes a representation of the first boundary that extends substantially in parallel with the axis line. The second boundary may be identified from the second image, and the thickness of the layer may be determined based on the identified first and second boundaries.
    Type: Application
    Filed: August 31, 2016
    Publication date: April 20, 2017
    Applicant: Samsung Electronics, Co., Ltd.
    Inventors: Min-Chul Park, Je-Hyun Lee, Jeong-Hoon Ko, Young-Gu Kim, Keun-Ho Lee
  • Patent number: 9298040
    Abstract: An LCD device includes a liquid crystal panel; a first polarizer attached to a first surface of the liquid crystal panel and including a first polarizing film, first and second optical compensation films disposed on one surface of the first polarizing film, and a phase retardation film, a protective film and a functional film disposed on another surface of the first polarizing film; and a second polarizer attached to a second surface of the liquid crystal panel and including a second polarizing film, an inner protective film disposed on one surface of the second polarizing film, and an outer protective film disposed on another surface of the second polarizing film, wherein the first polarizing film is disposed between the phase retardation film and the liquid crystal panel, and the phase retardation film has a retardation value of ?/4.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: March 29, 2016
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Sang-Woong Choi, Jeong-Hoon Ko, Hyoun-Sung Son, Eun-Jung Kim, Dong-Ha Yoo
  • Patent number: 9268173
    Abstract: An LCD device includes a liquid crystal panel; a first polarizer attached to a first surface of the liquid crystal panel and including a first polarizing film, first and second optical compensation films disposed on one surface of the first polarizing film, and a phase retardation film, a protective film and a functional film disposed on another surface of the first polarizing film; and a second polarizer attached to a second surface of the liquid crystal panel and including a second polarizing film, an inner protective film disposed on one surface of the second polarizing film, and an outer protective film disposed on another surface of the second polarizing film, wherein the first polarizing film is disposed between the phase retardation film and the liquid crystal panel, and the phase retardation film has a retardation value of ?/4.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: February 23, 2016
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Sang-Woong Choi, Jeong-Hoon Ko, Hyoun-Sung Son, Eun-Jung Kim, Dong-Ha Yoo