Patents by Inventor Jeong-Hwan Kim
Jeong-Hwan Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240014039Abstract: Exemplary semiconductor processing methods may include providing an oxygen-containing precursor to a processing region of a semiconductor processing chamber. The methods may include forming a plasma of the oxygen-containing precursor to produce oxygen-containing plasma effluents. The methods may include contacting a substrate housed in the processing region with the oxygen-containing plasma effluents. The substrate may include a boron-and-nitrogen-containing material overlying a carbon-containing material. The boron-and-nitrogen-containing material comprises a plurality of openings. The methods may include etching the carbon-containing material.Type: ApplicationFiled: July 11, 2022Publication date: January 11, 2024Applicant: Applied Materials, Inc.Inventors: Jeong Hwan Kim, Yeonju Kwak, Qian Fu, Siyu Zhu, Chuanxi Yang, Hang Yu
-
Publication number: 20230395424Abstract: A method of manufacturing a semiconductor device is provided. The method may include forming a stack, forming a preliminary stepped structure by patterning the stack, forming a first stepped structure, a second stepped structure, and an opening located between the first stepped structure and the second stepped structure by etching the preliminary stepped structure, forming a passivation layer that fills the opening and covers the first stepped structure, and forming a third stepped structure by etching the second stepped structure using the passivation layer as an etching barrier.Type: ApplicationFiled: August 15, 2023Publication date: December 7, 2023Applicant: SK hynix Inc.Inventors: Dong Hun LEE, Jeong Hwan KIM, Mi Seong PARK, Jung Shik JANG, Won Geun CHOI
-
Publication number: 20230395495Abstract: There are provided a memory device and a manufacturing method of the memory device. The memory device includes: a stack structure including gate lines stacked to be spaced apart from each other; main plugs arranged to be spaced apart from each other; plug isolation patterns isolating the main plugs into first and second sub-plugs; and a select isolation pattern isolating at least one gate line located between the plug isolation patterns adjacent to each other.Type: ApplicationFiled: January 11, 2023Publication date: December 7, 2023Applicant: SK hynix Inc.Inventors: Won Geun CHOI, Jeong Hwan KIM, Mi Seong PARK, Jung Shik JANG
-
Publication number: 20230384715Abstract: An example image forming apparatus includes a power device, a photosensitive drum, a transfer device to remove remaining toner based on a cleaning bias voltage, an optical sensor to detect remaining toner, and a processor to adjust the cleaning bias voltage based on a set offset bias voltage. The processor may change a surface potential of the photosensitive drum to a voltage of a set pattern using the power device, acquire a size ratio of a periodic component based on a frequency of a signal detected from the remaining toner using the optical sensor, and, based on the acquired size ratio of the periodic component being greater than or equal to a set size ratio, adjust the cleaning bias voltage based on an offset bias voltage corresponding to the size ratio of the periodic component and provide the adjusted cleaning bias voltage to the transfer device to remove remaining toner.Type: ApplicationFiled: June 18, 2021Publication date: November 30, 2023Applicant: Hewlett-Packard Development Company, L.P.Inventors: Jung Hun SONG, Do Geun KIM, Jeong Hwan KIM
-
Patent number: 11769689Abstract: A method of manufacturing a semiconductor device is provided. The method may include forming a stack, forming a preliminary stepped structure by patterning the stack, forming a first stepped structure, a second stepped structure, and an opening located between the first stepped structure and the second stepped structure by etching the preliminary stepped structure, forming a passivation layer that fills the opening and covers the first stepped structure, and forming a third stepped structure by etching the second stepped structure using the passivation layer as an etching barrier.Type: GrantFiled: June 11, 2021Date of Patent: September 26, 2023Assignee: SK hynix Inc.Inventors: Dong Hun Lee, Jeong Hwan Kim, Mi Seong Park, Jung Shik Jang, Won Geun Choi
-
Patent number: 11749197Abstract: An organic light emitting diode display device includes: a driving transistor; a first transistor switched according to an nth gate voltage and connected to a data voltage and the driving transistor; a second transistor switched according to an nth initialization voltage and connected to an initial voltage and the driving transistor; a third transistor switched according to an nth sensing voltage and connected to a reference voltage and the driving transistor; a fourth transistor switched according to an (n?2)th sensing voltage and connected to the initial voltage and the driving transistor; a storage capacitor connected to the driving transistor and the first transistor; and a light emitting diode connected to a low level voltage and the driving transistor.Type: GrantFiled: November 21, 2022Date of Patent: September 5, 2023Assignee: LG Display Co., Ltd.Inventor: Jeong-Hwan Kim
-
Publication number: 20230215362Abstract: An organic light emitting diode display device includes: a driving transistor; a first transistor switched according to an nth gate voltage and connected to a data voltage and the driving transistor; a second transistor switched according to an nth initialization voltage and connected to an initial voltage and the driving transistor; a third transistor switched according to an nth sensing voltage and connected to a reference voltage and the driving transistor; a fourth transistor switched according to an (n?2)th sensing voltage and connected to the initial voltage and the driving transistor; a storage capacitor connected to the driving transistor and the first transistor; and a light emitting diode connected to a low level voltage and the driving transistor.Type: ApplicationFiled: November 21, 2022Publication date: July 6, 2023Inventor: Jeong-Hwan Kim
-
Publication number: 20230216240Abstract: A cable connector for fixing a fastening a cable can include a connector cover rotatable fastened to a connector body, and a cover fixing unit disposed on a side of the connector body. The connector cover can include connector terminals arranged side by side along an edge of an end thereof, and a guide groove extending in a direction in which the connector terminals are arranged. Thus, in the cable connector, a flat cable can be inserted into the cable connector in the width direction. As such, damage to the cable connector in the fastening process of the flat cable can be prevented.Type: ApplicationFiled: November 3, 2022Publication date: July 6, 2023Applicant: LG Display Co., Ltd.Inventors: Jeong Hwan KIM, Jun Ho CHO, Jun Hee HAN
-
Publication number: 20230186989Abstract: The present discloses provides a memory device and a method of operating the memory device. The memory device includes first main plugs formed in a vertical direction over a substrate and arranged in a first direction, second main plugs, third main plugs arranged between the first and second main plugs, the third main plugs adjacent to the first and second main plugs, and bit lines above the first to third main plugs, wherein each of the first to third main plugs includes first and second sub-plugs facing each other, wherein portions of the first and second sub-plugs included in each of the first and third main plugs are coupled to different select lines, and wherein portions of the first and second sub-plugs included in each of the second and third main plugs are coupled to different select lines.Type: ApplicationFiled: May 17, 2022Publication date: June 15, 2023Applicant: SK hynix Inc.Inventors: Jung Shik JANG, In Su PARK, Woo Pyo JEONG, Jung Dal CHOI, Jae Woong KIM, Jeong Hwan KIM
-
Patent number: 11672753Abstract: A composition for sebum control and pore reduction, and its use for controlling sebum and reducing pore of skin are disclosed. The external-use skin preparation composition contains, as an active ingredient, extracts of one or more medicinal herbs selected from the group consisting of Cimicifugae rhizoma, Solani nigri herba, Glycyrrhiza uralensis, Clematis mandshurica, Acanthopanax senticosus, Inulae radix and Dioscorea japonica, and thus it not only can control the production of sebum and alleviate skin troubles, but also provide antioxidant effects, prevent pore enlargement, or prevent occurrence of skin irritation.Type: GrantFiled: September 21, 2018Date of Patent: June 13, 2023Assignee: AMOREPACIFIC CORPORATIONInventor: Jeong Hwan Kim
-
Patent number: 11651674Abstract: An electronic monitoring system includes an electronic monitoring device that is worn on a part of the body of a person to be monitored, to acquire location information and state information; an at-home monitoring device that receives the location information and the state information provided from the electronic monitoring device and determines whether the electronic monitoring device is at home, on the basis of the location information; and a control center that receives the location information and the state information from at least one of the electronic monitoring device or the at-home monitoring device to manage the person to be monitored.Type: GrantFiled: March 22, 2021Date of Patent: May 16, 2023Assignee: Life Science Technology, Inc.Inventors: Jeong Hwan Kim, Min Joon Choi
-
Publication number: 20230005964Abstract: A display device includes a first light blocking layer disposed on a substrate, a second light blocking layer disposed on the substrate and spaced apart from the first light blocking layer, an active layer including a first area disposed on the first light blocking layer, a second area disposed on the substrate between the first light blocking layer and the second light blocking layer, and a third area disposed between the first area and the second area, a gate electrode disposed on the active layer and overlapping a portion of the first area, a first electrode disposed on the gate electrode, and including at least a portion overlapping the first light blocking layer, and a second electrode disposed on the gate electrode, and including at least a portion overlapping the second light blocking layer and at least another portion overlapping the third area of the active layer.Type: ApplicationFiled: July 1, 2022Publication date: January 5, 2023Applicant: Samsung Display Co., LTD.Inventors: Yongduck SON, Jeong Hwan KIM, Taehui KIM, Junhwi PARK, Dabin LEE, Yujin LEE, Wonho JANG
-
Publication number: 20220389140Abstract: Provided are an ethylene-propylene-diene monomer (EPDM) copolymer and a method of preparing the same. An EPDM copolymer which has more improved miscibility with inorganic fillers such as carbon black, may further facilitate dispersibility in mixing to further decrease the viscosity of a compound composition, and may provide a compound composition having excellent processability and mechanical properties. A method of preparing the same is also provided.Type: ApplicationFiled: May 26, 2022Publication date: December 8, 2022Inventors: Byoung Tak Yim, Byung Jun Kim, Jeong Hwan Kim
-
Publication number: 20220384189Abstract: Exemplary deposition methods may include delivering a boron-containing precursor and a nitrogen-containing precursor to a processing region of a semiconductor processing chamber. The methods may include providing a hydrogen-containing precursor with the boron-containing precursor and the nitrogen-containing precursor. A flow rate ratio of the hydrogen-containing precursor to either of the boron-containing precursor or the nitrogen-containing precursor may be greater than or about 2:1. The methods may include forming a plasma of all precursors within the processing region of the semiconductor processing chamber. The methods may include depositing a boron-and-nitrogen material on a substrate disposed within the processing region of the semiconductor processing chamber.Type: ApplicationFiled: May 25, 2021Publication date: December 1, 2022Applicant: Applied Materials, Inc.Inventors: Siyu Zhu, Chuanxi Yang, Hang Yu, Deenesh Padhi, Yeonju Kwak, Jeong Hwan Kim, Qian Fu, Xiawan Yang
-
Patent number: 11486546Abstract: A liquefied natural gas (LNG) bunkering equipment test and evaluation system is provided. The system includes a storage tank module configured to store a liquefied natural gas, a supply module for connecting the storage tank module and the bunkering module, a bunkering module configured to perform bunkering by being supplied with the liquefied natural gas, a simulation module provided at a part under the bunkering module and the supply module and the simulation module is configured to simulate a maritime situation by giving a fluidity to the bunkering module and the supply module, and a controller configured to control a driving of the simulation module, thereby simulating various situations of sea areas by giving fluidity to the storage tank module and the bunkering module.Type: GrantFiled: July 15, 2019Date of Patent: November 1, 2022Assignee: KOREA MARINE EQUIPMENT RESEARCH INSTITUTEInventors: Jae Hyoun Park, Jae Hwan Bae, Jin Won Jung, Soo Sung Jeon, Bong Jae Shin, Young Hun Jeon, Ji Hyun Jung, Dae Hwan Kim, Soon Hyeong Kwon, Kyu Eun Shim, Jeong Hwan Kim
-
Publication number: 20220262885Abstract: A display device includes: a base substrate having a display region including a first region and a second region, and a non-display region; a first semiconductor layer including polysilicon at the second region; a first conductive layer on a first insulating layer, and including a bottom gate electrode at the first region and a second-first gate electrode at the second region; a second semiconductor layer including an oxide on a second insulating layer at the first region; a second conductive layer on a third insulating layer, and including a top gate electrode at the first region and a second-second gate electrode at the second region; and a third conductive layer on a fourth insulating layer, and including a first source electrode and a first drain electrode connected to the second semiconductor layer, and a second source electrode and a second drain electrode connected to the first semiconductor layer.Type: ApplicationFiled: May 6, 2022Publication date: August 18, 2022Inventors: Ji Eun CHOI, Deok Hoi KIM, Jeong Hwan KIM, Jong Baek SEON, Jun Cheol SHIN, Jae Hak LEE
-
Publication number: 20220209177Abstract: A display device includes a substrate that includes a display area and a non-display area; a mask support that is disposed in the non-display area of the substrate; a sealant that is disposed in the non-display area of the substrate and is disposed between the mask support and the display area; an insulating layer that is disposed between the sealant and the mask support; and a plurality of grooves that are formed by removing at least a part of the insulating layer.Type: ApplicationFiled: December 23, 2021Publication date: June 30, 2022Applicant: Samsung Display Co., LTD.Inventors: Yong Duck SON, Jeong Hwan KIM, Sun PARK, Min Chul SHIN, Jin Wook JEONG, Myung Koo HUR
-
Publication number: 20220189995Abstract: A display device includes a metal layer disposed on a substrate; a transistor disposed on the metal layer; and a light emitting element electrically connected to the transistor, wherein the transistor includes a semiconductor layer at least partially overlapping the metal layer, the semiconductor layer includes a first region, a second region, and a channel region disposed between the first region and the second region, and the metal layer overlaps the second region and the channel region and is spaced apart from the first region in a plan view.Type: ApplicationFiled: August 30, 2021Publication date: June 16, 2022Applicant: Samsung Display Co., LTD.Inventors: Jeong Hwan KIM, Yong Duck SON, Min-Sik JUNG, Jun Hwi PARK, Da Bin LEE, Won Ho JANG
-
Publication number: 20220172985Abstract: A method of manufacturing a semiconductor device is provided. The method may include forming a stack, forming a preliminary stepped structure by patterning the stack, forming a first stepped structure, a second stepped structure, and an opening located between the first stepped structure and the second stepped structure by etching the preliminary stepped structure, forming a passivation layer that fills the opening and covers the first stepped structure, and forming a third stepped structure by etching the second stepped structure using the passivation layer as an etching barrier.Type: ApplicationFiled: June 11, 2021Publication date: June 2, 2022Applicant: SK hynix Inc.Inventors: Dong Hun Lee, Jeong Hwan Kim, Mi Seong Park, Jung Shik Jang, Won Geun Choi
-
Patent number: 11342401Abstract: A display device includes: a base substrate having a display region including a first region and a second region, and a non-display region; a first semiconductor layer including polysilicon at the second region; a first conductive layer on a first insulating layer, and including a bottom gate electrode at the first region and a second-first gate electrode at the second region; a second semiconductor layer including an oxide on a second insulating layer at the first region; a second conductive layer on a third insulating layer, and including a top gate electrode at the first region and a second-second gate electrode at the second region; and a third conductive layer on a fourth insulating layer, and including a first source electrode and a first drain electrode connected to the second semiconductor layer, and a second source electrode and a second drain electrode connected to the first semiconductor layer.Type: GrantFiled: April 3, 2020Date of Patent: May 24, 2022Assignee: Samsung Display Co., Ltd.Inventors: Ji Eun Choi, Deok Hoi Kim, Jeong Hwan Kim, Jong Baek Seon, Jun Cheol Shin, Jae Hak Lee