Abstract: A driving circuit mounting film according to an embodiment includes: a base film that has a first surface and a second surface facing each other with a thickness therebetween; a driving circuit portion that is on the first surface of the base film; a plurality of first signal lines that are on a first side region on one side of the driving circuit portion along a first direction; and a plurality of second signal lines that are on a second side region on the opposite side of the driving circuit portion along the first direction. A first width of the first side region and a second width of the second side region are different from each other, and the first signal line includes a first portion on the first surface of the base film and a second portion on the second surface of the base film.

Abstract: A chip-on-film package may include a film substrate including a chip region and an edge region, a semiconductor chip provided on the chip region and mounted on a top surface of the film substrate, the semiconductor chip including a chip pad adjacent to a bottom surface thereof, an input line and an output line provided on the edge region and disposed on the top surface of the film substrate, a connection terminal interposed between the film substrate and the semiconductor chip, and a redistribution pattern disposed between the semiconductor chip and the connection terminal.

Abstract: Provided is a semiconductor package including a film substrate including a sprocket hole, a semiconductor chip on the film substrate, interconnection lines connected to the semiconductor chip, a dummy pattern between the sprocket hole and the semiconductor chip, and a cutting pattern between the semiconductor chip and the dummy pattern, wherein the cutting pattern is spaced apart from the interconnection lines and the dummy pattern in a first direction.

Abstract: A semiconductor package includes a base film that has peripheral regions extending in a longitudinal direction and an inner region disposed between the peripheral regions and extending in the longitudinal direction. A unit film package is disposed on the inner region of the base film and is defined by a cut line. Dummy patterns are disposed on the peripheral regions of the base film and between the cut line and the opposite ends in the width direction. A first solder resist layer is disposed on the base film and covers the unit film package inside the cut line. In a plan view, the first solder resist layer extends in the width direction, runs across the cut line, and covers the dummy patterns.

Abstract: A semiconductor package includes a film substrate; a wiring layer provided on the film substrate; and a semiconductor chip provided on the wiring layer and electrically connected to the wiring layer. The film substrate includes a first layer, wherein the first layer is an insulating layer having the wiring layer thereon. The film substrate further includes a second layer, wherein the second layer is attached to a bottom of the first layer and comprises a gas. The second layer is configured to be peeled off of the first layer.

Abstract: A chip-on-film package may include a film substrate including a chip region and an edge region, a semiconductor chip provided on the chip region and mounted on a top surface of the film substrate, the semiconductor chip including a chip pad adjacent to a bottom surface thereof, an input line and an output line provided on the edge region and disposed on the top surface of the film substrate, a connection terminal interposed between the film substrate and the semiconductor chip, and a redistribution pattern disposed between the semiconductor chip and the connection terminal.

Abstract: A chip-on-film package may include a film substrate including a chip region and an edge region, a semiconductor chip provided on the chip region and mounted on a top surface of the film substrate, the semiconductor chip including a chip pad adjacent to a bottom surface thereof, an input line and an output line provided on the edge region and disposed on the top surface of the film substrate, a connection terminal interposed between the film substrate and the semiconductor chip, and a redistribution pattern disposed between the semiconductor chip and the connection terminal.

Abstract: A semiconductor device includes: a substrate including a semiconductor chip region, a guard ring region adjacent to the semiconductor chip region, and an edge region adjacent to the guard ring region; a first interlayer insulating layer disposed on the substrate; a wiring structure disposed inside the first interlayer insulating layer and in the guard ring region, wherein the wiring structure includes a first wiring layer and a second wiring layer disposed above the first wiring layer; and a trench configured to expose at least a part of the first interlayer insulating, layer in the edge region, wherein the trench includes a first bottom surface and a second bottom surface formed at a level different from that of the first bottom surface, wherein the first bottom surface is formed between the wiring structure and the second bottom surface, and the second bottom surface is formed adjacent to the first bottom surface.

Abstract: A semiconductor package includes a base film having a first mount section, a first folding section, a second folding section, and a second mount section. A first semiconductor chip is disposed on the first mount section of the base film. A second semiconductor chip is disposed on the second mount section of the base film. Test pads are disposed on the first or second folding sections of the base film and is connected to each of the first and second semiconductor chips. Connection pads are disposed on the first or second mount sections of the base film and are connected to each of the first and second semiconductor chips. The first and second folding sections vertically overlap each other. The test pads are interposed between and buried by the first and second folding sections.

Abstract: Disclosed is a semiconductor package comprising a semiconductor chip, a first chip pad on a bottom surface of the semiconductor chip and adjacent to a first lateral surface in a first direction of the semiconductor chip, the first lateral surface separated from the first chip pad from a plan view in a first direction, and a first lead frame coupled to the first chip pad. The first lead frame includes a first segment on a bottom surface of the first chip pad and extending from the first chip pad in a second direction opposite to the first direction and away from the first lateral surface of the semiconductor chip, and a second segment which connects to a first end of the first segment and then extends along the first direction to extend beyond the first lateral surface of the semiconductor chip after passing one side of the first chip pad, when viewed in the plan view.

Abstract: A chip-on-film package may include a film substrate including a chip region and an edge region, a semiconductor chip provided on the chip region and mounted on a top surface of the film substrate, the semiconductor chip including a chip pad adjacent to a bottom surface thereof, an input line and an output line provided on the edge region and disposed on the top surface of the film substrate, a connection terminal interposed between the film substrate and the semiconductor chip, and a redistribution pattern disposed between the semiconductor chip and the connection terminal.

Abstract: A semiconductor device includes: a substrate including a semiconductor chip region, a guard ring region adjacent to the semiconductor chip region, and an edge region adjacent to the guard ring region; a first interlayer insulating layer disposed on the substrate; a wiring structure disposed inside the first interlayer insulating layer and in the guard ring region, wherein the wiring structure includes a first wiring layer and a second wiring layer disposed above the first wiring layer; and a trench configured to expose at least a part of the first interlayer insulating, layer in the edge region, wherein the trench includes a first bottom surface and a second bottom surface formed at a level different from that of the first bottom surface, wherein the first bottom surface is formed between the wiring structure and the second bottom surface, and the second bottom surface is formed adjacent to the first bottom surface.

Abstract: Disclosed is a semiconductor package comprising a semiconductor chip, a first chip pad on a bottom surface of the semiconductor chip and adjacent to a first lateral surface in a first direction of the semiconductor chip, the first lateral surface separated from the first chip pad from a plan view in a first direction, and a first lead frame coupled to the first chip pad. The first lead frame includes a first segment on a bottom surface of the first chip pad and extending from the first chip pad in a second direction opposite to the first direction and away from the first lateral surface of the semiconductor chip, and a second segment which connects to a first end of the first segment and then extends along the first direction to extend beyond the first lateral surface of the semiconductor chip after passing one side of the first chip pad, when viewed in the plan view.

Abstract: Disclosed are fingerprint sensor packages and display apparatuses including the same. The fingerprint sensor package comprises a flexible film having a top surface and a bottom surface opposite to the top surface, a fingerprint sensor surrounded by a cap, and a display driver integrated circuit on the flexible film. The fingerprint sensor and the display driver integrated circuit are mounted on the top surface of the flexible film.

Abstract: Disclosed are fingerprint sensor packages and display apparatuses including the same. The fingerprint sensor package comprises a flexible film having a top surface and a bottom surface opposite to the top surface, a fingerprint sensor surrounded by a cap, and a display driver integrated circuit on the flexible film. The fingerprint sensor and the display driver integrated circuit are mounted on the top surface of the flexible film.

Abstract: A semiconductor package includes a substrate having a top surface on which a semiconductor chip is mounted and a bottom surface opposite the top surface, an upper metal pattern including an upper connection region to which an external electrical device is connected and a chip connection region to which the semiconductor chip is connected, a lower metal pattern including a lower connection region to which other external electrical device is connected, and an intermediate metal pattern electrically connecting the upper and lower metal patterns. The upper metal pattern provides at least three groups of inner leads. The lower metal pattern provides at least three groups of outer leads. A module, such as that of a display device, may include the semiconductor package.

Abstract: Disclosed are fingerprint sensor packages and display apparatuses including the same. The fingerprint sensor package comprises a flexible film having a top surface and a bottom surface opposite to the top surface, a fingerprint sensor surrounded by a cap, and a display driver integrated circuit on the flexible film. The fingerprint sensor and the display driver integrated circuit are mounted on the top surface of the flexible film.

Abstract: A semiconductor package includes a substrate having a top surface on which a semiconductor chip is mounted and a bottom surface opposite the top surface, an upper metal pattern including an upper connection region to which an external electrical device is connected and a chip connection region to which the semiconductor chip is connected, a lower metal pattern including a lower connection region to which other external electrical device is connected, and an intermediate metal pattern electrically connecting the upper and lower metal patterns. The upper metal pattern provides at least three groups of inner leads. The lower metal pattern provides at least three groups of outer leads. A module, such as that of a display device, may include the semiconductor package.

Abstract: In an embodiment, the film product includes a film substrate having a first surface and a second surface opposite the first surface. The film substrate has a length in a first direction and a width in a second direction perpendicular to the first direction. A first plurality of pads is on one of the first surface and the second surface, and the first plurality of pads is arranged in a third direction, the third direction being diagonal with respect to at least one of the first direction and the second direction. At least one merge line is electrically connecting at least two of the first plurality of pads.

Abstract: A sensing module substrate and a sensing module including the same are provided. The sensing module substrate includes a film substrate having a first surface and a second surface; sensing vias which penetrate the film substrate from the first surface to the second surface, each of the sensing vias being configured to be coupled to pixels of a semiconductor chip; and an interconnection pattern provided on at least one of the first surface and the second surface of the film substrate.