Abstract: A sub wordline driver may include a substrate including an active pattern, wherein the active pattern includes a first channel region, a second channel region, and a third channel region, which are disposed to be sequentially spaced apart in a first horizontal direction, a first gate electrode disposed on the first channel region and extending in a second horizontal direction perpendicular to the first horizontal direction, a second gate electrode disposed on the second channel region, and a third gate electrode disposed on the third channel region and extending in the second horizontal direction, wherein the second channel region extends in a third horizontal direction that forms an acute angle with the first horizontal direction, and a width of the second channel region in the third horizontal direction is greater than a width of the second channel region in the first horizontal direction.

Abstract: An integrated circuit device includes an active region, a silicon oxide dielectric film covering the active region, a metal oxide dielectric film apart from the active region with the silicon oxide dielectric film therebetween and including a first local region and a second local region that has a dopant content ratio greater than that of the first local region, a metal-containing word line apart from the silicon oxide dielectric film with each of the first local region and the second local region of the metal oxide dielectric film therebetween, and a doped silicon layer including a portion contacting the metal-containing word line and facing the second local region of the metal oxide dielectric film.

Abstract: A carrier head assembly for a chemical mechanical polishing system is provided. The carrier head assembly includes a base assembly and a rectangular membrane. The rectangular membrane extends below and is coupled to the base assembly. The rectangular membrane defines pressurizable chambers including a first pressurizable chamber and a second pressurizable chamber arranged, at least in part, in a chamber stack in which the first pressurizable chamber is stacked on the second pressurizable chamber. The first and second pressurizable chambers are pressurizable to different pressures to create a pressure differential that provides a downward force through a side wall forming, at least in part, the second pressurizable chamber.

Abstract: Embodiments of the disclosure provided herein include an apparatus and method for additive manufacturing a component for a semiconductor processing apparatus. The apparatus for additive manufacturing includes a printhead configured to selectively deposit layers on build the component, wherein the printhead may selectively deposit a first set of layers onto the build platform, and selectively deposit a second set of layers on the first set of layers, each of the second set of layers comprising a gap that forms a cooling channel through the component. The cooling channel is filled a filler material. A third set of layers covers the cooling channel before the channel is exposed to a liquidizing agent, wherein the liquidizing agent reacts with the filler material to produce an effluent fluid which is then drained. In other embodiments, the cooling channel may be machined into the component before being filled with the filler material.

Abstract: A polishing system including a platen to support a polishing pad, a carrier head to hold a substrate against the polishing pad, a source of dry ice particles, and a pad conditioner. The pad conditioner includes a compressor to generate a compressed gas stream, a mixer coupled to the source and the compressor to mix the dry ice particles with the compressed gas stream to form a stream of compressed gas with entrained dry ice particles, and a nozzle coupled to the mixer to direct the stream of compressed gas with entrained dry ice particles onto a polishing surface of the polishing pad at sufficient velocity to condition the polishing pad.

Abstract: A retaining ring includes: a generally annular body having an inner surface to constrain a substrate and a bottom surface, the bottom surface having multiple channels extending from an outer surface to the inner surface. Each channel of the multiple channels includes an inner channel and outer channel connected by a reservoir channel, the reservoir channel having an annular shape within the bottom surface. The outer channel has two opposing sidewalls and both opposing sidewalls of the outer channel have an inflection point.

Abstract: A semiconductor device includes: a memory cell array region including memory cells connected to respective word lines and bit lines; and a peripheral circuit region including a first semiconductor element and a second semiconductor element. Each of the first and second semiconductor elements includes: a fin structure extending in a first direction on a substrate; a gate structure extending on the fin structure in a second direction, perpendicular to the first direction, and including a gate dielectric layer and a gate metal layer; and a source region and a drain region in the substrate at opposing ends of the fin structure. A thickness of the gate dielectric layer in the first semiconductor element is greater than a thickness of the gate dielectric layer in the second semiconductor element, and the source and drain regions in the first semiconductor element are doped with first conductivity type impurities and have different structures.

Abstract: Disclosed herein is a chemical mechanical polishing apparatus, including a platen having an upper surface to support a polishing pad, the platen having an annular chamber below and separated from a portion of an upper surface of the platen by a plate that is sufficiently flexible to deflect under a change of a pressure in the annular chamber, the platen having a channel fluidically connecting the annular chamber to a port in the platen; a pressure source coupled to the port to control the pressure in the annular chamber; a carrier head to hold a surface of a substrate against the polishing pad; and a motor to generate relative motion between the platen and the carrier head so as to polish an overlying layer on the substrate.

Abstract: A chemical mechanical polishing system includes a chuck assembly that has a chuck to hold a substrate, a motor to rotate the chuck about a first axis, and a pad carrier assembly. The pad carrier assembly includes a support that is movably along a radial direction relative to the first axis, a lateral actuator coupled the support to cause the support to move along the radial direction, a support arm extending from the support over the chuck, a pad carrier suspended from the support arm, the pad carrier configured to receive and hold a polishing pad, and a flexible membrane secured to the support arm to form a plurality of individually pressurizable chambers between the pad carrier and the support arm such that variation of a pressure difference between the chambers adjusts a radial distribution of pressure on the pad carrier.

Abstract: A chemical mechanical polishing system includes a chuck assembly with a chuck for holding a substrate, a motor to rotate the chuck about a first axis, and a pad carrier assembly. The pad carrier assembly includes a movable support, a lateral actuator coupled the support to move the support along the radial direction, a flexure having a first end secured to the support and a second end, a pad carrier/attachment secured to a bottom side of the second end of the flexure for receiving and holding a polishing pad, a support arm extending from the support over the flexure such that the support arm and the flexure move together along the radial direction with the second end of the flexure vertically movable relative to the support arm, and a pad carrier actuator secured to the arm to apply a downward pressure to a top of the flexure.

Abstract: Provided is a semiconductor device including a first memory pattern including a first word line extending in a first direction from one side of a first active pattern, a second word line extending in the first direction from the other side of the second active pattern, a back gate electrode extending in the first direction and apart from the first and second word lines in a second direction perpendicular to the first direction, a landing pad having one end portion contacting lower surfaces of the first and second active patterns and the other end portion contacting a data storage pattern including a capacitor, a contact node located on upper surfaces of the first and second active patterns, a bit line contacting the contact node and extending in the second direction, a spacer and a bit line shield layer sequentially surrounding an upper surface and a side surface of the bit line, and a bit line plate covering an upper surface of the bit line shield layer, at least one second memory pattern disposed at a diffe

Abstract: A chemical mechanical polishing method includes transferring a substrate onto a chuck supported by a drive shaft when the chuck is located at a first height, raising the chuck to a second height greater than the first height such that a top surface of the substrate is in contact with at least one polishing pad, polishing the substate by the at least one polishing pad, lowering, the chuck to a third height lower than the second height, and transferring the substrate off of the chuck.

Abstract: Some implementations of a retaining ring has an inner surface having a first portion formed of multiple planar facets and a second portion that adjoins the first portion along a boundary and includes a frustoconical surface that is sloped downwardly from outside in. Some implementations of the retaining ring have a crenellated or serpentine inner surface, and/or an inner surface with alternating region of different surface properties or different tilt angles.

Abstract: A semiconductor device that includes an active pattern on a substrate, the active pattern defining a recess extending through an upper portion of the active pattern; a gate structure; and a source/drain region at an upper portion of the active pattern adjacent to the gate structure. The gate structure includes a first gate insulation pattern on an inner wall of the recess; a second gate insulation pattern having a first portion at a lower inner wall of the first gate insulation pattern, the first portion containing a metal oxide, and a second portion at an upper inner wall of the first gate insulation pattern, the second portion contacting the first portion and containing the metal oxide doped with at least one of n-type impurities, p-type impurities or germanium; and a conductive structure on the second insulation pattern.

Abstract: A semiconductor device may include a substrate, a bit line extending in a first direction parallel to a top surface of the substrate, a semiconductor pattern on the bit line and extending in a third direction perpendicular to the top surface of the substrate, and a gate electrode on a side surface of the semiconductor pattern and extending in a second direction parallel to the top surface of the substrate and intersecting the first direction. The gate electrode may include a work function adjusting material, and a first atomic concentration of the work function adjusting material in each of lower and upper portions of the gate electrode may be higher than a second atomic concentration of the work function adjusting material in a center portion of the gate electrode between the lower and upper portions.

Abstract: A polishing system includes a platen to hold a polishing pad, a carrier head to hold a substrate against the polishing pad, a conditioner including a conditioner head to hold a conditioner disk against the polishing pad, a motor to move the conditioner head laterally movable relative to the platen, a conditioning disk cleaning station positioned adjacent the platen to clean the conditioning disk, and a controller configured to cause the motor to, during polishing of the substrate, move the conditioner head back and forth between a first position with the conditioner head over the polishing pad and a second position with the conditioner head in the conditioner disk cleaning station.

Abstract: A system and method for sequential single-sided CMP processing of opposite facing surfaces of a silicon carbide (SiC) substrate are disclosed. A method includes urging a first surface of a substrate against one of plurality of polishing pads, wherein the plurality of polishing pads are disposed on corresponding ones of a plurality of rotatable polishing platens. The method includes transferring, using the first side of the end effector, the substrate from the substrate carrier loading station to a substrate alignment station. The method includes transferring, using the first side of the end effector, the substrate from the substrate alignment station to a substrate carrier loading station. The method includes urging a second surface of the substrate against one of the plurality of polishing platens.

Abstract: A body is brought into contact with a polishing pad of a polishing system, a polishing liquid is supplied to the polishing pad, relative motion between the body and the polishing pad is generated while the body contacts the polishing pad, a signal from an in-situ eddy current monitoring system during the relative motion while the body contacts the polishing pad, generating, and mechanical vibrations in the polishing system are detected based on a signal from the in-situ eddy current monitoring system.

Abstract: A polishing system includes a platen to hold a polishing pad, a carrier head to hold a substrate against the polishing pad, a conditioner including a conditioner head to hold a conditioner disk against the polishing pad, a motor to move the conditioner head laterally movable relative to the platen, a conditioning disk cleaning station positioned adjacent the platen to clean the conditioning disk, and a controller configured to cause the motor to, during polishing of the substrate, move the conditioner head back and forth between a first position with the conditioner head over the polishing pad and a second position with the conditioner head in the conditioner disk cleaning station.

Abstract: A semiconductor device includes a bit line structure; charge trapping structures on the bit line structure; word line structures arranged alternately with the charge trapping structures in a first direction, each of the word line structures including a first word line and a second word line spaced apart from each other in the first direction; active patterns arranged on the bit line structure, arranged between the charge trapping structures and the word line structures, and electrically connected to the bit line structure; contact patterns arranged on the active patterns and electrically connected to the active patterns; and an information storage structure on the contact patterns, and each of the charge trapping structures may include: at least one charge trapping layer between the active patterns; and first insulating films between the at least one charge trapping layer and the active patterns.