Patents by Inventor Jeremy A Theil

Jeremy A Theil has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6649993
    Abstract: An active pixel sensor having a transparent conductor that directly contacts a conductive element in an interconnection structure to electrically connect the transparent conductor to a pixel sensor bias voltage is provided. The active pixel sensor includes a semiconductor substrate, the interconnection layer, which is formed over the substrate, and a pixel interconnection layer formed over the interconnection layer. Photo sensors that include a pixel electrode, an I-layer, and may include a P-layer are formed over the pixel interconnection layer. The transparent conductor is formed over the photo sensors and the conductive element exposed on the surface of the interconnection layer.
    Type: Grant
    Filed: March 16, 2001
    Date of Patent: November 18, 2003
    Assignee: Agilent Technologies, Inc.
    Inventor: Jeremy A. Theil
  • Patent number: 6586812
    Abstract: An array of image sensors that includes ion implantation regions that provide physical isolation between the pixel electrode regions. The physical isolation reduces coupling and cross-talk between the image sensors. The array of isolated image sensors can be formed by a simple fabrication process.
    Type: Grant
    Filed: April 13, 1999
    Date of Patent: July 1, 2003
    Assignee: Agilent Technologies, Inc.
    Inventors: Min Cao, Jeremy A. Theil, Gary W. Ray, Dietrich W. Vook
  • Publication number: 20030111704
    Abstract: An image sensor and method of manufacture therefor includes a substrate having pixel control circuitry. Dielectric layers on the substrate include interconnects in contact with the pixel control circuitry and with pixel electrodes. An intrinsic layer is over the pixel electrodes and has a gap provided between the pixel electrodes. An intrinsic-layer covering layer is over the intrinsic layer and a transparent contact layer over the intrinsic-layer covering and the interconnects. The intrinsic, intrinsic-layer covering, and transparent contact layer interact in different combinations to provide a pixel isolation system for the image sensor.
    Type: Application
    Filed: December 18, 2001
    Publication date: June 19, 2003
    Inventors: Jeremy A. Theil, Dietrich W. Vook, Homayoon Haddad
  • Publication number: 20030107100
    Abstract: An image sensor. The image sensor array includes a substrate. An interconnect structure is formed adjacent to the substrate. An amorphous silicon electrode layer is adjacent to the interconnect structure. The amorphous silicon electrode layer includes electrode ion implantation regions between pixel electrode regions. The pixel electrode regions define cathodes of an array of image sensors. The electrode ion implantation regions provide physical isolation between the pixel electrode regions. The cathodes are electrically connected to the interconnect structure. An amorphous silicon I-layer is adjacent to the amorphous silicon electrode layer. The amorphous silicon I-layer forms an inner layer of each of the image sensors. A transparent electrode layer is formed adjacent to the image sensors. An inner surface of the transparent electrode is electrically connected to anodes of the image sensors and the interconnect structure.
    Type: Application
    Filed: January 22, 2003
    Publication date: June 12, 2003
    Inventors: Min Cao, Jeremy A. Theil, Gary W. Ray, Dietrich W. Vook
  • Publication number: 20030085410
    Abstract: An active pixel sensor having a transparent conductor that directly contacts a conductive element in an interconnection structure to electrically connect the transparent conductor to a pixel sensor bias voltage is provided. The active pixel sensor includes a semiconductor substrate, the interconnection layer, which is formed over the substrate, and a pixel interconnection layer formed over the interconnection layer. Photo sensors that include a pixel electrode, an I-layer, and may include a P-layer are formed over the pixel interconnection layer. The transparent conductor is formed over the photo sensors and the conductive element exposed on the surface of the interconnection layer.
    Type: Application
    Filed: November 26, 2002
    Publication date: May 8, 2003
    Inventor: Jeremy A. Theil
  • Patent number: 6545711
    Abstract: An image sensor array. The image sensor array includes a substrate. An array of photo diode sensors are electrically interconnected to the substrate. The photo diode sensors conduct charge at a rate proportional to the intensity of light received by the photo diode sensors. A ring of guard diodes are located around the periphery of the array of photo diode sensors. Each guard diode has a guard diode anode connected to a predetermined guard anode voltage and a guard diode cathode connected to a static guard cathode voltage.
    Type: Grant
    Filed: November 2, 1998
    Date of Patent: April 8, 2003
    Assignee: Agilent Technologies, Inc.
    Inventors: Frederick A. Perner, Min Cao, Charles M. C. Tan, Jeremy A. Theil
  • Publication number: 20020130380
    Abstract: An active pixel sensor having a transparent conductor that directly contacts a conductive element in an interconnection structure to electrically connect the transparent conductor to a pixel sensor bias voltage is provided. The active pixel sensor includes a semiconductor substrate, the interconnection layer, which is formed over the substrate, and a pixel interconnection layer formed over the interconnection layer. Photo sensors that include a pixel electrode, an I-layer, and may include a P-layer are formed over the pixel interconnection layer. The transparent conductor is for med over the photo sensors and the conductive element exposed on the surface of the interconnection layer.
    Type: Application
    Filed: March 16, 2001
    Publication date: September 19, 2002
    Inventor: Jeremy A. Theil
  • Patent number: 6436488
    Abstract: Method of depositing a layer of amorphous silicon film on a substrate at a very fast deposition rate while maintaining superior film quality. A plasma volume in a process chamber is defined. A total flow rate of a mixture of gases introduced into the chamber is also defined. The total flow rate is the sum of the flow rates of the respective gases in the mixture. Next, a process parameter that includes the plasma volume and total flow rate is defined. The process parameter is then maintained in a first predetermined relationship with a predetermined value during the deposition of the amorphous silicon film.
    Type: Grant
    Filed: June 12, 2000
    Date of Patent: August 20, 2002
    Assignee: Agilent Technologies, Inc.
    Inventors: Jeremy A Theil, Gerrit J Kooi, Ron P Varghese
  • Patent number: 6396118
    Abstract: An array of active pixel sensors includes a substrate. An interconnect structure is formed adjacent to the substrate. The interconnect structure includes a plurality of conductive vias. A plurality of photo sensors are formed adjacent to the interconnect structure. Each photo sensor includes a pixel electrode. Each pixel electrode is electrically connected to the substrate through a corresponding conductive yet. A I-layer is formed over each of the pixel electrodes. The array of active pixel sensors further includes a conductive mesh formed adjacent to the photo sensors. An inner surface of the conductive mesh is electrically and physically connected to the photo sensors, and electrically connected to the substrate through a conductive via. The conductive mesh providing light shielding between photo sensors thereby reducing cross-talk between the photo sensors. The conductive mesh includes apertures that align with at least one of the pixel electrodes of the photo sensors.
    Type: Grant
    Filed: February 3, 2000
    Date of Patent: May 28, 2002
    Assignee: Agilent Technologies, Inc.
    Inventors: Jeremy A. Theil, Jane Mei-Jech Lin, Min Cao, Gary W. Ray, Shawming Ma, Xin Sun
  • Patent number: 6387736
    Abstract: A structure and a method for providing structural stability at an interface between two poorly adhering layers in a semiconductor device involve providing anchoring channels in one of the poorly adhering layers through which the other poorly adhering layer can be anchored to a third layer. Specifically, the structure and method are applicable to a three-layer stack having a top layer of amorphous silicon, a middle layer of titanium nitride, and a bottom layer of oxide. In order to reduce susceptibility to delamination between the amorphous silicon layer and the titanium nitride layer, the anchoring channels are created in the titanium nitride layer to allow the amorphous silicon to attach to the oxide layer. Because the amorphous silicon layer and the oxide layer exhibit good adhesion between each other, delamination between the amorphous silicon layer and the titanium nitride layer is minimized.
    Type: Grant
    Filed: April 26, 1999
    Date of Patent: May 14, 2002
    Assignee: Agilent Technologies, Inc.
    Inventors: Min Cao, Jeremy A Theil, Gary W Ray, Dietrich W Vook
  • Patent number: 6384460
    Abstract: A self-aligned metal electrode sensor structure. The self-aligned metal electrode sensor structure includes a substrate which includes electronic circuitry. An interconnect structure is formed adjacent to the substrate. The interconnect structure includes conductive interconnect vias which pass through the interconnect structure. A sensor is formed adjacent to the interconnect structure. The sensor includes a pixel metallization section and a doped layer electrode. The pixel metallization section is electrically connected to the interconnect via. The pixel metallization section includes an outer surface which is substantially planar. The doped layer electrode includes an inner surface adjacent to the outer surface of the pixel metallization section. The entire inner surface of the doped layer electrode is substantially planar. A transparent conductive layer is formed adjacent to the sensor. The interconnect via and the transparent conductive layer electrically connect the electronic circuitry to the sensor.
    Type: Grant
    Filed: June 7, 1999
    Date of Patent: May 7, 2002
    Assignee: Agilent Technologies, Inc.
    Inventors: Jeremy A. Theil, Min Cao
  • Patent number: 6376275
    Abstract: A self-aligned metal electrode sensor structure. The self-aligned metal electrode sensor structure includes a substrate which includes electronic circuitry. An interconnect structure is formed adjacent to the substrate. The interconnect structure includes conductive interconnect vias which pass through the interconnect structure. A sensor is formed adjacent to the interconnect structure. The sensor includes a pixel metallization section and a doped layer electrode. The pixel metallization section is electrically connected to the interconnect via. The pixel metallization section includes an outer surface which is substantially planar. The doped layer electrode includes an inner surface adjacent to the outer surface of the pixel metallization section. The entire inner surface of the doped layer electrode is substantially planar. A transparent conductive layer is formed adjacent to the sensor. The interconnect via and the transparent conductive layer electrically connect the electronic circuitry to the sensor.
    Type: Grant
    Filed: August 8, 2000
    Date of Patent: April 23, 2002
    Assignee: Agilent Technologies, Inc.
    Inventors: Jeremy A Theil, Min Cao
  • Patent number: 6373117
    Abstract: A multiple-photosensor structure. The multiple-photosensor structure includes a substrate. A first photosensor is formed adjacent to the substrate. A first pixel electrode of the first photosensor is electrically connected to the substrate. A first transparent conductive layer is formed adjacent to the first photosensor. The first transparent conductive layer electrically connects a first outer electrode of the first photosensor to the substrate. A second photosensor is adjacent to the first transparent conductive layer. A second pixel electrode of the second photosensor is electrically connected to the substrate through the first transparent conductive layer. A second transparent conductive layer is adjacent to the second photosensor. The second transparent conductive layer electrically connects a second outer electrode of the second photosensor to the substrate. The multiple-photosensor structure can further include a third photosensor formed adjacent to the second transparent conductive layer.
    Type: Grant
    Filed: May 3, 1999
    Date of Patent: April 16, 2002
    Assignee: Agilent Technologies, Inc.
    Inventor: Jeremy A Theil
  • Patent number: 6325977
    Abstract: An optical detection system. The optical detection system includes an integrated circuit, photosensors, a passivation layer formed above the photosensors, and test sites formed on the passivation layer. The test sites include test probes of organic material that are able to bind with target organic molecules. The combination of the test probes and target organic molecules can be activated such that light is given off from the test sites in proportion to the concentration of target molecules. Light given off from the test sites is detected by the photosensors that are present below the passivation layer. The photosensors generate electronic signals in proportion to the amount of light received from the test sites. The electronic signals are then transmitted from the photosensors to the integrated circuit for signal processing. Signal processing within the integrated circuit can enhance the quality of the electronic signals generated by the photosensors.
    Type: Grant
    Filed: January 18, 2000
    Date of Patent: December 4, 2001
    Assignee: Agilent Technologies, Inc.
    Inventor: Jeremy A Theil
  • Publication number: 20010006846
    Abstract: A structure and a method for providing structural stability at an interface between two poorly adhering layers in a semiconductor device involve providing anchoring channels in one of the poorly adhering layers through which the other poorly adhering layer can be anchored to a third layer. Specifically, the structure and method are applicable to a three-layer stack having a top layer of amorphous silicon, a middle layer of titanium nitride, and a bottom layer of oxide. In order to reduce susceptibility to delamination between the amorphous silicon layer and the titanium nitride layer, the anchoring channels are created in the titanium nitride layer to allow the amorphous silicon to attach to the oxide layer. Because the amorphous silicon layer and the oxide layer exhibit good adhesion between each other, delamination between the amorphous silicon layer and the titanium nitride layer is minimized.
    Type: Application
    Filed: February 23, 2001
    Publication date: July 5, 2001
    Inventors: Min Cao, Jeremy A. Theil, Gary W. Ray, Dietrich W. Vook
  • Patent number: 6215164
    Abstract: An image pixel sensor array. The image pixel sensor array includes a substrate. An interconnect structure is formed adjacent to the substrate. A plurality of image pixel sensors are formed adjacent to the interconnect structure. Each image pixel sensor includes a pixel electrode, and an I-layer formed adjacent to the pixel electrode. The I-layer includes a first surface adjacent to the pixel electrode, and a second surface opposite the first surface. The first surface includes a first surface area which is less than a second surface area of the second surface. The image pixel sensor array further includes an insulating material between each image pixel sensor, and a transparent electrode formed over the image pixel sensors. The transparent electrode electrically connects the image pixel sensors and the interconnect structure.
    Type: Grant
    Filed: July 26, 1999
    Date of Patent: April 10, 2001
    Assignee: Agilent Technologies, Inc.
    Inventors: Min Cao, Jeremy A Theil, Gary W Ray, Dietrich W Vook, Shawming Ma
  • Patent number: 6114739
    Abstract: An active pixel sensor. The active pixel sensor includes a substrate, an interconnect structure adjacent to the substrate, and at least one photo sensor adjacent to the interconnect structure. At least one photo sensor is formed adjacent to the interconnect structure. Each photo sensor includes a pixel electrode which includes a patterned doped semiconductor layer. An I-layer is formed adjacent to the patterned doped semiconductor layer. A transparent electrode is formed adjacent to the I-layer. A method of forming the active pixel sensor includes forming an interconnect structure over a substrate. Next, a doped semiconductor layer is deposited over the interconnect structure. The doped semiconductor layer is etched forming pixel electrode. An I-layer is deposited over the pixel electrodes. Finally, a transparent conductive layer is deposited over the I-layer.
    Type: Grant
    Filed: October 19, 1998
    Date of Patent: September 5, 2000
    Assignee: Agilent Technologies
    Inventors: Jeremy A. Theil, Min Cao, Dietrich W. Vook, Frederick A. Perner, Xin Sun, Shawming Ma, Gary W. Ray, Wayne M. Greene, Kit M. Cham, Steven A. Lupi
  • Patent number: 6083572
    Abstract: A method of forming a low-dielectric constant film on a substrate. The method includes placing the substrate within a plasma processing chamber. Gas within the chamber is removed. A combination of hydrocarbon and hydrofluorocarbon gasses are flowed into the chamber. A high density plasma is created in the chamber. The high density plasma is extinguished. Finally, all gas is removed from the chamber. The method can additionally include a heating step after the film has been formed.
    Type: Grant
    Filed: February 27, 1998
    Date of Patent: July 4, 2000
    Assignee: Hewlett-Packard Company
    Inventors: Jeremy A. Theil, Gary W. Ray, Karen L. Seaward, Francoise F. Mertz
  • Patent number: 6051867
    Abstract: An integrated circuit sensor structure. The integrated circuit sensor structure includes a substrate which includes electronic circuitry. An interconnect structure is adjacent to the substrate. The interconnect structure includes conductive interconnect vias which pass through the interconnect structure. A dielectric layer is adjacent to the interconnect structure. The dielectric layer includes a planar surface, and conductive dielectric vias which pass through the dielectric layer and are electrically connected to the interconnect vias. The dielectric layer further includes an interlayer planarization dielectric layer adjacent to the interconnect structure, and a passivating layer adjacent to the interlayer planarization dielectric layer. The integrated circuit sensor structure further includes sensors adjacent to the dielectric layer. The interconnect vias and the dielectric vias electrically connect the electronic circuitry to the sensors.
    Type: Grant
    Filed: May 6, 1999
    Date of Patent: April 18, 2000
    Assignee: Hewlett-Packard Company
    Inventors: Jeremy A. Theil, Gary W. Ray, Frederick A. Perner, Min Cao
  • Patent number: 6027995
    Abstract: An interconnect system is provided. The interconnect system includes a silicon substrate and a first dielectric layer formed upon the silicon substrate. The interconnect system also includes a first level of at least two electrically conductive lines formed upon the first dielectric layer. The interconnect system further includes a region of low dielectric constant material formed between the at least two electrically conductive lines. The interconnect system also includes a first hard mask formed upon the polymer region.
    Type: Grant
    Filed: August 18, 1998
    Date of Patent: February 22, 2000
    Assignee: Intel Corporation
    Inventors: Chien Chiang, Chuanbin Pan, Vicky M. Ochoa, Sychyi Fang, David B. Fraser, Joyce C. Sum, Gary William Ray, Jeremy A. Theil