Abstract: Embodiments of the disclosure include methods and apparatus for electrostatically coupling a mask to a substrate support in a deposition chamber. In one embodiment, a substrate support is disclosed that includes a substrate receiving surface, a recessed portion disposed about a periphery of the substrate receiving surface, an electrostatic chuck disposed below the substrate receiving surface, and a plurality of compressible buttons disposed within a respective opening formed in the recessed portion that form an electrical circuit with the electrostatic chuck.

Abstract: Embodiments of the disclosure generally provide methods of forming a capacitor layer or a gate insulating layer with high dielectric constant as well as low film current leakage and desired film qualities for display applications. In one embodiment, a thin film transistor structure includes a dielectric layer formed on a substrate, wherein the dielectric layer is a zirconium containing material comprising aluminum, and gate, source and drain electrodes formed on the substrate, wherein the gate, source and drain electrodes formed above or below the dielectric layer.

Abstract: A scan flip-flop circuit includes a selection circuit including first and second input terminals coupled to first and second I/O nodes, a flip-flop circuit coupled to the selection circuit, a first driver coupled between the flip-flop circuit and the first I/O node, and a second driver coupled between the flip-flop circuit and the second I/O node. The selection circuit and drivers receive a scan direction signal. In response to a first logic level of the scan direction signal, the selection circuit responds to a first signal received at the first input terminal, and the second driver outputs a second signal responsive to a flip-flop circuit output signal. In response to a second logic level of the scan direction signal, the selection circuit responds to a third signal received at the second input terminal, and the first driver outputs a fourth signal responsive to the flip-flop circuit output signal.

Abstract: An integrated circuit device includes a device layer having devices spaced in accordance with a predetermined device pitch, a first metal interconnection layer disposed above the device layer and coupled to the device layer, and a second metal interconnection layer disposed above the first metal interconnection layer and coupled to the first metal interconnection layer through a first via layer. The second metal interconnection layer has metal lines spaced in accordance with a predetermined metal line pitch, and a ratio of the predetermined metal line pitch to predetermined device pitch is less than 1.

Abstract: Embodiments of the disclosure generally provide methods of forming a capacitor layer or a gate insulating layer with high dielectric constant as well as low film current leakage and desired film qualities for display applications. In one embodiment, a thin film transistor structure includes a dielectric layer formed on a substrate, wherein the dielectric layer is a zirconium containing material comprising aluminum, and gate, source and drain electrodes formed on the substrate, wherein the gate, source and drain electrodes formed above or below the dielectric layer.

Abstract: Embodiments of the disclosure generally provide methods of forming a hybrid film stack that may be used as a capacitor layer or a gate insulating layer with a high dielectric constant as well as film qualities for display applications. In one embodiment, a thin film transistor structure include gate, source and drain electrodes formed on a substrate, and an insulating layer formed on a substrate, wherein the insulating layer is a hybrid film stack having a dielectric layer comprising a zirconium containing material disposed on an interface layer formed above or below the gate, source and drain electrodes.

Abstract: Embodiments of the disclosure generally provide methods of forming a hybrid film stack that may be used as a capacitor layer or a gate insulating layer with a high dielectric constant as well as film qualities for display applications. In one embodiment, a thin film transistor structure include gate, source and drain electrodes formed on a substrate, and an insulating layer formed on a substrate, wherein the insulating layer is a hybrid film stack having a dielectric layer comprising a zirconium containing material disposed on an interface layer formed above or below the gate, source and drain electrodes.

Abstract: A method and apparatus for forming an encapsulation layer on an organic light emitting diode (OLED) patterned substrate are described. A sidewall planarization layer fills voids in a scalloped sidewall of a wall feature on the OLED patterned substrate. The sidewall planarization layer is cured in the same chamber as the deposition of the sidewall planarization layer. A barrier layer is formed on the sidewall planarization layer. The sidewall planarization layer provides a planarized surface for good adhesion of the barrier layer over the sidewall planarization layer which minimizes the possibility of defects to the OLED patterned substrate from moisture of oxygen penetrating the OLED patterned substrate.

Abstract: A method of forming a doped silicon nitride film on a surface of a substrate and structures including the doped silicon nitride film are disclosed. Exemplary methods include forming a layer comprising silicon nitride using a first thermal process and forming a layer comprising doped silicon nitride using a second thermal process to thereby form the doped silicon nitride film.

Abstract: A method and system for improving analysis of social media and other usage data to determine user sentiments are disclosed. Social media posts are identified as relevant to determining user sentiments regarding a service provider. Posts are analyzed by machine learning algorithms to determine user general sentiments and specific sentiments. User interaction metrics indicating user interaction with service provider web site or application may also be analyzed. Sentiment and interaction determinations may be used with other data to predict likelihood of user attrition for services of the service provider. Sentiment determinations associated with social media posts may further be used to determine priority levels for the posts, including response urgency levels. Determined priority levels may then be used to implement appropriate actions in a timely manner based upon the post urgency.

Abstract: A flow guide apparatus includes an upper flow guide structure configured to receive a first gas from a remote source, and a lower flow guide structure attached to the upper flow guide structure. The upper flow guide structure and the lower flow guide structure are configured to receive at least one gas from at least one remote source. The flow guide apparatus further includes a line diffuser structure disposed between the lower flow guide structure and the upper flow guide structure. The line diffuser structure has a long axis along a length of the upper flow guide structure and a short axis. The line diffuser structure includes a plurality of through holes that are configured to approximately evenly distribute the at least one gas as it is output into a reactor.

Abstract: A mask assembly (100) includes a mask frame (102) and a mask screen (104), both of the mask frame (102) and the mask screen (104) made of a metallic material, and a metal coating (125) disposed on exposed surfaces of one or both of the mask frame (102) and the mask screen (104).

Abstract: Packaging materials and methods of manufacture are disclosed. The packaging material comprises a substrate surface and film coating selected from the group consisting of an elastomer, a polymer, an inorganic material and combinations thereof. The film coating includes a first layer and a second layer, the first layer deposited on the second layer. The first layer has a formula of SiOxNyCz, where x is in a range from 1.9 to 2.15, y is in a range from 0.01 to 0.08, and z is in a range from 0.10 to 0.40.

Abstract: Embodiments of the present disclosure generally relate to an organic light emitting diode device, and more particularly, to moisture barrier films utilized in an OLED device. The OLED device comprises a thin film encapsulation structure and/or a thin film transistor. A moisture barrier film is used as a first barrier layer in the thin film encapsulation structure and as a passivation layer and/or a gate insulating layer in the thin film transistor. The moisture barrier film comprises a silicon oxynitride material having a low refractive index of less than about 1.5, a low water vapor transmission rate of less than about 5.0×10?5 g/m2/day, and low hydrogen content of less than about 8%.

Abstract: Embodiments of the disclosure generally provide methods of forming a capacitor layer or a gate insulating layer with high dielectric constant as well as low film current leakage and desired film qualities for display applications. In one embodiment, a thin film transistor structure includes a dielectric layer formed on a substrate, wherein the dielectric layer is a zirconium containing material comprising aluminum, and gate, source and drain electrodes formed on the substrate, wherein the gate, source and drain electrodes formed above or below the dielectric layer.

Abstract: Embodiments of the disclosure include methods and apparatus for electrostatically coupling a mask to a substrate support in a deposition chamber. In one embodiment, a substrate support is disclosed that includes a substrate receiving surface, a recessed portion disposed about a periphery of the substrate receiving surface, an electrostatic chuck disposed below the substrate receiving surface, and a plurality of compressible buttons disposed within a respective opening formed in the recessed portion that form an electrical circuit with the electrostatic chuck.

Abstract: Embodiments of the disclosure generally provide methods of forming a capacitor layer or a gate insulating layer with high dielectric constant as well as low film current leakage and desired film qualities for display applications. In one embodiment, a thin film transistor structure includes a dielectric layer formed on a substrate, wherein the dielectric layer is a zirconium containing material comprising aluminum, and gate, source and drain electrodes formed on the substrate, wherein the gate, source and drain electrodes formed above or below the dielectric layer.