Patents by Inventor Jerry Lo
Jerry Lo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20180190362Abstract: Aspects of the disclosure provide methods and apparatus for handling Read Disturb and block errors in a non-volatile memory (NVM) device. An error level of both an aggressor page that causes Read Disturb errors and an error level of adjacent victim pages are obtained. The error level of the victim page is compared against a predetermined threshold error level to determine if the victim page is experiencing a high level of bit errors. If so, then the error level of the aggressor page is compared to the error level of the victim page to determine whether Read Disturb errors are actually occurring due to host reads of the aggressor page. By looking at both the aggressor and victim error levels, a more accurate determination of Read Disturb errors may be obtained, resulting in less unnecessary relocations of pages and blocks within an NVM for mitigating Read Disturb effects.Type: ApplicationFiled: December 30, 2016Publication date: July 5, 2018Inventors: Richard David Barndt, Aldo Giovanni Cometti, Haining Liu, Jerry Lo
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Publication number: 20180181300Abstract: Aspects of the disclosure provide a method and an apparatus that perform a background media scan (BGMS) with improved efficiency. In particular, the disclosed BGMS processes can monitor data retention performance of a large capacity solid state drive (SSD) without significantly increasing scanning overhead by scanning only some sample pages of a memory block.Type: ApplicationFiled: December 22, 2016Publication date: June 28, 2018Inventors: Richard David Barndt, Hung-min Chang, Aldo Giovanni Cometti, Jerry Lo, Hung-Cheng Yeh
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Patent number: 9977612Abstract: A data storage system is disclosed that utilizes garbage collection and logs for managing system data. In one embodiment, system data stored in a non-volatile memory is updated based on the character of changes to data stored in a data storage system (e.g., changes caused by host system activity). For example, when changes to stored data are scattered (e.g., changes are made to random memory locations), it may be beneficial to generate and accumulate more logs reflecting changes to the system data. As another example, when changes to stored data are substantially consolidated (e.g., changes are made to consecutive memory locations), it may be beneficial to update system data stored in the non-volatile memory more frequently. Reduction in write amplification, increase in efficiency, and reduction in start-up and initialization time can be attained. Reconstruction time of system data can also be reduced.Type: GrantFiled: May 11, 2012Date of Patent: May 22, 2018Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: Jerry Lo, Dominic S. Suryabudi
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Patent number: 9940261Abstract: An example device includes a memory device and one or more processors. The memory device is configured to store a table that includes two or more mappings, each mapping being associated with a respective logical address and a respective physical address. The processors are configured to identify, within the table, a first zone and a second zone. Each zone includes one or more mappings of the table. The zones do not share any mapping of the table. The processors are further configured to form a first log list indicating one or more mapping updates associated with the mapping(s) included in the first zone, to form a second log list indicating one or more mapping updates associated with the mapping(s) included in the second zone, and to replay a portion of the first log list and a portion of the second log list concurrently to update the table.Type: GrantFiled: May 5, 2016Date of Patent: April 10, 2018Assignee: Western Digital Technology, Inc.Inventors: Jing Shi Booth, Jerry Lo, Subhash Balakrishna Pillai
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Publication number: 20170322888Abstract: An example device includes a memory device and one or more processors. The memory device is configured to store a table that includes two or more mappings, each mapping being associated with a respective logical address and a respective physical address. The processors are configured to identify, within the table, a first zone and a second zone. Each zone includes one or more mappings of the table. The zones do not share any mapping of the table. The processors are further configured to form a first log list indicating one or more mapping updates associated with the mapping(s) included in the first zone, to form a second log list indicating one or more mapping updates associated with the mapping(s) included in the second zone, and to replay a portion of the first log list and a portion of the second log list concurrently to update the table.Type: ApplicationFiled: May 5, 2016Publication date: November 9, 2017Inventors: Jing Shi Booth, Jerry Lo, Subhash Balakrishna Pillai
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Patent number: 9678671Abstract: Embodiments of the invention are directed to optimizing the selection of memory blocks for garbage collection in solid state devices to efficiently maximize the amount of memory freed by garbage collection operations. The systems and methods disclosed herein provide for the efficient selection of optimal or near-optimal garbage collection candidate blocks, with the most optimal selection defined as block(s) with the most invalid pages. In one embodiment, a controller classifies memory blocks into various invalid block pools by the amount of invalid pages each block contains. In one embodiment, the controller selects for garbage collection a block from a non-empty pool of blocks with the highest minimum amount of invalid pages. One or more of the pools have minimum thresholds that can be dynamically adjusted according to an observed usage condition, such as a change of an over-provisioning amount in the storage state device.Type: GrantFiled: October 12, 2015Date of Patent: June 13, 2017Assignee: Western Digital Technologies, Inc.Inventors: Ho-Fan Kang, Jerry Lo, Johnny Lam
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Patent number: 9442666Abstract: Embodiments of the invention are directed to optimizing reconstruction of operation data in volatile memory of solid-state storage subsystems. In various embodiments, operation data is stored in the volatile memory with persistent backup data of the operation data in the non-volatile memory. In one embodiment, operation data includes a superblock table that is used to identify most or all groups of blocks (superblocks) within the storage device that certain firmware components operate on. Sometimes operation data in the volatile memory is lost or corrupted due to a power interruption or system shutdown. To optimize the reconstruction of the superblock table or other similar operation data in the volatile memory, embodiments of the invention use a “snapshot entry” to identify the latest entry information, allowing the controller to quickly identify the most updated physical locations of the operation data portions and complete the reconstruction in an efficient manner.Type: GrantFiled: February 19, 2016Date of Patent: September 13, 2016Assignee: Western Digital Technologies, Inc.Inventors: Lyndon S. Chiu, Jerry Lo
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Publication number: 20160170674Abstract: Embodiments of the invention are directed to optimizing reconstruction of operation data in volatile memory of solid-state storage subsystems. In various embodiments, operation data is stored in the volatile memory with persistent backup data of the operation data in the non-volatile memory. In one embodiment, operation data includes a superblock table that is used to identify most or all groups of blocks (superblocks) within the storage device that certain firmware components operate on. Sometimes operation data in the volatile memory is lost or corrupted due to a power interruption or system shutdown. To optimize the reconstruction of the superblock table or other similar operation data in the volatile memory, embodiments of the invention use a “snapshot entry” to identify the latest entry information, allowing the controller to quickly identify the most updated physical locations of the operation data portions and complete the reconstruction in an efficient manner.Type: ApplicationFiled: February 19, 2016Publication date: June 16, 2016Inventors: Lyndon S. CHIU, Jerry LO
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Publication number: 20160103617Abstract: Embodiments of the invention are directed to optimizing the selection of memory blocks for garbage collection in solid state devices to efficiently maximize the amount of memory freed by garbage collection operations. The systems and methods disclosed herein provide for the efficient selection of optimal or near-optimal garbage collection candidate blocks, with the most optimal selection defined as block(s) with the most invalid pages. In one embodiment, a controller classifies memory blocks into various invalid block pools by the amount of invalid pages each block contains. In one embodiment, the controller selects for garbage collection a block from a non-empty pool of blocks with the highest minimum amount of invalid pages. One or more of the pools have minimum thresholds that can be dynamically adjusted according to an observed usage condition, such as a change of an over-provisioning amount in the storage state device.Type: ApplicationFiled: October 12, 2015Publication date: April 14, 2016Inventors: Ho-Fan KANG, Jerry LO, Johnny LAM
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Patent number: 9268646Abstract: Embodiments of the invention are directed to optimizing reconstruction of operation data in volatile memory of solid-state storage subsystems. In various embodiments, operation data is stored in the volatile memory with persistent backup data of the operation data in the non-volatile memory. In one embodiment, operation data includes a superblock table that is used to identify most or all groups of blocks (superblocks) within the storage device that certain firmware components operate on. Sometimes operation data in the volatile memory is lost or corrupted due to a power interruption or system shutdown. To optimize the reconstruction of the superblock table or other similar operation data in the volatile memory, embodiments of the invention use a “snapshot entry” to identify the latest entry information, allowing the controller to quickly identify the most updated physical locations of the operation data portions and complete the reconstruction in an efficient manner.Type: GrantFiled: December 21, 2010Date of Patent: February 23, 2016Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: Lyndon S. Chiu, Jerry Lo
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Publication number: 20160048352Abstract: A data storage subsystem is disclosed that implements a process for storing and/or reconstructing system data, such as a system mapping table. In certain embodiments, table pages are systematically copied, or flushed, to non-volatile memory in a progressive manner, according to a fixed ratio of flushed table pages per table update trigger, thereby facilitating write and/or load efficiency. Full or partial reconstruction of a table may be performed within a bounded number of operations based on the size of the table, the ratio implemented, and/or other characteristics.Type: ApplicationFiled: October 26, 2015Publication date: February 18, 2016Inventors: Jerry LO, Dominic S. SURYABUDI, Lan D. PHAN
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Patent number: 9170932Abstract: A data storage subsystem is disclosed that implements a process for storing and/or reconstructing system data, such as a system mapping table. In certain embodiments, table pages are systematically copied, or flushed, to non-volatile memory in a progressive manner, according to a fixed ratio of flushed table pages per table update trigger, thereby facilitating write and/or load efficiency. Full or partial reconstruction of a table may be performed within a bounded number of operations based on the size of the table, the ratio implemented, and/or other characteristics.Type: GrantFiled: May 22, 2012Date of Patent: October 27, 2015Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: Jerry Lo, Dominic S. Suryabudi, Lan D. Phan
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Patent number: 9158670Abstract: Embodiments of the invention are directed to optimizing the selection of memory blocks for garbage collection in solid state devices to efficiently maximize the amount of memory freed by garbage collection operations. The systems and methods disclosed herein provide for the efficient selection of optimal or near-optimal garbage collection candidate blocks, with the most optimal selection defined as block(s) with the most invalid pages. In one embodiment, a controller classifies memory blocks into various invalid block pools by the amount of invalid pages each block contains. In one embodiment, the controller selects for garbage collection a block from a non-empty pool of blocks with the highest minimum amount of invalid pages. One or more of the pools have minimum thresholds that can be dynamically adjusted according to an observed usage condition, such as a change of an over-provisioning amount in the storage state device.Type: GrantFiled: June 30, 2011Date of Patent: October 13, 2015Assignee: Western Digital Technologies, Inc.Inventors: Ho-Fan Kang, Jerry Lo, Johnny Lam
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Patent number: 9075708Abstract: The present disclosure is directed to managing write commands for a storage system implementing address indirection. In some storage systems, a mapping table that provides logical-to-physical mapping may have individual entries that each references a logical address size that exceeds the size of an atomic write to the storage media. In such systems, a write to a logical address is not atomic as it may require several discrete physical writes that may individually fail. The techniques presented employ several pre-commit and post-commit actions to save data that enables the storage system to make writes to these logical addresses atomic and prevent undue delay on powerup.Type: GrantFiled: June 30, 2011Date of Patent: July 7, 2015Assignee: Western Digital Technologies, Inc.Inventors: Ho-Fan Kang, Stephen P. Hack, Jerry Lo, Frederick H. Adi, Lan D. Phan
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Patent number: 8984247Abstract: A data storage subsystem is disclosed that implements a process for storing and/or reconstructing system data, such as a system mapping table. In certain embodiments, table pages and log pages are systematically copied, or flushed, to non-volatile memory in an interleaving manner according to a fixed ratio of log pages to table pages, thereby facilitating coherency of data. Full and/or partial reconstruction of a table may be performed within a bounded number of operations based on the size of the table, the ratio implemented, and/or other characteristics.Type: GrantFiled: May 10, 2012Date of Patent: March 17, 2015Assignee: Western Digital Technologies, Inc.Inventors: Jerry Lo, Frederick H. Adi
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Patent number: 8966205Abstract: A data storage system is disclosed that utilizes garbage collection and hybrid self-mapping for managing system data. In one embodiment, a system data region having an amount of valid system data that is below a threshold is freed. Write amplification associated with managing and storing system data can be reduced at least in part because only valid system data can be copied during garbage collection of the selected region. Mapping information associating system data with physical locations in non-volatile storage where system data is stored can be generated, which can reduce system data reconstruction time during start-up of the data storage system. Increase in efficiency and reduction in startup and initialization time can be attained.Type: GrantFiled: May 10, 2012Date of Patent: February 24, 2015Assignee: Western Digital Technologies, Inc.Inventors: Jerry Lo, Frederick H. Adi
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Patent number: 8954653Abstract: A data storage system configured to efficiently manage system data, efficiently organize system data, and reduce system data redundancy is disclosed. In one embodiment, the data storage system can maintain memory allocation information configured to track defective allocation units. Memory allocation information can be further configured to provide information for locating the memory allocation units or memory locations in physical memory. Separate information that indicates locations of the data allocation units or memory locations and/or records defective memory locations may not be needed. Hence, redundancy can be reduced, efficiency can be increased, and improved performance can be attained.Type: GrantFiled: June 26, 2012Date of Patent: February 10, 2015Assignee: Western Digital Technologies, Inc.Inventors: Jerry Lo, Johnny A. Lam
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Patent number: 8713066Abstract: Embodiments of the invention provide a storage subsystem comprising a non-volatile solid-state memory array and a system operation module for managing memory operations. The system operation module is configured to store system operation data in a data structure that includes linked lists for storing system operation data, with at least some lists including entries referencing blocks in the solid-state memory array belonging to a category. The system operation module is further configured to (1) move a particular entry from a first linked list to a second linked list when a block referenced by the particular entry in the first linked list has met a condition for being classified in a new category that is different from that of the blocks referenced by entries in the first linked list, and (2) update entries within the first and second linked lists so that the dependencies in the linked lists are maintained.Type: GrantFiled: March 29, 2010Date of Patent: April 29, 2014Assignee: Western Digital Technologies, Inc.Inventors: Jerry Lo, Lan D. Phan, Cliff Pajaro
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Patent number: 8683113Abstract: A non-volatile semiconductor memory is disclosed comprising N memory devices each comprising a plurality of blocks, wherein each block comprises a plurality of memory segments accessed through an address. A searched is performed by issuing a read command for each of the N memory devices, wherein an address of each read command is separated by a distance determined in response to the search range of addresses and N, and the search range of addresses is greater than N. Data read from at least one of the memory devices is evaluated to determine whether the search has finished.Type: GrantFiled: February 4, 2011Date of Patent: March 25, 2014Assignee: Western Digital Technologies, Inc.Inventors: Erick O. Abasto, Jerry Lo
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Publication number: 20120203953Abstract: A non-volatile semiconductor memory is disclosed comprising N memory devices each comprising a plurality of blocks, wherein each block comprises a plurality of memory segments accessed through an address. A searched is performed by issuing a read command for each of the N memory devices, wherein an address of each read command is separated by a distance determined in response to the search range of addresses and N, and the search range of addresses is greater than N. Data read from at least one of the memory devices is evaluated to determine whether the search has finished.Type: ApplicationFiled: February 4, 2011Publication date: August 9, 2012Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: ERICK O. ABASTO, JERRY LO