Abstract: Techniques for forming quantum circuits, including connections between components of quantum circuits, are presented. A trench can be formed in a dielectric material, by removing a portion of the dielectric material and a portion of conductive material layered on top of the dielectric material, to enable creation of circuit components of a circuit. The trench can define a regular nub or compensated nub to facilitate creating electrical leads connected to the circuit components on a nub. The compensated nub can comprise recessed regions to facilitate depositing material during evaporation to form the leads. For compensated nub implementation, material can be evaporated in two directions, with oxidation performed in between such evaporations, to contact leads and form a Josephson junction. For regular nub implementation, material can be evaporated in four directions, with oxidation performed in between the third and fourth evaporations, to contact leads and form a Josephson junction.

Abstract: A quantum computing device is formed using a first chip and a second chip, the first chip having a first substrate, a first set of pads, and a set of Josephson junctions disposed on the first substrate. The second chip has a second substrate, a second set of pads disposed on the second substrate opposite the first set of pads, and a second layer formed on a subset of the second set of pads. The second layer is configured to bond the first chip and the second chip. The subset of the second set of pads corresponds to a subset of the set of Josephson junctions selected to avoid frequency collision between qubits in a set of qubits. A qubit is formed using a Josephson junction from the subset of Josephson junctions and another Josephson junction not in the subset being rendered unusable for forming qubits.

Abstract: A microstrip that is usable in a quantum application (q-microstrip) includes a ground plane, a polyimide film disposed over the ground plane at a first surface of the polyimide film, and a conductor formed on a second side of the polyimide film such that the first surface is substantially opposite to the second surface. A material of the conductor provides greater than a threshold thermal conductivity (TH) with a structure of a dilution fridge stage (stage).

Abstract: A stripline that is usable in a quantum application (q-stripline) includes a first polyimide film and a second polyimide film. The q-stripline further includes a first center conductor and a second center conductor formed between the first polyimide film and the second polyimide film. The q-stripline has a first pin configured through the second polyimide film to make electrical and thermal contact with the first center conductor.

Abstract: A microstrip that is usable in a quantum application (q-microstrip) includes a ground plane, a polyimide film disposed over the ground plane at a first surface of the polyimide film, and a conductor formed on a second side of the polyimide film such that the first surface is substantially opposite to the second surface. A material of the conductor provides greater than a threshold thermal conductivity (TH) with a structure of a dilution fridge stage (stage).

Abstract: The technology described herein is directed towards a cryogenic-stripline microwave attenuator. A first high thermal conductivity substrate such as sapphire and a second high thermal conductivity substrate such as sapphire, along with a signal conductor comprising one or more attenuator lines between the substrates form a stripline. A compression component such as one or more screws, vias (plus clamps) and/or clamps presses the first high thermal conductivity substrate against one side of the signal conductor and presses the second high thermal conductivity substrate against another side of the signal conductor. The high thermal conductivity of the substrates facilitates improved thermalization, while the pressing of the substrates against the conductor reduces the thermal boundary (Kapitza) resistance and thereby, for example, improves thermalization and reduces thermal noise.

Abstract: Symmetrical qubits with reduced far-field radiation are provided. In one example, a qubit device includes a first group of superconducting capacitor pads positioned about a defined location of the qubit device, wherein the first group of superconducting capacitor pads comprise two or more superconducting capacitor pads having a first polarity, and a second group of superconducting capacitor pads positioned about the defined location of the qubit device in an alternating arrangement with the first group of superconducting capacitor pads, wherein the second group of superconducting capacitor pads comprise two or more superconducting capacitor pads having a second polarity that is opposite the first polarity.

Abstract: A quantum computing device is formed using a first chip and a second chip, the first chip having a first substrate, a first set of pads, and a set of Josephson junctions disposed on the first substrate. The second chip has a second substrate, a second set of pads disposed on the second substrate opposite the first set of pads, and a second layer formed on a subset of the second set of pads. The second layer is configured to bond the first chip and the second chip. The subset of the second set of pads corresponds to a subset of the set of Josephson junctions selected to avoid frequency collision between qubits in a set of qubits. A qubit is formed using a Josephson junction from the subset of Josephson junctions and another Josephson junction not in the subset being rendered unusable for forming qubits.

Abstract: A quantum computing device is formed using a first chip and a second chip, the first chip having a first substrate, a first set of pads, and a set of Josephson junctions disposed on the first substrate. The second chip has a second substrate, a second set of pads disposed on the second substrate opposite the first set of pads, and a second layer formed on a subset of the second set of pads. The second layer is configured to bond the first chip and the second chip. The subset of the second set of pads corresponds to a subset of the set of Josephson junctions selected to avoid frequency collision between qubits in a set of qubits. A qubit is formed using a Josephson junction from the subset of Josephson junctions and another Josephson junction not in the subset being rendered unusable for forming qubits.

Abstract: A system for adjusting qubit frequency includes a qubit device having a Josephson junction and a shunt capacitor coupled to electrodes of the Josephson junction. A cantilevered conductor is separated from the shunt capacitor by a spacing. An adjustment mechanism is configured to deflect the cantilevered conductor to tune a qubit frequency for the qubit device.

Abstract: Techniques for forming quantum circuits, including connections between components of quantum circuits, are presented. A trench can be formed in a dielectric material, by removing a portion of the dielectric material and a portion of conductive material layered on top of the dielectric material, to enable creation of circuit components of a circuit. The trench can define a regular nub or compensated nub to facilitate creating electrical leads connected to the circuit components on a nub. The compensated nub can comprise recessed regions to facilitate depositing material during evaporation to form the leads. For compensated nub implementation, material can be evaporated in two directions, with oxidation performed in between such evaporations, to contact leads and form a Josephson junction. For regular nub implementation, material can be evaporated in four directions, with oxidation performed in between the third and fourth evaporations, to contact leads and form a Josephson junction.

Abstract: A quantum computing device is formed using a first chip and a second chip, the first chip having a first substrate, a first set of pads, and a set of Josephson junctions disposed on the first substrate. The second chip has a second substrate, a second set of pads disposed on the second substrate opposite the first set of pads, and a second layer formed on a subset of the second set of pads. The second layer is configured to bond the first chip and the second chip. The subset of the second set of pads corresponds to a subset of the set of Josephson junctions selected to avoid frequency collision between qubits in a set of qubits. A qubit is formed using a Josephson junction from the subset of Josephson junctions and another Josephson junction not in the subset being rendered unusable for forming qubits.

Abstract: A thermalization structure is formed using a cover configured with a set of pillars, the cover being a part of a cryogenic enclosure of a low temperature device (LTD). A chip including the LTD is configured with a set of cavities, a cavity in the set of cavities having a cavity profile. A pillar from the set of pillars and corresponding to the cavity has a pillar profile such that the pillar profile causes the pillar to couple with the cavity of the cavity profile within a gap tolerance to thermally couple the chip to the cover for heat dissipation in a cryogenic operation of the chip.

Abstract: A quantum computing device is formed using a first chip and a second chip, the first chip having a first substrate, a first set of pads, and a set of Josephson junctions disposed on the first substrate. The second chip has a second substrate, a second set of pads disposed on the second substrate opposite the first set of pads, and a second layer formed on a subset of the second set of pads. The second layer is configured to bond the first chip and the second chip. The subset of the second set of pads corresponds to a subset of the set of Josephson junctions selected to avoid frequency collision between qubits in a set of qubits. A qubit is formed using a Josephson junction from the subset of Josephson junctions and another Josephson junction not in the subset being rendered unusable for forming qubits.

Abstract: A quantum computing device is formed using a first chip and a second chip, the first chip having a first substrate, a first set of pads, and a set of Josephson junctions disposed on the first substrate. The second chip has a second substrate, a second set of pads disposed on the second substrate opposite the first set of pads, and a second layer formed on a subset of the second set of pads. The second layer is configured to bond the first chip and the second chip. The subset of the second set of pads corresponds to a subset of the set of Josephson junctions selected to avoid frequency collision between qubits in a set of qubits. A qubit is formed using a Josephson junction from the subset of Josephson junctions and another Josephson junction not in the subset being rendered unusable for forming qubits.

Abstract: A device includes a first substrate formed of a first material that exhibits a threshold level of thermal conductivity. The threshold level of thermal conductivity is achieved at a cryogenic temperature range in which a quantum circuit operates. In an embodiment, the device also includes a second substrate disposed in a recess of the first substrate, the second substrate formed of a second material that exhibits a second threshold level of thermal conductivity. The second threshold level of thermal conductivity is achieved at a cryogenic temperature range in which a quantum circuit operates. In an embodiment, at least one qubit is disposed on the second substrate. In an embodiment, the device also includes a transmission line configured to carry a microwave signal between the first substrate and the second substrate.

Abstract: The technology described herein is directed towards microwave attenuators, and more particularly to a cryogenic microwave attenuator device for quantum technologies. In some embodiments, a device can comprise a cryogenic microwave attenuator device. The cryogenic microwave attenuator device can comprise: a housing component and a microwave attenuator chip, wherein the housing component can have thermal conductivity of about at least 0.1 Watts per meter-Kelvin at 1 degree Kelvin. The cryogenic microwave attenuator device can also comprise a microwave connector comprising a signal conductor that is direct wire coupled to the microwave attenuator chip.

Abstract: In an embodiment, a quantum circuit (circuit) includes a first qubit and a second qubit. In an embodiment, a quantum circuit includes a tunable microwave resonator, wherein a first applied magnetic flux is configured to tune the microwave resonator to a first frequency, the first frequency configured to activate an interaction between the first qubit and the second qubit, and wherein a second applied magnetic flux is configured to tune the microwave resonator to a second frequency, the second frequency configured to minimize an interaction between the first qubit and the second qubit.

Abstract: In an embodiment, a device includes a substrate having a thickness, wherein the thickness is a function of energy dissipation of a particle. In an embodiment, the device includes a thermal layer, formed on the substrate, of a first material that exhibits at least a threshold level of thermal conductivity, wherein the threshold level of thermal conductivity is achieved at a cryogenic temperature range in which a quantum circuit operates, and wherein any intervening material exhibits at least a second threshold level of thermal conductivity, wherein the threshold level of thermal conductivity is achieved at a cryogenic temperature range in which a quantum circuit operates.

Abstract: A qubit includes a substrate, and a first capacitor structure having a lower portion formed on a surface of the substrate and at least one first raised portion extending above the surface of the substrate. The qubit further includes a second capacitor structure having a lower portion formed on the surface of the substrate and at least one second raised portion extending above the surface of the substrate. The first capacitor structure and the second capacitor structure are formed of a superconducting material. The qubit further includes a junction between the first capacitor structure and the second capacitor structure. The junction is disposed at a predetermined distance from the surface of the substrate and has a first end in contact with the first raised portion and a second end in contact with the second raised portion.