Patents by Inventor Jesse Jones

Jesse Jones has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260096459
    Abstract: Microelectronic integrated circuit package structures include a package structure comprising a plurality of metal vias and a layer of glass surrounding the metal vias. The layer of glass has a first side and a second side opposite the first side, where the metal vias extend between the first side and the second side of the layer of glass. An edge sidewall is between the first side and the second side and defines a perimeter of the first side, the perimeter comprising four corners and the edge sidewall having a non-linear path from a first corner to a second corner of the four corners.
    Type: Application
    Filed: September 27, 2024
    Publication date: April 2, 2026
    Applicant: Intel Corporation
    Inventors: Seyyed Yahya Mousavi, Gang Duan, Jesse Jones, Minglu Liu, Mahdi Mohammadighaleni, Praveen Sreeramagiri, Srinivas Pietambaram, Brandon Marin, Jeremy Ecton
  • Publication number: 20260090428
    Abstract: Embodiments disclosed herein include an apparatus that includes a first substrate, where the first substrate comprises a glass layer, a second substrate over the first substrate, and a third substrate under the first substrate. In an embodiment, a portion of the first substrate extends past edge surfaces of the second substrate and the third substrate. In an embodiment, a layer surrounds the portion of the first substrate, where the layer comprises a tapered cross-sectional shape, and where a first sidewall that contacts the second substrate and the third substrate has a first height that is greater than a second height of a second sidewall that faces away from the second substrate and the third substrate.
    Type: Application
    Filed: September 26, 2024
    Publication date: March 26, 2026
    Inventors: Yi LI, Praveen SREERAMAGIRI, Ibrahim El KHATIB, Robin MCREE, Jesse JONES, Srinivas Venkata Ramanuja PIETAMBARAM, Gang DUAN
  • Publication number: 20260084181
    Abstract: Embodiments disclosed herein include an apparatus that includes a scraping head that has an inner cavity with open ends and an open bottom. In an embodiment, the scraping head comprises an inner wall with a port through the inner wall, and an outer wall adjacent to the inner wall. In an embodiment, a gap is provided between the inner wall and the outer wall, and a vacuum line is fluidically coupled to the gap.
    Type: Application
    Filed: September 26, 2024
    Publication date: March 26, 2026
    Inventors: Yi LI, Praveen SREERAMAGIRI, Ibrahim El KHATIB, Robin MCREE, Jesse JONES, Srinivas Venkata Ramanuja PIETAMBARAM, Gang DUAN
  • Publication number: 20260090425
    Abstract: A package substrate includes: a sheet including glass; build-up layers respectively on a top surface and on a bottom surface of the sheet; structures defining electrically conductive pathways within the sheet and within the build-up layers; and a ribbon-shaped edge structure in recesses defined at lateral edges of the sheet and defined with respect to lateral edges of the build-up layers, the ribbon-shaped edge structure extending in a direction along a thickness of the sheet, having a lateral edge surface facing away from the sheet, and comprising an edge structure material not including glass and not including metal.
    Type: Application
    Filed: September 24, 2024
    Publication date: March 26, 2026
    Applicant: Intel Corporation
    Inventors: Zheng Kang, Anqi Zhang, Yi Li, Gang Duan, Tchefor T. Ndukum, Vinith Bejugam, Jesse Jones, Srinivas Venkata Ramanuja Pietambaram, Dhruba Kumar Pattadar, Jason Bradley, AMM Golam Hasib
  • Publication number: 20260082934
    Abstract: According to the various aspects, the present methods provide for the laser-assisted dicing of semiconductor workpieces that produce semiconductor devices with glass cores having semi-transparent edges.
    Type: Application
    Filed: September 13, 2024
    Publication date: March 19, 2026
    Inventors: Praveen SREERAMAGIRI, Robin McREE, Jesse JONES, Gang DUAN, Yi LI, Ibrahim EL KHATIB, Srinivas PIETAMBARAM
  • Publication number: 20260077433
    Abstract: According to the various aspects, a present tool assembly or apparatus includes a water delivery component configured to direct water to a workpiece, and a cutting component for removing material to form cut-streets for die singulation. The present tool assembly is configured to operate to remove build-up layers and other layers from a glass core of the workpiece in a wet environment and a dry environment, at cut-street locations, and perform methods for dicing the workpiece.
    Type: Application
    Filed: September 13, 2024
    Publication date: March 19, 2026
    Inventors: Praveen SREERAMAGIRI, Robin McREE, Jesse JONES, Gang DUAN, Yi LI, Ibrahim EL KHATIB, Srinivas PIETAMBARAM, Kari HERNANDEZ, Soham AGARWAL, Benjamin DUONG, Pratyush MISHRA, Pratyasha MOHAPATRA
  • Publication number: 20260078046
    Abstract: According to the various aspects, a method is provided for dicing a semiconductor panel having a glass core with topside build-up (BU) layers, backside BU layers, and interconnects. In an aspect, a hard mask is deposited on the semiconductor panel and patterned to form openings for a plurality of cut-streets. In an aspect, the dicing of the semiconductor panel includes using plasma dicing steps to form cut-streets through the topside BU layers and the backside BU layers, and using a mechanical sawing step or plasma dicing step to cut through the glass core. In another aspect, the dicing of the semiconductor panel further includes using an acid rinse to remove metal salts when cutting through the glass core during the plasma dicing step. In another aspect, a singulated die may have a first BU sidewall and a second BU sidewall having a morphology that includes semi-sphere fillers.
    Type: Application
    Filed: September 18, 2024
    Publication date: March 19, 2026
    Inventors: Wei WEI, Xiyu HU, Xiao LIU, Haobo CHEN, Bohan SHAN, Xiaoying GUO, Gang DUAN, Srinivas PIETAMBARAM, Hiroki TANAKA, Hongxia FENG, Praveen SREERAMAGIRI, Christy PRATHER, Jesse JONES, Leonel ARANA, Rahul MANEPALLI
  • Patent number: 12568831
    Abstract: A die assembly is disclosed. The die assembly includes a die, one or more die pads on a first surface of the die and a die attach film on the die where the die attach film includes one or more openings that expose the one or more die pads and that extend to one or more edges of the die.
    Type: Grant
    Filed: November 17, 2023
    Date of Patent: March 3, 2026
    Assignee: Intel Corporation
    Inventors: Bai Nie, Gang Duan, Srinivas Pietambaram, Jesse Jones, Yosuke Kanaoka, Hongxia Feng, Dingying Xu, Rahul Manepalli, Sameer Paital, Kristof Darmawikarta, Yonggang Li, Meizi Jiao, Chong Zhang, Matthew Tingey, Jung Kyu Han, Haobo Chen
  • Publication number: 20260005186
    Abstract: There may be provided a system that includes a workpiece-support assembly with a platform. The system may further include an alignment-detection assembly with an optical sensor oriented towards the platform. The system may further include a handling assembly with at least one manipulator positioned along at least a first movement plane that is substantially parallel with the platform or at least a second movement plane that is substantially perpendicular to the platform. The system may further include a bonding assembly with a dispenser positioned over the platform. The system may further include a fiducial-marking assembly with a drill oriented towards the platform. The system may further include a controller electrically connected to each of the optical sensor, the at least one manipulator, the dispenser, and the drill.
    Type: Application
    Filed: June 28, 2024
    Publication date: January 1, 2026
    Inventors: Yi LI, Brandon MARIN, Zhixin XIE, Praveen SREERAMAGIRI, Ibrahim EL KHATIB, Robin McREE, Jesse JONES, Srinivas PIETAMBARAM, Gang DUAN, Manohar KONCHADY
  • Publication number: 20260001297
    Abstract: Embodiments disclosed herein include an apparatus that comprises a substrate. In an embodiment, the substrate comprises a glass layer. In an embodiment, a frame is provided around a perimeter of the substrate. In an embodiment, the frame is over a top surface, a bottom surface, and a sidewall surface of the substrate. In an embodiment, the frame comprises a conductive material.
    Type: Application
    Filed: June 26, 2024
    Publication date: January 1, 2026
    Inventors: Hiroki TANAKA, Robert Alan MAY, Whitney BRYKS, Srinivas Venkata Ramanuja PIETAMBARAM, Gang DUAN, Jesse JONES, Bohan SHAN, Bai NIE, Benjamin DUONG, Haobo CHEN, Brandon C. MARIN
  • Publication number: 20260005042
    Abstract: There may be provided a system. The system may include a workpiece-support assembly that includes a platform positioned alongside a singulation axis of the system. The system may further include a material-removal assembly that includes a cutter, the cutter positioned over the platform and aligned with the singulation axis. The system may further include an irradiation assembly that includes a laser source oriented towards the singulation axis. The system may further include a separation assembly that includes a separation tool. The separation tool may include a first workpiece-engagement member positioned over a first portion of the platform at a first side of the singulation axis and a second workpiece-engagement member positioned over a second portion of the platform at an opposite side of the singulation axis, or an optical source oriented towards the singulation axis.
    Type: Application
    Filed: June 28, 2024
    Publication date: January 1, 2026
    Inventors: Praveen SREERAMAGIRI, Ibrahim El KHATIB, Yi LI, Robin McREE, Jesse JONES, Gang DUAN, Manohar KONCHADY, Srinivas PIETAMBARAM, Yekan WANG, Andrew JIMENEZ, Aaron GARELICK
  • Publication number: 20260005081
    Abstract: Hybrid glass and organic substrates, devices and systems formed thereon, and methods of forming the same, are disclosed herein. In one example, a substrate includes a glass layer and an organic frame around the glass layer, where the organic frame includes a polyimide.
    Type: Application
    Filed: June 28, 2024
    Publication date: January 1, 2026
    Applicant: Intel Corporation
    Inventors: Ehsan Zamani, Seyyed Yahya Mousavi, Manohar Konchady, Whitney M. Bryks, Yi Cao, Gang Duan, Darko Grujicic, Thomas S. Heaton, Andrew Matthew Jimenez, Jesse Jones, Shayan Kaviani, Jieying Kong, Shuqi Lai, Yi Li, Minglu Liu, Sandrine Lteif, Mahdi Mohammadighaleni, Tchefor T. Ndukum, Son Van Nguyen, Srinivas Venkata Ramanuja Pietambaram, Dilan Seneviratne, Rengarajan Shanmugam, Joshua J. Stacey, Elham Tavakoli, David Vickery, Marcel A. Wall, Yekan Wang, Anqi Zhang, James Kayode Ofuegbe, Zhixin Xie, Jung Kyu Han
  • Publication number: 20260001805
    Abstract: According to the various aspects, a hybrid panel assembly includes an edge coated glass panel that is formed using a glass panel having peripheral edges and an adhesive coating layer deposited on the peripheral edges of the glass panel. The edge coated glass panel is a subcomponent for the construction of the hybrid panel assembly. A frame is provided to surround the edge coated glass panel and the adhesive coating layer bonds the frame to the glass panel to complete the construction of the hybrid panel assembly. In an aspect, the adhesive coating layer may be deposited by a coating roller and cured by a UV source.
    Type: Application
    Filed: June 27, 2024
    Publication date: January 1, 2026
    Inventors: Yi LI, Praveen SREERAMAGIRI, Ibrahim El KHATIB, Robin McREE, Jesse JONES, Srinivas PIETAMBARAM, Gang DUAN
  • Publication number: 20250323166
    Abstract: Embodiments include an electronic package with an embedded multi-interconnect bridge (EMIB) and methods of making such packages. Embodiments include a first layer, that is an organic material and a second layer disposed over the first layer. In an embodiment, a cavity is formed through the second layer to expose a first surface of the first layer. A bridge substrate is in the cavity and is supported by the first surface of the first layer. Embodiments include a first die over the second layer that is electrically coupled to a first contact on the bridge substrate, and a second die over the second layer that is electrically coupled to a second contact on the bridge substrate. In an embodiment the first die is electrically coupled to the second die by the bridge substrate.
    Type: Application
    Filed: June 23, 2025
    Publication date: October 16, 2025
    Applicant: Intel Corporation
    Inventors: Kristof DARMAWIKARTA, Hiroki TANAKA, Robert MAY, Sameer PAITAL, Bai NIE, Jesse JONES, Chung Kwang Christopher TAN
  • Patent number: 12354963
    Abstract: Embodiments include an electronic package with an embedded multi-interconnect bridge (EMIB) and methods of making such packages. Embodiments include a first layer, that is an organic material and a second layer disposed over the first layer. In an embodiment, a cavity is formed through the second layer to expose a first surface of the first layer. A bridge substrate is in the cavity and is supported by the first surface of the first layer. Embodiments include a first die over the second layer that is electrically coupled to a first contact on the bridge substrate, and a second die over the second layer that is electrically coupled to a second contact on the bridge substrate. In an embodiment the first die is electrically coupled to the second die by the bridge substrate.
    Type: Grant
    Filed: March 29, 2024
    Date of Patent: July 8, 2025
    Assignee: Intel Corporation
    Inventors: Kristof Darmawikarta, Hiroki Tanaka, Robert May, Sameer Paital, Bai Nie, Jesse Jones, Chung Kwang Christopher Tan
  • Publication number: 20250210586
    Abstract: Processes and process equipment for modifying edges of semiconductor package substrates, and semiconductor package substrates having modified edges are provided. The processes and process equipment are especially useful for semiconductor package substrates that have cores that can crack or chip during processing, such as, for example, cores comprised of glass. Semiconductor package substrates having glass cores and modified edges are also provided.
    Type: Application
    Filed: December 26, 2023
    Publication date: June 26, 2025
    Inventors: Praveen SREERAMAGIRI, Ibrahim EL KHATIB, Yi LI, Robin McRee, Jesse JONES, Whitney M. BRYKS, Gang DUAN, Aaron Michael GARELICK, Zheng KANG, Anqi ZHANG, Tchefor NDUKUM, Yonggang LI, Srinivas PIETAMBARAM
  • Patent number: 12334443
    Abstract: Embodiments include an electronic package with an embedded multi-interconnect bridge (EMIB) and methods of making such packages. Embodiments include a first layer, that is an organic material and a second layer disposed over the first layer. In an embodiment, a cavity is formed through the second layer to expose a first surface of the first layer. A bridge substrate is in the cavity and is supported by the first surface of the first layer. Embodiments include a first die over the second layer that is electrically coupled to a first contact on the bridge substrate, and a second die over the second layer that is electrically coupled to a second contact on the bridge substrate. In an embodiment the first die is electrically coupled to the second die by the bridge substrate.
    Type: Grant
    Filed: February 6, 2024
    Date of Patent: June 17, 2025
    Assignee: Intel Corporation
    Inventors: Kristof Darmawikarta, Hiroki Tanaka, Robert May, Sameer Paital, Bai Nie, Jesse Jones, Chung Kwang Christopher Tan
  • Publication number: 20250144857
    Abstract: Various aspects may provide a molding system. The molding system may include a molding unit which includes a first mold panel and a second mold panel. The first mold panel and the second mold panel may include a mold cavity which surrounds a semiconductor workpiece along a side surface of the semiconductor workpiece, with the first mold panel and the second mold panel engaged with the semiconductor workpiece. Various aspects may also provide a molding method which utilize the molding system.
    Type: Application
    Filed: November 2, 2023
    Publication date: May 8, 2025
    Inventors: Zhixin XIE, Yi LI, Jesse JONES, Gang DUAN, Andrew JIMENEZ, Jung Kyu HAN, Yekan WANG
  • Publication number: 20250112140
    Abstract: Embodiments disclosed herein include package substrates with a glass core. In an embodiment, an apparatus comprises a core with a first width, and the core comprises a glass layer. In an embodiment, a via is provided through a thickness of the core, where the via is electrically conductive. In an embodiment, a first layer is provided over the core, where the first layer comprises a second width that is smaller than the first width. In an embodiment, a second layer is provided under the core, where the second layer comprises a third width that is smaller than the first width.
    Type: Application
    Filed: September 28, 2023
    Publication date: April 3, 2025
    Inventors: Rahul BHURE, Mitchell PAGE, Joseph PEOPLES, Jieying KONG, Nicholas S. HAEHN, Astitva TRIPATHI, Bainye Francoise ANGOUA, Yosef KORNBLUTH, Daniel ROSALES-YEOMANS, Joshua STACEY, Aaditya Anand CANDADAI, Yonggang Yong LI, Tchefor NDUKUM, Scott COATNEY, Gang DUAN, Jesse JONES, Srinivas Venkata Ramanuja PIETAMBARAM, Dilan SENEVIRATNE, Matthew ANDERSON
  • Publication number: 20250112136
    Abstract: Embodiments disclosed herein include apparatuses with glass core package substrates. In an embodiment, an apparatus comprises a substrate with a first surface and a second surface opposite from the first surface. A sidewall is between the first surface and the second surface, and the substrate comprises a glass layer. In an embodiment, a via is provided through the substrate between the first surface and the second surface, and the via is electrically conductive. In an embodiment, a layer in contact with the sidewall of the substrate surrounds a perimeter of the substrate.
    Type: Application
    Filed: September 29, 2023
    Publication date: April 3, 2025
    Inventors: Bohan SHAN, Jesse JONES, Zhixin XIE, Bai NIE, Shaojiang CHEN, Joshua STACEY, Mitchell PAGE, Brandon C. MARIN, Jeremy D. ECTON, Nicholas S. HAEHN, Astitva TRIPATHI, Yuqin LI, Edvin CETEGEN, Jason M. GAMBA, Jacob VEHONSKY, Jianyong MO, Makoyi WATSON, Shripad GOKHALE, Mine KAYA, Kartik SRINIVASAN, Haobo CHEN, Ziyin LIN, Kyle ARRINGTON, Jose WAIMIN, Ryan CARRAZZONE, Hongxia FENG, Srinivas Venkata Ramanuja PIETAMBARAM, Gang DUAN, Dingying David XU, Hiroki TANAKA, Ashay DANI, Praveen SREERAMAGIRI, Yi LI, Ibrahim EL KHATIB, Aaron GARELICK, Robin MCREE, Hassan AJAMI, Yekan WANG, Andrew JIMENEZ, Jung Kyu HAN, Hanyu SONG, Yonggang Yong LI, Mahdi MOHAMMADIGHALENI, Whitney BRYKS, Shuqi LAI, Jieying KONG, Thomas HEATON, Dilan SENEVIRATNE, Yiqun BAI, Bin MU, Mohit GUPTA, Xiaoying GUO