Abstract: One or more embodiments of this disclosure provide an image output method. The image output method includes receiving image data for a plurality of image frames and caption data linked with the plurality of image frames. The method also includes outputting parsing the caption data to extract link information according to a data type from the caption data. The method also includes outputting a connection object or a list, for verifying the link information while the plurality of image frames are output on a display of the electronic device.

Abstract: A method for fabricating a semiconductor device includes: forming a mold stack pattern including a plurality of openings in an upper portion of a substrate and including a mold layer and a supporter layer which are stacked; forming a bottom electrode layer filling the plurality of the openings and covering the supporter layer; forming a filler portion disposed inside the plurality of the openings, a barrier portion extended upwardly from the filler portion, and an electrode cutting portion exposing a surface of the supporter layer by selectively etching the bottom electrode layer; forming a supporter by using the barrier portion as an etch barrier and etching the supporter layer exposed by the electrode cutting portion; selectively removing the barrier portion to form a hybrid pillar-type bottom electrode disposed inside the plurality of the openings; and removing the mold layer.

Abstract: Disclosed herein is an electric double layer device including a urethane potting unit (50) for filling the gap between a portion of a first terminal (21) that is exposed out of a rubber cap (40) and a first through hole (41) and the gap between a portion of a second terminal (22) that is exposed out of the rubber cap and a second through hole (42), wherein an aluminum terminal (A) constituting each of the first terminal (21) and the second terminal (22) is anodized such that an aluminum oxide film (Al) is formed on the aluminum terminal, whereby the lifespan of the electric double layer device is relatively increased.

Abstract: An electronic device and method thereof are provided. The electronic device includes a display; and a processor configured to control the display, wherein the processor is further configured to identify a condition for updating a channel, compare the condition for updating the channel to a predetermined condition, determine whether to update the channel based on a result of the comparison, and control the display to display information relating to updating the channel. The method includes identifying a condition for updating a channel; comparing the condition for updating the channel to a predetermined condition; determining whether to update the channel based on a result of the comparison; and displaying information relating to updating the channel.

Abstract: Provided is an electronic device including a switching element, wherein the switching element may include a first electrode, a second electrode, a switching layer interposed between the first and second electrodes, and a first amorphous semiconductor layer interposed between the first electrode and the switching layer.

Abstract: An electronic device according to an implementation of the disclosed technology is an electronic device including a semiconductor memory, wherein the semiconductor memory includes: interlayer insulating layers and conductive first base layer patterns that are alternatively stacked over a substrate; a dielectric second base layer pattern that is in contact with sidewalls of the interlayer insulating layers; first electrodes that are in contact with sidewalls of the first base layer patterns; a second electrode disposed over outer sidewalls of the first electrodes; and a variable resistance layer pattern interposed between the first electrodes and the second electrode. Each of the first electrodes comprises an alloy that includes first and second elements. The first element is included in the first base layer patterns and the second element is included in the second base layer pattern.

Abstract: One or more embodiments of this disclosure provide an image output method. The image output method includes receiving image data for a plurality of image frames and caption data linked with the plurality of image frames. The method also includes outputting parsing the caption data to extract link information according to a data type from the caption data. The method also includes outputting a connection object or a list, for verifying the link information while the plurality of image frames are output on a display of the electronic device.

Abstract: An electronic device includes a semiconductor memory. The semiconductor memory includes a plurality of first lines extending in a first direction, a plurality of second lines extending in a second direction crossing the first direction, a resistance variable layer interposed between the first lines and the second lines, a tunnel barrier layer interposed between the resistance variable layer and the first lines, and an intermediate electrode layer interposed between the resistance variable layer and the tunnel barrier layer. The tunnel barrier layer and the intermediate electrode layer overlap with at least two neighboring intersection regions of the first lines and the second lines.

Abstract: A semiconductor device includes a first conductive layer, a second conductive layer spaced from the first conductive layer, a variable resistance layer interposed between the first and second conductive layers, and an impurity-doped layer provided over a side surface of the variable resistance layer. The variable resistance layer has a smaller width than the first and the second conductive layers.

Abstract: Provided is an electronic device including a switching element, wherein the switching element may include a first electrode, a second electrode, a switching layer interposed between the first and second electrodes, and a first amorphous semiconductor layer interposed between the first electrode and the switching layer.

Abstract: An electronic device and method thereof are provided. The electronic device includes a display; and a processor configured to control the display, wherein the processor is further configured to identify a condition for updating a channel, compare the condition for updating the channel to a predetermined condition, determine whether to update the channel based on a result of the comparison, and control the display to display information relating to updating the channel. The method includes identifying a condition for updating a channel; comparing the condition for updating the channel to a predetermined condition; determining whether to update the channel based on a result of the comparison; and displaying information relating to updating the channel.

Abstract: An electronic device includes a semiconductor memory. The semiconductor memory includes a plurality of first lines extending in a first direction, a plurality of second lines extending in a second direction crossing the first direction, a resistance variable layer interposed between the first lines and the second lines, a tunnel barrier layer interposed between the resistance variable layer and the first lines, and an intermediate electrode layer interposed between the resistance variable layer and the tunnel barrier layer. The tunnel barrier layer and the intermediate electrode layer overlap with at least two neighboring intersection regions of the first lines and the second lines.

Abstract: An electronic device includes a switch element. The switch element includes a first electrode including a first metal nitride which is conductive, a second electrode, a switching layer interposed between the first electrode and the second electrode, and a first barrier layer which is interposed between the first electrode and the switching layer and includes a second metal nitride which is insulative, wherein a metal in the first metal nitride is the same as a metal in the second metal nitride, and a metal-to-nitrogen bonding ratio of the first metal nitride is different from a metal-to-nitrogen bonding ratio of the second metal nitride.

Abstract: An electronic device includes a semiconductor memory. The semiconductor memory includes a plurality of first lines extending in a first direction, a plurality of second lines extending in a second direction crossing the first direction, a resistance variable layer interposed between the first lines and the second lines, a tunnel barrier layer interposed between the resistance variable layer and the first lines, and an intermediate electrode layer interposed between the resistance variable layer and the tunnel barrier layer. The tunnel barrier layer and the intermediate electrode layer overlap with at least two neighboring intersection regions of the first lines and the second lines.

Abstract: A semiconductor device includes a first conductive layer, a second conductive layer spaced from the first conductive layer, a variable resistance layer interposed between the first and second conductive layers, and an impurity-doped layer provided over a side surface of the variable resistance layer. The variable resistance layer has a smaller width than the first and the second conductive layers.

Abstract: Disclosed herein are a variable resistance memory device and a method of fabricating the same. The variable resistance memory device may include a first electrode; a second electrode; and a variable resistance layer configured to be interposed between the first electrode and the second electrode, wherein the variable resistance layer includes a Si-added metal oxide.

Abstract: A semiconductor device includes a gate stacked structure including a gate dielectric layer over a semiconductor substrate, a metal layer formed over the gate dielectric layer, and a capping layer formed over the metal layer, where the capping layer includes a chemical element with a higher concentration at an interface between the capping layer and the metal layer than another region of the capping layer and the chemical element is operable to control an effective work function (eWF) of the gate stacked structure.

Abstract: A semiconductor device includes a first conductive layer, a second conductive layer spaced from the first conductive layer, a variable resistance layer interposed between the first and second conductive layers, and an impurity-doped layer provided over a side surface of the variable resistance layer. The variable resistance layer has a smaller width than the first and the second conductive layers.

Abstract: A semiconductor device includes a dielectric layer in which zirconium, hafnium, and a IV group element are mixed. A method for fabricating a capacitor includes forming a bottom electrode, forming the dielectric layer and forming a top electrode over the dielectric layer.

Abstract: An electronic device includes a switch element. The switch element includes a first electrode including a first metal nitride which is conductive, a second electrode, a switching layer interposed between the first electrode and the second electrode, and a first barrier layer which is interposed between the first electrode and the switching layer and includes a second metal nitride which is insulative, wherein a metal in the first metal nitride is the same as a metal in the second metal nitride, and a metal-to-nitrogen bonding ratio of the first metal nitride is different from a metal-to-nitrogen bonding ratio of the second metal nitride.