Abstract: A method and an electronic device for translating a speech signal between a first language and a second language with minimized translation delay by translating fewer than all words of the speech signal according to a level of understanding of the second language by a user that receives the translation.

Abstract: Disclosed are a method for manufacturing a secondary battery pouch film having at least an outer layer, a metal layer, a primer layer, and a sealant layer, or at least an outer layer, a metal layer, a primer layer, a melt-extrusion resin layer, and a sealant layer in this order, the method including: a drying process of applying and heating a primer layer composition on the metal layer so as to dry the primer layer composition and cure at least a part of the primer layer composition. The organic solvent-based emulsion composition contains acid-modified polypropylene and a curing agent and has a curing start temperature of 150° C. or lower, preferably 135° C. to 150° C., and a drying process temperature of 150° C. or lower, preferably 135° C. to 150° C. The method is not subjected to a thermal lamination process when laminating sealant layer.

Abstract: A tip applicator is provided. The tip applicator according to one embodiment captures and applies a cosmetic on skin, and includes an application portion including an application surface for capturing and applying the cosmetic on a skin of a user, the application surface being formed in a surface of the application portion; a support portion which is connected to one side of the application portion to support the application portion; and a capture amount control portion which is formed on the application surface and changes a capture amount of the cosmetic captured by the application surface.

Abstract: The present invention relates to a Myoviridae bacteriophage Aer-HYP-3 (Accession number: KCTC 13479BP) isolated from nature, which has the ability to kill Aeromonas hydrophila bacteria and has the genome represented by SEQ ID NO: 1, and to a method of preventing and treating a disease caused by Aeromonas hydrophila bacteria using a composition containing the same as an active ingredient.

Abstract: Image sensors are provided. The image sensors may include a substrate including first, second, third and fourth regions, a first photoelectric conversion element in the first region, a second photoelectric conversion element in the second region, a third photoelectric conversion element in the third region, a fourth photoelectric conversion element in the fourth region, a first microlens at least partially overlapping both the first and second photoelectric conversion elements, and a second microlens at least partially overlapping both the third and fourth photoelectric conversion elements. The image sensors may also include a floating diffusion region and first, second and third pixel transistors configured to perform different functions from each other. Each of the first, second and third pixel transistors may be disposed in at least one of first, second, third and fourth pixel regions. The first pixel transistor may include multiple first pixel transistors.

Abstract: Image sensors are provided. The image sensors may include a substrate including first, second, third and fourth regions, a first photoelectric conversion element in the first region, a second photoelectric conversion element in the second region, a third photoelectric conversion element in the third region, a fourth photoelectric conversion element in the fourth region, a first microlens at least partially overlapping both the first and second photoelectric conversion elements, and a second microlens at least partially overlapping both the third and fourth photoelectric conversion elements. The image sensors may also include a floating diffusion region and first, second and third pixel transistors configured to perform different functions from each other. Each of the first, second and third pixel transistors may be disposed in at least one of first, second, third and fourth pixel regions. The first pixel transistor may include multiple first pixel transistors.

Abstract: Provided is a semiconductor device including a substrate including an active region, transistors on the substrate, a first interlayer insulating layer and a second interlayer insulating layer on the transistors, a first interconnection line in an upper portion of the first interlayer insulating layer, and a second interconnection line in the second interlayer insulating layer, wherein the first interconnection line includes a first barrier pattern, a first liner, and a first conductive pattern, wherein the second interconnection line includes a second barrier pattern, a second liner, and a second conductive pattern, wherein first height between an uppermost portion of a top surface of the first conductive pattern and a lowermost portion of a top surface of the first liner is greater than a second height between an uppermost portion of a top surface of the second conductive pattern and a lowermost portion of a top surface of the second liner.

Abstract: A semiconductor device is provided. The semiconductor device includes: a lower line structure; an upper interlayer insulating film provided on the lower line structure and having a trench formed therein, wherein the trench includes a wiring line trench and a via trench extending from the wiring line trench to the lower line structure; and an upper line structure provided in the line trench, wherein the upper line structure includes an upper barrier film and an upper filling film. The upper filling film includes a first sub-filling film in contact with the upper interlayer insulating film, and a second sub-filling film provided on the first sub-filling film. The first sub-filling film fills an entirety of the upper via trench and covers at least a portion of a bottom surface of the upper wiring line trench.

Abstract: The present disclosure provides a semiconductor device capable of improving element performance and reliability. The semiconductor device comprises a lower wiring structure, an upper interlayer insulating layer disposed on the lower wiring structure and including an upper wiring trench, the upper wiring trench exposing a portion of the lower wiring structure, and an upper wiring structure including an upper liner and an upper filling layer on the upper liner in the upper wiring trench, wherein the upper liner includes a sidewall portion extending along a sidewall of the upper wiring trench and a bottom portion extending along a bottom surface of the upper wiring trench, the sidewall portion of the upper liner includes cobalt (Co) and ruthenium (Ru), and the bottom portion of the upper liner is formed of cobalt (Co).

Abstract: Image sensors are provided. The image sensors may include a substrate including first, second, third and fourth regions, a first photoelectric conversion element in the first region, a second photoelectric conversion element in the second region, a third photoelectric conversion element in the third region, a fourth photoelectric conversion element in the fourth region, a first microlens at least partially overlapping both the first and second photoelectric conversion elements, and a second microlens at least partially overlapping both the third and fourth photoelectric conversion elements. The image sensors may also include a floating diffusion region and first, second and third pixel transistors configured to perform different functions from each other. Each of the first, second and third pixel transistors may be disposed in at least one of first, second, third and fourth pixel regions. The first pixel transistor may include multiple first pixel transistors.

Abstract: Semiconductor devices includes a first interlayer insulating layer, a lower interconnection line in the first interlayer insulating layer, an etch stop layer on the first interlayer insulating layer and the lower interconnection line, a second interlayer insulating layer on the etch stop layer, and an upper interconnection line in the second interlayer insulating layer. The upper interconnection line includes a via portion extending through the etch stop layer and contacting the lower interconnection line. The via portion includes a barrier pattern and a conductive pattern. The barrier pattern includes a first barrier layer between the conductive pattern and the second interlayer insulating layer, and a second barrier layer between the conductive pattern and the lower interconnection line. A resistivity of the first barrier layer is greater than that of the second barrier layer. A nitrogen concentration of the first barrier layer is greater than that of the second barrier layer.

Abstract: Semiconductor devices includes a first interlayer insulating layer, a lower interconnection line in the first interlayer insulating layer, an etch stop layer on the first interlayer insulating layer and the lower interconnection line, a second interlayer insulating layer on the etch stop layer, and an upper interconnection line in the second interlayer insulating layer. The upper interconnection line includes a via portion extending through the etch stop layer and contacting the lower interconnection line. The via portion includes a barrier pattern and a conductive pattern. The barrier pattern includes a first barrier layer between the conductive pattern and the second interlayer insulating layer, and a second barrier layer between the conductive pattern and the lower interconnection line. A resistivity of the first barrier layer is greater than that of the second barrier layer. A nitrogen concentration of the first barrier layer is greater than that of the second barrier layer.

Abstract: Image sensors are provided. The image sensors may include a substrate including first, second, third and fourth regions, a first photoelectric conversion element in the first region, a second photoelectric conversion element in the second region, a third photoelectric conversion element in the third region, a fourth photoelectric conversion element in the fourth region, a first microlens at least partially overlapping both the first and second photoelectric conversion elements, and a second microlens at least partially overlapping both the third and fourth photoelectric conversion elements. The image sensors may also include a floating diffusion region and first, second and third pixel transistors configured to perform different functions from each other. Each of the first, second and third pixel transistors may be disposed in at least one of first, second, third and fourth pixel regions. The first pixel transistor may include multiple first pixel transistors.

Abstract: A semiconductor device includes a first interlayer insulating film disposed on a substrate and having a first trench. A first lower conductive pattern fills the first trench and includes first and second valley areas that are spaced apart from each other in a first direction parallel to an upper surface of the substrate. The first and second valley areas are recessed toward the substrate. A second interlayer insulating film is disposed on the first interlayer insulating film and includes a second trench that exposes at least a portion of the first lower conductive pattern. An upper conductive pattern fills the second trench and includes an upper barrier film and an upper filling film disposed on the upper barrier film. The upper conductive pattern at least partially fills the first valley area.

Abstract: An image sensor includes a substrate with a first surface opposite a second surface, a pixel isolation pattern defining first and second unit pixels adjacent to each other in the substrate, and first and second separation patterns in the substrate. The first unit pixel includes first and second photoelectric conversion parts along a first direction. The second unit pixel includes third and fourth photoelectric conversion parts along a second direction intersecting the first direction. The first separation pattern extends in the second direction between the first and second photoelectric conversion parts. The second separation pattern extends in the first direction between the third and fourth photoelectric conversion parts. A width of the pixel isolation pattern, a width of the first separation pattern, and a width of the second separation pattern each decrease from the second surface of the substrate toward the first surface of the substrate.

Abstract: A semiconductor device includes a first interlayer insulating film disposed on a substrate and having a first trench. A first lower conductive pattern fills the first trench and includes first and second valley areas that are spaced apart from each other in a first direction parallel to an upper surface of the substrate. The first and second valley areas are recessed toward the substrate. A second interlayer insulating film is disposed on the first interlayer insulating film and includes a second trench that exposes at least a portion of the first lower conductive pattern. An upper conductive pattern fills the second trench and includes an upper barrier film and an upper filling film disposed on the upper barrier film. The upper conductive pattern at least partially fills the first valley area.

Abstract: The present invention relates to Siphoviridae bacteriophage Vib-ANP-1(accession number KCTC 13075BP) having the ability to specifically kill Vibrio anguillarum bacteria and a genome represented by SEQ ID NO: 1 and isolated from nature, and a method for prevention or treatment of Vibrio anguillarum bacterial infection by using a composition containing the same bacteriophage as an effective ingredient.

Abstract: A coil component includes: a body; a coil unit disposed in the body; a support substrate unit in contact with the coil unit to support the coil unit, and including first and second support substrates spaced apart from and oppose each other; and first and second external electrodes disposed on a first surface of the body and spaced apart from each other, and respectively connected to the coil unit.

Abstract: A semiconductor device includes transistors on a substrate, a first interlayered insulating layer on the transistors, first and second lower interconnection lines in an upper portion of the first interlayered insulating layer, and first and second vias on the first and second lower interconnection lines, respectively. Each of the first and second lower interconnection lines includes a first metal pattern. The first lower interconnection line further includes a second metal pattern, on the first metal pattern with a metallic material different from the first metal pattern. The second metal pattern is absent in the second lower interconnection line. The second via includes first and second portions, which are in contact with respective top surfaces of the first interlayered insulating layer and the second lower interconnection line, and the lowest level of a bottom surface of the second portion is lower than that of a bottom surface of the first via.

Abstract: A coil component includes: a body having first and second surfaces facing each other, third and fourth surfaces connecting the first and second surfaces and facing each other, and fifth and sixth surfaces connecting the first to fourth surfaces and facing each other; an insulating substrate disposed inside the body; a coil portion disposed on at least one surface of the insulating substrate, connected to a coil portion and an end portion connected to the coil pattern, and including a lead-out portion where one surface is exposed externally of the body; and first and second external electrodes covering the lead-out portion exposed externally of the body. The first external electrode is disposed on at least a portion of each of the first, third, fifth and sixth surfaces, and the second external electrode is disposed on at least a portion of each of the second, third, fifth, and sixth surfaces.