Abstract: It is disclosed a blood glucose prediction system and method using saliva-based artificial intelligence deep learning technique.

Abstract: A semiconductor package includes a semiconductor chip having an active surface on which a connection pad is disposed and an inactive surface opposing the active surface, and a first encapsulant covering at least a portion of each of the inactive surface and a side surface of the semiconductor chip. A metal layer is disposed on the first encapsulant, and includes a first conductive layer and a second conductive layer, sequentially stacked. A connection structure is disposed on the active surface of the semiconductor chip, and includes a first redistribution layer electrically connected to the connection pad. A lower surface of the first conductive layer is in contact with the first encapsulant and has first surface roughness, and an upper surface of the first conductive layer is in contact with the second conductive layer and has second surface roughness smaller than the first surface roughness.

Abstract: A semiconductor package includes a semiconductor chip having an active surface on which a connection pad is disposed and an inactive surface opposing the active surface, and a first encapsulant covering at least a portion of each of the inactive surface and a side surface of the semiconductor chip. A metal layer is disposed on the first encapsulant, and includes a first conductive layer and a second conductive layer, sequentially stacked. A connection structure is disposed on the active surface of the semiconductor chip, and includes a first redistribution layer electrically connected to the connection pad. A lower surface of the first conductive layer is in contact with the first encapsulant and has first surface roughness, and an upper surface of the first conductive layer is in contact with the second conductive layer and has second surface roughness smaller than the first surface roughness.

Abstract: A semiconductor package includes a semiconductor chip having an active surface on which a connection pad is disposed and an inactive surface opposing the active surface, and a first encapsulant covering at least a portion of each of the inactive surface and a side surface of the semiconductor chip. A metal layer is disposed on the first encapsulant, and includes a first conductive layer and a second conductive layer, sequentially stacked. A connection structure is disposed on the active surface of the semiconductor chip, and includes a first redistribution layer electrically connected to the connection pad. A lower surface of the first conductive layer is in contact with the first encapsulant and has first surface roughness, and an upper surface of the first conductive layer is in contact with the second conductive layer and has second surface roughness smaller than the first surface roughness.

Abstract: An antenna module includes: a base substrate including a rigid region and a flexible region; an antenna member disposed on one surface of the rigid region of the base substrate and including antenna patterns; and a semiconductor package disposed on the other surface of the rigid region of the base substrate and including one or more semiconductor chips.

Abstract: A semiconductor package includes a connection structure including one or more redistribution layers, a semiconductor chip disposed on the connection structure and electrically connected to the one or more redistribution layers, an encapsulant disposed on the connection structure and covering at least a portion of the semiconductor chip, and a shielding structure covering at least a portion of the encapsulant. The shielding structure includes a conductive pattern layer having a plurality of openings, a first metal layer covering the conductive pattern layer and extending across the plurality of openings, and a second metal layer covering the first metal layer. The second metal layer has a thickness greater than a thickness of the first metal layer.

Abstract: A fan-out semiconductor package includes a frame comprising a plurality of wiring layers electrically connected to one another, and having a recessed portion having a stopper layer 112aM disposed on a bottom surface of the recessed portion, and a through-hole penetrating through the stopper layer; a semiconductor chip having an active surface on which a connection pad is disposed and an inactive surface opposing the active surface, and disposed in the recessed portion such that the inactive surface opposes the stopper layer; an encapsulant covering at least portions of the frame and the inactive surface of the semiconductor chip, and filling at least a portion of the recessed portion; and an interconnect structure disposed on the frame and the active surface of the semiconductor chip, and comprising a redistribution layer electrically connected to the plurality of wiring layers and the connection pad.

Abstract: A fan-out sensor package includes: a redistribution portion having a through-hole and including a wiring layer and vias; a first semiconductor chip having an active surface having a sensing region of which at least a portion is exposed through the through-hole and first connection pads disposed in the vicinity of the sensing region; a second semiconductor chip disposed side by side with the first semiconductor chip in a horizontal direction and having second connection pads; dam members disposed in the vicinity of the first connection pads; an encapsulant encapsulating the redistribution portion, the first semiconductor chip, and the second semiconductor chip; and electrical connection structures electrically connecting the first connection pads and the second connection pads to the wiring layer or the vias of the redistribution portion.

Abstract: A semiconductor package includes a semiconductor chip having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface, an encapsulant encapsulating at least a portion of the semiconductor chip, and a connection member disposed on the active surface of the semiconductor chip and including a redistribution layer and a via electrically connected to the connection pads of the semiconductor chip, wherein at least a portion of the redistribution layer and the via is formed of a metal layer having a concave portion depressed from a lower surface thereof and filled with an insulating material.

Abstract: A semiconductor package includes a connection structure including one or more redistribution layers, a semiconductor chip disposed on the connection structure and electrically connected to the one or more redistribution layers, an encapsulant disposed on the connection structure and covering at least a portion of the semiconductor chip, and a shielding structure covering at least a portion of the encapsulant. The shielding structure includes a conductive pattern layer having a plurality of openings, a first metal layer covering the conductive pattern layer and extending across the plurality of openings, and a second metal layer covering the first metal layer. The second metal layer has a thickness greater than a thickness of the first metal layer.

Abstract: A semiconductor package includes a semiconductor chip having an active surface on which a connection pad is disposed and an inactive surface opposing the active surface, and a first encapsulant covering at least a portion of each of the inactive surface and a side surface of the semiconductor chip. A metal layer is disposed on the first encapsulant, and includes a first conductive layer and a second conductive layer, sequentially stacked. A connection structure is disposed on the active surface of the semiconductor chip, and includes a first redistribution layer electrically connected to the connection pad. A lower surface of the first conductive layer is in contact with the first encapsulant and has first surface roughness, and an upper surface of the first conductive layer is in contact with the second conductive layer and has second surface roughness smaller than the first surface roughness.

Abstract: A resin composition for a printed circuit board includes an epoxy resin; an active ester hardening agent configured to react with the epoxy resin; and a cyanate ester hardening agent.

Abstract: A fan-out sensor package includes: a sensor chip having a first connection pads and an optical layer; an encapsulant encapsulating at least portions of the sensor chip; a connection member disposed on the sensor chip and the encapsulant and including a redistribution layer electrically connected to the first connection pads; through-wirings penetrating through the encapsulant and electrically connected to the redistribution layer; and electrical connection structures disposed on the other surface of the encapsulant opposing one surface of the encapsulant on which the connection member is disposed and electrically connected to the through-wirings, wherein the sensor chip and the connection member are physically spaced apart from each other by a predetermined distance, and the first connection pads and the redistribution layer are electrically connected to each other through first connectors disposed between the sensor chip and the connection member.

Abstract: A fan-out semiconductor package includes a frame comprising a plurality of wiring layers electrically connected to one another, and having a recessed portion having a stopper layer 112aM disposed on a bottom surface of the recessed portion, and a through-hole penetrating through the stopper layer; a semiconductor chip having an active surface on which a connection pad is disposed and an inactive surface opposing the active surface, and disposed in the recessed portion such that the inactive surface opposes the stopper layer; an encapsulant covering at least portions of the frame and the inactive surface of the semiconductor chip, and filling at least a portion of the recessed portion; and an interconnect structure disposed on the frame and the active surface of the semiconductor chip, and comprising a redistribution layer electrically connected to the plurality of wiring layers and the connection pad.

Abstract: An antenna module includes: a base substrate including a rigid region and a flexible region; an antenna member disposed on one surface of the rigid region of the base substrate and including antenna patterns; and a semiconductor package disposed on the other surface of the rigid region of the base substrate and including one or more semiconductor chips.

Abstract: An organic electroluminescence display device includes: a substrate; a first electrode including a first sub-electrode, a second sub-electrode, and a third sub-electrode which are arranged on the substrate; an organic light emitting layer on the first electrode and including a first light emitting layer, a second light emitting layer, and a third light emitting layer; and a second electrode on the organic light emitting layer, and the first light emitting layer is on the first sub-electrode, the second light emitting layer is on the first sub-electrode, the second sub-electrode, and the third sub-electrode, and the third light emitting layer is on the third sub-electrode, and the first light emitting layer is on a lower portion of the second light emitting layer, and the third light emitting layer is on an upper portion of the second light emitting layer.

Abstract: An electromagnetic interference shielding structure includes a base layer and an electromagnetic interference shielding layer disposed on the base layer. The electromagnetic shielding layer includes a plurality of porous conductor layers, each of the porous conductor layers has a plurality of openings, and the porous conductor layers are stacked on each other in a stacking direction. A semiconductor package includes the electromagnetic interference shielding structure.

Abstract: A resin composition for a printed circuit board and an IC package, and a product using the same, is provided. The resin composition includes an epoxy resin composite comprising 5 to 10 parts by weight of a bisphenol “A” type epoxy resin, 5 to 10 parts by weight of a naphthalene epoxy resin, 10 to 40 parts by weight of a cresol novolac epoxy resin, more than 10 to 30 parts by weight of a rubber-modified epoxy resin, and 30 or more but less than 50 parts by weight of a biphenylaralkyl novolac resin, a hardener composite comprising a dicyclopentadiene type hardener, a biphenylaralkyl novolac type hardener, and a xylok type hardener, a hardening accelerator, an inorganic filler, and a thickener.

Abstract: A low-loss insulating resin composition and an insulating film using the same are provided. The low-loss insulating resin composition comprises an epoxy resin composite including 40 to 60 parts by weight of a cyanate ester resin, 15 to 35 parts by weight of a biphenylaralkyl novolac resin, and 15 to 35 parts by weight of a fluorine-containing epoxy resin; a hardener; a thermoplastic resin; a hardening accelerator; an inorganic filler; a viscosity enhancer; and an additive.

Abstract: A resin composition for a printed circuit board and an integrated circuit (IC) package, and a product using the same is provided. The resin composition includes an epoxy resin composite comprising an epoxy group, the epoxy resin composite including 5 to 20 parts by weight of a bisphenol A type epoxy resin, 30 to 60 parts by weight of a cresol novolak epoxy resin, 20 to 35 parts by weight of a phosphorus-based flame-retardant epoxy resin, and 5 to 30 parts by weight of a rubber-modified epoxy resin, based on 100 parts by weight of the epoxy resin composite, an aminotriazine-based hardener, a hardening accelerator, a filler, and 0.01 to 5 parts by weight of a surface improving agent based on 100 parts by weight of the epoxy resin composite.