Abstract: Provided herein are a memory device and a method of operating the memory device. The memory device comprises a plurality of memory cells stacked along a pillar vertical to a substrate, a peripheral circuit configured to program and verifying memory cells coupled to a selected word line, among the memory cells, and a control logic configured to control the peripheral circuit so that a pass voltage applied to unselected word lines is adjusted depending on a location of the selected word line when the memory cells are verified.

Abstract: A semiconductor memory device includes a memory cell array including a plurality of pages, peripheral circuits programming memory cells included in a selected page of the plurality of pages into a plurality of program states, and a control logic controlling the peripheral circuits to perform a program operation, wherein the control logic controls the peripheral circuits so that a first variable pass voltage applied to a page adjacent to the selected page is different from a pass voltage applied to remaining unselected pages during a program operation for a first set program state having a low threshold voltage distribution, among the plurality of program states.

Abstract: According to an embodiment of the present invention, an organic light-emitting device includes: a first electrode; a second electrode facing the first electrode; and an emission layer between the first electrode and the second electrode. The organic light-emitting device includes a hole transport zone between the first electrode and the emission layer and includes an auxiliary layer, wherein the auxiliary layer includes at least one auxiliary material represented by Formula 1 below, and wherein the emission layer includes at least one light-emitting material represented by Formula 2 below.

Abstract: There is provided a semiconductor memory device and an operating method thereof. A semiconductor memory device includes a memory cell array including a plurality of pages; a peripheral circuit suitable for performing a program operation by applying a program voltage, a pass voltage, and a pipe transistor operation voltage, to the memory cell array; and a control logic suitable for controlling the peripheral circuit to perform the program operation, wherein the control logic adjusts a potential level of the pipe transistor operation voltage according to an address of a selected page among the plurality of pages.

Abstract: An organic light emitting diode device including an electron transport layer containing a compound represented by Chemical Formula 1, and an emission layer containing a compound represented by Chemical Formula 2.

Abstract: Provided herein is a semiconductor memory device and an operating method thereof. The semiconductor memory device may include a memory cell array, peripheral circuits, and a control logic. The memory cell array may include memory cells grouped into a plurality of pages. The peripheral circuits may perform a program operation for the plurality of pages. The control logic may control the peripheral circuits to perform the program operation by applying program voltages gradually increasing by a first step voltage to a selected page of the plurality of pages and by applying pass voltages gradually increasing by second step voltages to unselected pages of the plurality of pages. The second step voltages may vary depending on a position of the memory cells of the unselected pages in the memory cell array.

Abstract: An organic light emitting diode device including an electron transport layer containing a compound represented by Chemical Formula 1, and an emission layer containing a compound represented by Chemical Formula 2.

Abstract: A semiconductor memory device includes a memory string including a first cells portion and a second cells portion each including a multiple of memory cells, the second cells portion being disposed over the first cells portion, and a control logic configured to control a peripheral circuit such that each of at least two memory cells in a top of the first cells portion and each of at least two memory cells in a bottom of the second cells portion is programmed to have a smaller data bit than remaining memory cells in the first and second cells portions.

Abstract: A semiconductor memory device and an operating method of the semiconductor memory device may be provided. The semiconductor memory device may include a plurality of memory strings each having a plurality of memory cells coupled in series between a bit line and a source line. The semiconductor memory device may include a peripheral circuit configured to apply a program voltage, a pass voltage, and a cut-off voltage to the plurality of memory strings and perform a program operation. The semiconductor memory device may include control logic configured to control the peripheral circuit so that the cut-off voltage is applied to memory cells adjacent to a selected memory cell among the plurality of memory cells, wherein the peripheral circuit is controlled such that the cut-off voltage increases.

Abstract: An organic light-emitting device includes a first electrode, a second electrode facing the first electrode, a phosphorescent emission layer between the first electrode and the second electrode, and an electron transport layer between the phosphorescent emission layer and the second electrode. The phosphorescent emission layer includes a compound represented by one of Formulae 1a to 1c, and the electron transport layer includes a metal-containing compound and a compound represented by Formula 2.

Abstract: Provided are a semiconductor memory device and an operating method thereof. The semiconductor memory device may include a memory cell array having a plurality of strings each including a drain select transistor, a plurality of drain side memory cells, a pipe transistor, a plurality of source side memory cells, and a source select transistor. The semiconductor memory device may also include a peripheral circuit suitable for providing a plurality of operation voltages including an erase verify voltage to the plurality of strings, and a control logic suitable for controlling the peripheral circuit to adjust a voltage level of the erase verify voltage applied to a selected memory cell, from among the plurality of drain side memory cells and the plurality of source side memory cells, according to a distance between the selected memory cell and the pipe transistor when an erase verify operation is performed.

Abstract: An organic light-emitting device includes a first electrode, a second electrode, and an organic layer between the first and second electrodes and including an emission layer, wherein the emission layer comprises a first host represented by Formula 1 and a second host represented by Formula 2:

Abstract: Provided are a semiconductor memory device and an operating method thereof. The semiconductor memory device may include a memory cell array having a plurality of strings each including a drain select transistor, a plurality of drain side memory cells, a pipe transistor, a plurality of source side memory cells, and a source select transistor. The semiconductor memory device may also include a peripheral circuit suitable for providing a plurality of operation voltages including an erase verify voltage to the plurality of strings, and a control logic suitable for controlling the peripheral circuit to adjust a voltage level of the erase verify voltage applied to a selected memory cell, from among the plurality of drain side memory cells and the plurality of source side memory cells, according to a distance between the selected memory cell and the pipe transistor when an erase verify operation is performed.

Abstract: According to an embodiment of the present invention, an organic light-emitting device includes: a first electrode; a second electrode facing the first electrode; and an emission layer between the first electrode and the second electrode. The organic light-emitting device includes a hole transport zone between the first electrode and the emission layer and includes an auxiliary layer, wherein the auxiliary layer includes at least one auxiliary material represented by Formula 1 below, and wherein the emission layer includes at least one light-emitting material represented by Formula 2 below.

Abstract: An organic light emitting device is described. The organic light emitting device includes: a substrate; a first electrode on the substrate; an emission layer on the first electrode; a second electrode on the emission layer; and an exciton blocking layer between the first electrode and the emission layer, in which a LUMO energy level of the exciton blocking layer is higher than a LUMO energy level of the emission layer.

Abstract: An organic light emitting device includes a first electrode and a second electrode facing to each other; and an organic layer between first electrode and the second electrode. The organic layer includes an assistance layer on the first electrode and an emission layer on the assistance layer. The assistance layer includes a compound represented by Chemical Formula 1: where L1, L2, R1, R2, and n are as further defined in the specification.

Abstract: An organic light emitting diode device including an electron transport layer containing a compound represented by Chemical Formula 1, and an emission layer containing a compound represented by Chemical Formula 2.

Abstract: An organic light emitting device is described. The organic light emitting device includes: a substrate; a first electrode on the substrate; an emission layer on the first electrode; a second electrode on the emission layer; and an exciton blocking layer between the first electrode and the emission layer, in which a LUMO energy level of the exciton blocking layer is higher than a LUMO energy level of the emission layer.

Abstract: An organic light-emitting device includes a first electrode, a second electrode facing the first electrode, a phosphorescent emission layer between the first electrode and the second electrode, and an electron transport layer between the phosphorescent emission layer and the second electrode. The phosphorescent emission layer includes a compound represented by one of Formulae 1a to 1c, and the electron transport layer includes a metal-containing compound and a compound represented by Formula 2.

Abstract: A program method of a nonvolatile memory device includes applying a program voltage to a selected word line, applying a first pass voltage to at least one word line adjacent to the selected word line, applying at least one first middle voltage lower than the first pass voltage but higher than an isolation voltage to at least one word line adjacent to the word line receiving the first pass voltage, applying the isolation voltage to a word line adjacent to the word line receiving the first middle voltage, applying at least one second middle voltage higher than the isolation voltage but lower than a second pass voltage to at least one word line adjacent to the word line receiving the isolation voltage, and applying a second pass voltage to at least one word line adjacent to the word line receiving the second middle voltage.