Abstract: A storage device having a multi drop structure is provided. The storage device comprises a storage controller configured to output a data signal, a first non-volatile memory configured to receive the data signal, a first wiring electrically connected to the storage controller and configured to transfer the data signal, a first termination module including a first impedance element that electrically connects the first wiring to at least one of a power voltage or a ground voltage, a second wiring electrically connected to the first wiring and configured to transfer the data signal to the first non-volatile memory, and a third wiring electrically connected to the first wiring and configured to transfer the data signal to the first termination module.

Abstract: An SSD device comprises a first port linking up with a first host using a first link, a second port linking up with the first host or a second host using a second link, and a port mode controller controlling the first port and the second port to change an operating mode from a dual port mode, in which the first port and the second port operate independently of each other, to a single port mode, in which only the first port operates. The port mode controller controls the second port to reset the second link in a state where the first link is linked up.

Abstract: A Peripheral Component Interconnect Express (PCIe) interface device may include a PCIe layer, a link training module, a PCIe register, and a PCIe controller. The PCIe layer may perform communication between a host and a Direct Memory Access (DMA) device. The link training module may perform a link training for the host. The PCIe register may store data information on the PCIe layer. The PCIe controller may switch an operating clock from a PCIe clock, generated based on a reference clock, to an internal clock, process data of the PCIe layer on the basis of the internal clock, and control the link training module to recover a link for the host, when a reset signal received from the host is asserted or the reference clock is off.

Abstract: A solid state drive (SSD) device, including a substrate; a first buffer chip disposed on the substrate; a second buffer chip disposed on the first buffer chip; a plurality of first nonvolatile memory chips connected to the second buffer chip through wire bonding; a controller configured to transmit a control signal to the plurality of first nonvolatile memory chips through a first channel; and a first redistribution layer disposed in the substrate and configured to electrically connect the first channel to the first buffer chip, wherein the first buffer chip is connected to the first redistribution layer through flip chip bonding, and the second buffer chip is connected to the first redistribution layer through a first wire.

Abstract: A method of manufacturing a semiconductor device includes forming a three-dimensional (3D) structure on a substrate, forming an adsorption control layer to cover an upper portion of the 3D structure, and forming a material layer on the adsorption control layer and on a lower portion of the 3D structure that is not covered by the adsorption control layer, wherein a minimum thickness of the material layer on the adsorption control layer is less than a maximum thickness of the material layer on the lower portion of the 3D structure.

Abstract: A method of manufacturing a semiconductor device includes forming a three-dimensional (3D) structure on a substrate, forming an adsorption control layer to cover an upper portion of the 3D structure, and forming a material layer on the adsorption control layer and on a lower portion of the 3D structure that is not covered by the adsorption control layer, wherein a minimum thickness of the material layer on the adsorption control layer is less than a maximum thickness of the material layer on the lower portion of the 3D structure.

Abstract: A semiconductor device includes a lower electrode structure, an upper electrode structure, and a dielectric layer between the lower and upper electrode structures and on side surfaces and an upper surface of the lower electrode structure. The lower electrode structure includes a first lower electrode pattern having a cylindrical shape, a barrier layer on the first lower electrode pattern, and a second lower electrode pattern in a space defined by the barrier layer.

Abstract: A solid state drive (SSD) device, including a substrate; a first buffer chip disposed on the substrate; a second buffer chip disposed on the first buffer chip; a plurality of first nonvolatile memory chips connected to the second buffer chip through wire bonding; a controller configured to transmit a control signal to the plurality of first nonvolatile memory chips through a first channel; and a first redistribution layer disposed in the substrate and configured to electrically connect the first channel to the first buffer chip, wherein the first buffer chip is connected to the first redistribution layer through flip chip bonding, and the second buffer chip is connected to the first redistribution layer through a first wire.

Abstract: A solid state drive (SSD) device, including a substrate; a first buffer chip disposed on the substrate; a second buffer chip disposed on the first buffer chip; a plurality of first nonvolatile memory chips connected to the second buffer chip through wire bonding; a controller configured to transmit a control signal to the plurality of first nonvolatile memory chips through a first channel; and a first redistribution layer disposed in the substrate and configured to electrically connect the first channel to the first buffer chip, wherein the first buffer chip is connected to the first redistribution layer through flip chip bonding, and the second buffer chip is connected to the first redistribution layer through a first wire.

Abstract: Provided is a non-volatile memory package that is electrically optimized with a plurality of different non-volatile memory chips through a ball map, by fixing positions of buffer chips connected to the plurality of different non-volatile memory chips.

Abstract: A system for automatically controlling shut-off of a vehicle includes: a sensor that senses existence of a user in the vehicle; and a vehicle controlling device that determines whether the vehicle is in an idle state, determines whether a user exists in the vehicle based on a sensing value of the sensor, controls the vehicle to automatically shut off, and notifies a user of a vehicle state.

Abstract: A method of manufacturing a semiconductor device includes forming a three-dimensional (3D) structure on a substrate, forming an adsorption control layer to cover an upper portion of the 3D structure, and forming a material layer on the adsorption control layer and on a lower portion of the 3D structure that is not covered by the adsorption control layer, wherein a minimum thickness of the material layer on the adsorption control layer is less than a maximum thickness of the material layer on the lower portion of the 3D structure.

Abstract: Provided is an electronic apparatus capable of improving time margin. The electronic apparatus includes: a base substrate including a substrate base including a plurality of layers and a plurality of wiring layers between the layers; a controller chip and at least one memory semiconductor chip mounted on the base substrate; a signal line disposed in one of the wiring layers and connecting the controller chip to the at least one memory semiconductor chip; and a pair of open stubs disposed in another wiring layer, connected to both ends of the signal line, and extending to face each other with a gap.

Abstract: A semiconductor device includes a lower electrode structure, an upper electrode structure, and a dielectric layer between the lower and upper electrode structures and on side surfaces and an upper surface of the lower electrode structure. The lower electrode structure includes a first lower electrode pattern having a cylindrical shape, a barrier layer on the first lower electrode pattern, and a second lower electrode pattern in a space defined by the barrier layer.

Abstract: A method of manufacturing a semiconductor device includes forming a three-dimensional (3D) structure on a substrate, forming an adsorption control layer to cover an upper portion of the 3D structure, and forming a material layer on the adsorption control layer and on a lower portion of the 3D structure that is not covered by the adsorption control layer, wherein a minimum thickness of the material layer on the adsorption control layer is less than a maximum thickness of the material layer on the lower portion of the 3D structure.

Abstract: A solid state drive (SSD) device, including a substrate; a first buffer chip disposed on the substrate; a second buffer chip disposed on the first buffer chip; a plurality of first nonvolatile memory chips connected to the second buffer chip through wire bonding; a controller configured to transmit a control signal to the plurality of first nonvolatile memory chips through a first channel; and a first redistribution layer disposed in the substrate and configured to electrically connect the first channel to the first buffer chip, wherein the first buffer chip is connected to the first redistribution layer through flip chip bonding, and the second buffer chip is connected to the first redistribution layer through a first wire.

Abstract: A solid state drive (SSD) device includes a first nonvolatile memory package, a second nonvolatile memory package, and a controller. The first nonvolatile memory package includes a first buffer chip and a plurality of first nonvolatile memory chips. The second nonvolatile memory package includes a plurality of second nonvolatile memory chips. The controller controls the first nonvolatile memory package and the second nonvolatile memory package. The first buffer chip communicates a first address signal and a first data with the controller, and selectively communicates the first data with one of the plurality of first nonvolatile memory chips and the plurality of second nonvolatile memory chips based on the first address signal.

Abstract: A system for automatically controlling shut-off of a vehicle includes: a sensor that senses existence of a user in the vehicle; and a vehicle controlling device that determines whether the vehicle is in an idle state, determines whether a user exists in the vehicle based on a sensing value of the sensor, controls the vehicle to automatically shut off, and notifies a user of a vehicle state.

Abstract: A semiconductor device includes a lower electrode structure, an upper electrode structure, and a dielectric layer between the lower and upper electrode structures and on side surfaces and an upper surface of the lower electrode structure. The lower electrode structure includes a first lower electrode pattern having a cylindrical shape, a barrier layer on the first lower electrode pattern, and a second lower electrode pattern in a space defined by the barrier layer.

Abstract: The present invention relates to a switching device, a method of fabricating the same, and a nonvolatile memory device including the same. A switching device according to an embodiment of the present invention includes a first electrode; a second electrode; and a switching film which is disposed between the first electrode and the second electrode, and includes an electrically insulating matrix and a conductive path formed in the electrically insulating matrix. In this embodiment, the conductive path includes crystalline metal clusters dispersed in the electrically insulating matrix and a metal bridge connecting adjacent crystalline metal clusters.