Abstract: In a method of a vertical memory device, insulation layers and sacrificial layers are alternately and repeatedly formed on a substrate. A hole is formed through the insulation layers and the sacrificial layers that expose a top surface of the substrate. Then, an interior portion of the hole may be enlarged. A semiconductor pattern is formed to partially fill the enlarged portion of the hole. A blocking layer, a charge storage layer and a tunnel insulation layer may be formed on a sidewall of the hole and the semiconductor pattern. Then, the tunnel insulation layer, the charge storage layer and the blocking layer are partially removed to expose a top surface of the semiconductor pattern. A channel is formed on the exposed top surface of the semiconductor pattern and the tunnel insulation layer. The sacrificial layers are replaced with gate electrodes.

Abstract: A semiconductor device includes a substrate, a plurality of insulating layers vertically stacked on the substrate, a plurality of channels arranged in vertical openings formed through at least some of the plurality of insulating layers, and a plurality of portions alternatingly positioned with the plurality of insulating layers in the vertical direction. At least some of the portions are adjacent corresponding channels of the plurality of channels. Each of the portions includes a conductive barrier pattern formed on an inner wall of the portion, a filling layer pattern positioned in the portion on the conductive barrier pattern, and a gate electrode positioned in a remaining area of the portion not occupied by the conductive barrier or filling layer pattern.

Abstract: A semiconductor device includes a substrate, a plurality of insulating layers vertically stacked on the substrate, a plurality of channels arranged in vertical openings formed through at least some of the plurality of insulating layers, and a plurality of portions alternatingly positioned with the plurality of insulating layers in the vertical direction. At least some of the portions are adjacent corresponding channels of the plurality of channels. Each of the portions includes a conductive barrier pattern formed on an inner wall of the portion, a filling layer pattern positioned in the portion on the conductive barrier pattern, and a gate electrode positioned in a remaining area of the portion not occupied by the conductive barrier or filling layer pattern.

Abstract: A semiconductor device includes a substrate, a plurality of insulating layers vertically stacked on the substrate, a plurality of channels arranged in vertical openings formed through at least some of the plurality of insulating layers, and a plurality of portions alternatingly positioned with the plurality of insulating layers in the vertical direction. At least some of the portions are adjacent corresponding channels of the plurality of channels. Each of the portions includes a conductive barrier pattern formed on an inner wall of the portion, a filling layer pattern positioned in the portion on the conductive barrier pattern, and a gate electrode positioned in a remaining area of the portion not occupied by the conductive barrier or filling layer pattern.

Abstract: The present invention provides a method of producing D-type lactide from liquid D-type lactic acid, and a method for producing D-type polylactic acid having a weight average molecular weight of about 50,000˜20,000 g/mol from the produced D-type lactide. The method of the present invention is advantageous in that D-type lactide can be obtained at a high yield by a simple method, compared to the conventional production methods. Consequently, production cost of D-type polylactic acid that is finally obtained from D-type lactide can be reduced.