Abstract: A readout circuit of infrared focal plane array (FPA) and a control method therefor. The readout circuit is connected to an infrared FPA, which comprises a plurality of pixels. The readout circuit comprises an integral and readout unit, a correction unit and a digital control unit. For each pixel, the correction unit determines an initial bias value based on a to-be-corrected parameter value for the pixel; the integral and readout unit determines, based on a first current corresponding to the initial bias value and a second current caused a pixel response temperature value, a responsive voltage value for the pixel; and the digital control unit adjusts, based on a comparison result between the responsive voltage value and a preset voltage value, the to-be-corrected parameter value for the pixel, to obtain an adjusted parameter value, and determines, based on the adjusted parameter value, an optimal corrected parameter value for the pixel.

Abstract: A readout circuit of infrared focal plane array (FPA) and a control method therefor. The readout circuit is connected to an infrared FPA, which comprises a plurality of pixels. The readout circuit comprises an integral and readout unit, a correction unit and a digital control unit. For each pixel, the correction unit determines an initial bias value based on a to-be-corrected parameter value for the pixel; the integral and readout unit determines, based on a first current corresponding to the initial bias value and a second current caused a pixel response temperature value, a responsive voltage value for the pixel; and the digital control unit adjusts, based on a comparison result between the responsive voltage value and a preset voltage value, the to-be-corrected parameter value for the pixel, to obtain an adjusted parameter value, and determines, based on the adjusted parameter value, an optimal corrected parameter value for the pixel.

Abstract: A semiconductor device includes a substrate, a plurality of planar transistors, a fin-type field effect transistor and a first nonactive structure. The substrate includes a first region and a second region. The first region includes a plurality of first planar active regions and a nonactive region. The nonactive region is located between or aside the plurality of first planar active regions and includes a second planar active region. The second region has a fin active region. The plurality of planar transistors are located in the plurality of first planar active regions within the first region. The fin-type field effect transistor is located on the fin active region within the second region. The first nonactive structure is located in the nonactive region between the plurality of planar transistors.

Abstract: A first device sends first information to a second device, where the first information includes at least one of an identifier of the first device, position information of the first device, configuration information of the first device, or a time point at which the first device obtains second information, where the second information includes artificial intelligence information and/or sensing information. The second device determines indication information based on the first information and sends the indication information to the first device, where the indication information indicates a type and/or a format of information to be transmitted by the first device. The first device determines third information based on the indication information, where the third information is the second information or a part of the second information, or is determined based on the second information. The first device sends the third information to the second device.

Abstract: Disclosed is an energy storage and steam generation system, including an electrode steam boiler. One side of the electrode steam boiler is connected with a boiler deaerator through a pipeline. A pipeline A is arranged at the top of the electrode steam boiler. The pipeline A is connected with a steam superheater, and an outlet of the steam superheater is provided with an external steam supply outlet pipeline. A molten salt steam generation bypass pipeline and a pipeline B are arranged on the steam superheater. One end of the molten salt steam generation bypass pipeline is connected to the steam superheater. A low-temperature molten salt storage tank is connected to the pipeline B, and a high-temperature molten salt storage tank is connected to the low-temperature molten salt storage tank through a pipeline. The other end of the molten salt steam generation bypass pipeline is connected to the high-temperature molten salt storage tank. Meanwhile, a generation method is further disclosed.

Abstract: A battery cell, a battery, and an electric apparatus are described. A sampling module is connected to a housing and electrically connected to a conductor. At least one conductor is disposed on the housing and electrically connected to an electrode terminal. When status signals from the battery cell are collected, signals from at least one collection point of the sampling module are directly transmitted by the electrode terminal. In this way, the sampling module is integrated on the end cover and at least one conductor is electrically connected to the electrode terminal, which changes the conventional method of transmitting signals to CMC through a flexible circuit board and wiring harness, avoids the transmission of status signals from being affected by factors such as interference coupling and wiring harness short-circuiting, shortens the signal transmission path, and improves the reliability of signal collection by the sampling module.

Abstract: A memory device includes a substrate, a stack over the substrate, and a gate line slit extending along a first direction and dividing the stack into two portions. The stack includes a connection portion that connects the two portions of the stack. The connection portion includes at least two sub-connection portions along a second direction perpendicular to the first direction. The gate line slit includes at least two portions along the first direction. Each sub-connection portion is between adjacent two portions of the gate line slit.

Abstract: A semiconductor device includes a substrate, a plurality of planar transistors, a fin-type field effect transistor and a first nonactive structure. The substrate includes a first region and a second region. The first region includes a plurality of first planar active regions and a nonactive region. The nonactive region is located between or aside the plurality of first planar active regions and includes a second planar active region. The second region has a fin active region. The plurality of planar transistors are located in the plurality of first planar active regions within the first region. The fin-type field effect transistor is located on the fin active region within the second region. The first nonactive structure is located in the nonactive region between the plurality of planar transistors.

Abstract: A data transmission method and apparatus, the method including obtaining, by an apparatus, a first dataset, where the first dataset comprises sampled data of a beam signal from a sensed object, and sending, by the apparatus, a first signal, where the first signal carries first target data and first location data, the first target data comprises data that is in a second dataset and that is of a priority that is greater than or equal to a first preset threshold, the first location data comprises location information of the first target data in the second dataset, and the second dataset comprises the first dataset or a dataset converted from the first dataset.

Abstract: A method for calculating a surface relaxation rate of a shale includes: a relaxation time T distribution curve and a pore throat radius r distribution curve are obtained through experiments; abscissas of the two distribution curves are standardized, and the abscissa of the relaxation time T distribution curve is expanded or shrunk to ensure an abscissa value corresponding to a maximum ordinate value in the transformed relaxation time T distribution curve is same as an abscissa value corresponding to a maximum ordinate value in the pore throat radius r distribution curve; straight lines with a number of N parallel to a y-axis of a combined curve graph including the two distribution curves are drawn and a ? value corresponding to each straight line is calculated; and ? value with the number of N are processed to obtain a final surface relaxation rate ??.

Abstract: A method for fabricating a semiconductor device includes the steps of first providing a substrate having a high-voltage (HV) region and a medium-voltage (MV) region, forming a first trench on the HV region, forming a second trench adjacent to the first trench and extending the first trench to form a third trench, forming a first shallow trench isolation (STI) in the second trench and a second STI in the third trench, and then forming a first gate structure between the first STI and the second STI. Preferably, a bottom surface of the second STI is lower than a bottom surface of the first STI.

Abstract: A terminal device first authenticates whether the terminal device has permission to sense a to-be-measured object. If the terminal device has sensing permission, the terminal device senses the to-be-measured object. If the terminal device has no sensing permission, the terminal device does not sense the to-be-measured object. In this way, privacy leakage of the to-be-measured object is prevented.

Abstract: A first connector for cooperating with at least one second connector in an insertion way includes a first connector body and at least one protective cover. The first connector body has an opening for allowing the at least one second connector to be inserted thereinto. The at least one protective cover each is movably mounted on the first connector body and is used to cover the opening. The at least one protective cover is configured to be pushed by the at least one second connector to open the opening, when the second connector is inserted into and connected with the first connector.

Abstract: A liquid-phase reactor has an outer cylinder and an inner cylinder disposed along an axial direction of the reactor. The outer cylinder has a top head, a straight cylinder section and a bottom head. An annular space is formed between the inner cylinder and the outer cylinder. A top end of the inner cylinder is open and is in communication with the annular space. The inner cylinder has an upper cylinder and a lower cylinder sequentially from top to bottom. The upper cylinder is positioned in the straight cylinder section, with its cross-sectional area being gradually reduced from top to bottom. The lower cylinder is positioned in the bottom head, with its cross-sectional area being gradually increased from top to bottom. An inorganic membrane tube extending along the axial direction of the reactor is provided in the lower cylinder so that a shell-and-tube structure is formed.

Abstract: A method includes, in accordance with some implementations, sending, a measurement station, a trigger frame to a signal source station, where the trigger frame carries pilot format information, and the pilot format information is used to indicate a sending time point of a signal frame triggered by the trigger frame, a quantity of times for sending the signal frame, and a transmission mode of pilot information in the signal frame. The measurement station receives an illumination frame from the signal source station, where the illumination frame is the signal frame triggered by the trigger frame. The measurement station analyzes pilot information in the illumination frame to obtain sensing information in the illumination frame, where the sensing information is used to indicate physical information of an object surrounding the signal source station and the measurement station.

Abstract: A mechanical structure for telescopic rotating by a helical elastic part is disclosed, including a main body. The main body includes an internal cavity and a locking part for fixing one end of the internal cavity, the locking part is externally configured with a bottom cover, and a rotating sleeve is configured at an entrance of the other end of the internal cavity. The mechanical structure can solve problems due to rotary telescopic structures in existing technologies adopt more parts and complicated structures.

Abstract: A solid-state storage device is provided. The solid-state storage device includes a case, a solid-state storage module, and a heat dissipation unit. The case includes a receiving space. The solid-state storage module is disposed in the receiving space of the case. The heat dissipation unit is connected to the case. The heat dissipation unit covers the receiving space and is thermally connected to the solid-state storage module. The heat dissipation unit includes a working fluid, a cooling channel, and at least one heat conductive rib. The cooling channel extends into the heat dissipation unit. The working fluid travels in the cooling channel. The heat conductive rib extends into the cooling channel. The solid-state storage device satisfies the specification of SNIA SFF-TA-1008.

Abstract: Embodiments of semiconductor devices and methods for forming the semiconductor devices are disclosed. In an example, a method for forming device openings includes forming a material layer over a first region and a second region of a substrate, the first region being adjacent to the second region, forming a mask layer over the material layer, the mask layer covering the first region and the second region, and forming a patterning layer over the mask layer. The patterning layer covers the first region and the second region and including openings corresponding to the first region. The plurality of openings includes a first opening adjacent to a boundary between the first region and the second region and a second opening further away from the boundary. Along a plane parallel to a top surface of the substrate, a size of the first opening is greater than a size of the second opening.

Abstract: A camera module of reduced size includes a baseplate, an image sensor on the baseplate, a mounting bracket with a through hole, and a circuit board. An inner wall of the through hole extends towards a central axis of the through hole to form a platform, a side of the mounting bracket adjacent to the platform extends outward to form a connecting portion. A multilayer coil, a capacitor, and a resistor are formed on the mounting bracket by laser direct structuring, the multilayer coil is of encircling coils arranged from inside to outside on the mounting bracket and surrounds the through hole. The circuit board is connected with the mounting bracket through the connecting portion. A method for manufacturing a lens module is also disclosed.

Abstract: Embodiments of semiconductor devices and methods for forming the semiconductor devices are disclosed. In an example, a method for forming device openings includes forming a material layer over a first region and a second region of a substrate, the first region being adjacent to the second region, forming a mask layer over the material layer, the mask layer covering the first region and the second region, and forming a patterning layer over the mask layer. The patterning layer covers the first region and the second region and including openings corresponding to the first region. The plurality of openings includes a first opening adjacent to a boundary between the first region and the second region and a second opening further away from the boundary. Along a plane parallel to a top surface of the substrate, a size of the first opening is greater than a size of the second opening.