Patents by Inventor Jia Wei

Jia Wei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240107092
    Abstract: A video playing method and apparatus are described that implement an adaptively varied playing speed, and meet a playing setting of a user, thereby improving viewing experience of the user in a video played at an adaptively varied speed. The method includes obtaining a first playing speed and obtaining first information. The first information includes image information of a video and/or voice information of the video. The method further includes playing the video at a second playing speed that is obtained based on the first playing speed and the first information.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 28, 2024
    Inventors: Xuelian Zhang, Yan Zhuang, Jia Cai, Shaohua Tang, Xiaolong Wang, He Wei
  • Patent number: 11942992
    Abstract: An operation method of a network device and a control chip of the network device are provided. The network device receives an input signal through a fiber medium. The operation method includes the following steps: setting a target speed of the network device to a first speed; transmitting and/or receiving a data at the first speed; and setting the target speed of the network device to a second speed which is different from the first speed when the amplitude or energy of the input signal is not greater than a threshold.
    Type: Grant
    Filed: March 23, 2022
    Date of Patent: March 26, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Jia-You Pang, Po-Wei Liu, Jui-Chiang Wang
  • Publication number: 20240093178
    Abstract: Aspects of the invention described herein relate to methods of making and using inducible promoters for transgene expression. The inducible promoters are derived from the NFAT-RE inducible system and are used to improve or enhance T cell survival and proliferation.
    Type: Application
    Filed: November 27, 2023
    Publication date: March 21, 2024
    Applicant: SEATTLE CHILDREN'S HOSPITAL (D/B/A SEATTLE CHILDREN'S RESEARCH INSTITUTE)
    Inventors: Jia Wei, Michael C. Jensen
  • Publication number: 20240092727
    Abstract: Crystalline 4-((L-valyl)oxy)butanoic acid, methods of preparing crystalline 4-((L-valyl)oxy)butanoic acid, pharmaceutical compositions of crystalline 4-((L-valyl)oxy)butanoic acid, and methods of treatment using crystalline 4-((L-valyl)oxy)butanoic acid are disclosed.
    Type: Application
    Filed: August 29, 2023
    Publication date: March 21, 2024
    Inventors: JIA-NING XIANG, XUESONG XU, XUAN ZHANG, JAMES TIEN, HAO-WEI SHIH, HSIN-YI HUANG
  • Publication number: 20240095155
    Abstract: Embodiments of the invention are directed to computer-implemented methods of analyzing a web-based software application. A non-limiting example of the computer implemented method includes generating, using a processor system, a set of to-be-tested element-event pairs of the web-based software application. A set of compatibility tests is received at the processor system, where the set of compatibility tests is operable to perform compatibility testing of a corresponding set of element-event pairs. A comparison is performed between the set of to-be-tested element-event pairs and the corresponding set of element-event pairs. A compatibility testing recommendation is generated based at least in part on a result of the comparison.
    Type: Application
    Filed: September 21, 2022
    Publication date: March 21, 2024
    Inventors: Hong Liang Zhao, Qi Li, Yan Hui Wang, Jia Lei Rui, Qun Wei, Yun Juan Yang
  • Publication number: 20240096880
    Abstract: In some embodiments, the present disclosure relates to an integrated chip. The integrated chip includes a first channel structure configured to transport charge carriers within a first transistor device and a first gate electrode layer wrapping around the first channel structure. A second channel structure is configured to transport charge carriers within a second transistor device. A second gate electrode layer wraps around the second channel structure. The second gate electrode layer continuously extends from around the second channel structure to cover the first gate electrode layer. A third channel structure is configured to transport charge carriers within a third transistor device. A third gate electrode layer wraps around the third channel structure. The third gate electrode layer continuously extends from around the third channel structure to cover the second gate electrode layer.
    Type: Application
    Filed: November 16, 2023
    Publication date: March 21, 2024
    Inventors: Mao-Lin Huang, Chih-Hao Wang, Kuo-Cheng Chiang, Jia-Ni Yu, Lung-Kun Chu, Chung-Wei Hsu
  • Publication number: 20240079457
    Abstract: The method for manufacturing the semiconductor structure includes: providing a substrate, and forming contact holes in the substrate; depositing a metal at a bottom of each contact hole, and performing a reverse sputtering treatment to form a metal layer; in the reverse sputtering treatment, metal atoms or metal ions are sputtered onto at least a part of a side wall of each contact hole; performing a annealing treatment, to cause the substrate reacts with the metal layer to form a metal silicide layer.
    Type: Application
    Filed: February 16, 2023
    Publication date: March 7, 2024
    Inventors: Jun WEI, Huan XIA, Yihang WANG, Dong YAN, Jia KANG, Wei LI
  • Publication number: 20240069618
    Abstract: The disclosure provides a power management method. The power management method is applicable to an electronic device. The electronic device is electrically coupled to an adapter, and includes a system and a battery. The adapter has a feed power. The battery has a discharge power. The power management method of the disclosure includes: reading a power value of the battery; determining a state of the system; and discharging power to the system, when the system is in a power-on state and the power value is greater than a charging stopping value, by using the battery, and controlling, according to the discharge power and the feed power, the adapter to selectively supply power to the system. The disclosure further provides an electronic device using the power management method.
    Type: Application
    Filed: April 27, 2023
    Publication date: February 29, 2024
    Inventors: Wen Che CHUNG, Hui Chuan LO, Hao-Hsuan LIN, Chun TSAO, Jun-Fu CHEN, Ming-Hung YAO, Jia-Wei ZHANG, Kuan-Lun CHEN, Ting-Chao LIN, Cheng-Yen LIN, Chunyen LAI
  • Patent number: 11911421
    Abstract: Disclosed herein is a probiotic composition that includes Lactobacillus salivarius subsp. salicinius AP-32, Lactobacillus johnsonii MH-68, and Bifidobacterium animalis subsp. lactis CP-9, which are deposited at the China Center for Type Culture Collection (CCTCC) respectively under accession numbers CCTCC M 2011127, CCTCC M 2011128, and CCTCC M 2014588. A number ratio of Lactobacillus salivarius subsp. salicinius AP-32, Lactobacillus johnsonii MH-68, and Bifidobacterium animalis subsp. lactis CP-9 ranges from 1:0.1:0.1 to 1:1:8. Also disclosed herein is use of the probiotic composition for alleviating type 1 diabetes mellitus (T1DM).
    Type: Grant
    Filed: November 18, 2021
    Date of Patent: February 27, 2024
    Assignee: GLAC BIOTECH CO., LTD.
    Inventors: Hsieh-Hsun Ho, Wen-Yang Lin, Yi-Wei Kuo, Yen-Yu Huang, Jia-Hung Lin
  • Publication number: 20240046402
    Abstract: An image processing circuit includes a first buffer circuit, a first selector circuit, a processor circuit, a second buffer circuit, and an assigning circuit. The first buffer circuit receives pixels in a sliding window of an image. The first selector circuit outputs the pixels according to a mode signal. The processor circuit performs a first filtering process on the pixels to generate first processed pixels. The assigning circuit transmits the first processed pixels to a back-end circuit or transmits the first processed pixels to the second buffer circuit. When the assigning circuit transmits the first processed pixels to the second buffer circuit, the first selector circuit transm its the first processed pixels to the processor circuit, the processor circuit performs a second filtering process on the first processed pixels to generate second processed pixels, and the assigning circuit transmits the second processed pixels to the back-end circuit.
    Type: Application
    Filed: February 6, 2023
    Publication date: February 8, 2024
    Inventors: Kung Ho LEE, Yu Cheng CHENG, Jia Wei WU
  • Publication number: 20240043544
    Abstract: Disclosed herein is a polynucleotide comprising a human codon-optimized sequence encoding a polypeptide comprising EGFR806CAR. The codon-optimized sequence may be incorporated into a construct comprising an optimal-functioning promoter, spacer, intracellular signaling domain, transmembrane domain, selection marker, at least one self-cleaving peptides, and EFGRt, in order to optimize expression. This sequence may then be expressed in cells, such as T cells, for the treatment or inhibition of a cancer, such as glioblastoma, liquid tumors, or solid tumors.
    Type: Application
    Filed: December 3, 2021
    Publication date: February 8, 2024
    Inventors: Michael C. Jensen, Jia Wei
  • Patent number: 11893227
    Abstract: In one example, a computing device includes one or more user input detection components, and one or more processors configured to receive an indication of a first user input detected by the one or more user input detection components, responsive to receiving the indication of the first user input, adjust a level of an attention buffer at a defined rate; responsive to determining that the level of the attention buffer satisfies a first threshold, prevent further interaction with a user interface of the computing device, responsive to determining that an indication of a second user input has not been received within a time period, adjust a level of the attention buffer, and responsive to determining that the level of the attention buffer satisfies a second threshold, allow further interaction with the user interface.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: February 6, 2024
    Assignee: Google LLC
    Inventors: Gregory Mason Neiswander, Sabrina Silk Billinghurst, Yuan Hang Li, Daniel Holle, Yan Yan, Jorge Taketoshi Furuya Mariche, Jia Wei Tam, Stefan Day Dierauf, Rasekh Rifaat, Ian Douglas Barlow
  • Patent number: 11859237
    Abstract: A method for sizing a DNA molecule is disclosed, which comprises the following steps of: providing a DNA sizing device, comprising: a cover substrate; a substrate disposed on the cover substrate and comprising a first hole and a second hole; and a first slit-like channel disposed between the cover substrate and the substrate, wherein two ends of the first slit-like channel respectively connects to the first hole and the second hole; loading a sample comprising a DNA molecule to the first slit-like channel through the first hole, wherein the DNA molecule moves in a direction from the first hole to the second hole; detecting and recording an intensity and an area of a distribution of the DNA molecule; and analyzing the intensity and the area to obtain the size of a DNA molecule.
    Type: Grant
    Filed: November 8, 2019
    Date of Patent: January 2, 2024
    Assignee: ACADEMIA SINICA
    Inventors: Chia-Fu Chou, Jia-Wei Yeh, Yii-Lih Lin
  • Patent number: 11851649
    Abstract: Aspects of the invention described herein relate to methods of making and using inducible promoters for transgene expression. The inducible promoters are derived from the NFAT-RE inducible system and are used to improve or enhance T cell survival and proliferation.
    Type: Grant
    Filed: May 15, 2018
    Date of Patent: December 26, 2023
    Assignee: Seattle Children's Hospital
    Inventors: Jia Wei, Michael C. Jensen
  • Patent number: 11853044
    Abstract: Test equipment for a battery management system is provided. A battery-parameter recognition module measures a standard battery to obtain the first correction input, and uses the capacity test formula and the relaxation time test formula to perform a first charge and discharge test on the battery to be tested to obtain first battery parameter. A real-time simulation module determines the battery model and the simulated battery state based on the first battery parameter and the dynamic load. Each simulator of a physical signal simulation module provides a battery physical signal indicating the battery model. A connector provides the battery physical signal to the battery management controller under test. The battery management controller under test provides a stimulated battery state based on the battery physical signal. Master equipment compares the simulated battery state with an estimated battery state to determine whether the battery management controller under test is normal.
    Type: Grant
    Filed: July 27, 2021
    Date of Patent: December 26, 2023
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yung-Chen Wang, Yen-Hsiang Huang, Yi-Ling Lin, Yi-Lun Cheng, Jia-Wei Huang
  • Patent number: 11848847
    Abstract: An example operation may include one or more of monitoring a plurality of brokers within a cluster to identify current workload attributes of the plurality of brokers, determining a health value of a lead broker within the cluster via execution of a machine learning model on current workload attributes of the lead broker, determining to modify resources assigned to the lead broker based on the determined health value of the lead broker, executing an optimization algorithm on the current workload attributes of the plurality of brokers within the cluster to determine an optimum task distribution, and reallocating tasks amongst the lead broker and the one or more other brokers within the cluster based on the optimum task distribution.
    Type: Grant
    Filed: October 11, 2022
    Date of Patent: December 19, 2023
    Assignee: International Business Machines Corporation
    Inventors: Jun Guo, Yong Wang, Deng Xin Luo, Xiang Yu Yang, Jia Wei He
  • Publication number: 20230402562
    Abstract: A transferring apparatus configured to transfer an electronic component includes a first carrier, a second carrier, an actuator mechanism, and a flexible push generator. The first carrier is configured to carry an objective substrate, and the second carrier is configured to carry a transfer substrate. The actuator mechanism is configured to actuate the first carrier and the second carrier to move close to and away from each other. The flexible push generator is disposed near the first carrier or the second carrier and generates a flexible push to the carried objective substrate or transfer substrate when the first carrier and the second carrier are actuated in a way close to each other. A method of bonding an electronic component and a method for manufacturing a light-emitting diode display are also provided.
    Type: Application
    Filed: April 20, 2023
    Publication date: December 14, 2023
    Applicant: Stroke Precision Advanced Engineering Co., Ltd.
    Inventors: Chingju Lin, Jia Wei Huang
  • Publication number: 20230389732
    Abstract: A modular compartment pillow includes a main body, a plurality of compartments housed in a cavity in the main body, and at least one opening. The opening provides access to at least one compartment.
    Type: Application
    Filed: June 6, 2023
    Publication date: December 7, 2023
    Inventor: Jia Wei Yu
  • Publication number: 20230381049
    Abstract: A muscle tone assessment device includes a pedal, a front force sensor and a back force sensor arranged at the pedal, and a judgment unit connected to the sensors. The judgment unit obtains a front force standard deviation, a back force standard deviation, a front force deviation and a back force deviation from the sensing results, and obtains a first and a second threshold value from the front force standard deviation and the back force standard deviation. The front force standard deviation and the back force standard deviation are the standard deviations of the front force signal and the back force signal within a first time interval. The front force deviation and the back force deviation represent the deviation of the front force signal and the back force signal in a second time interval. In addition, the present invention further provides a muscle tone assessment method.
    Type: Application
    Filed: May 26, 2022
    Publication date: November 30, 2023
    Inventors: Jia-Wei LAI, Che-Wei CHAN
  • Patent number: 11810974
    Abstract: A semiconductor structure includes: a U-metal-oxide-semiconductor field-effect transistor (UMOS) structure; and a trench junction barrier Schottky (TJBS) diode, wherein an insulating layer of a sidewall of the TJBS diode does not have a side gate.
    Type: Grant
    Filed: June 25, 2021
    Date of Patent: November 7, 2023
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Chih-Fang Huang, Jia-Wei Hu, You-An Lin, Yong-Shiang Jan