Patents by Inventor Jia Wen
Jia Wen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210158594Abstract: An animated emoticon generation method, a computer-readable storage medium, and a computer device are provided. The method includes: displaying an emoticon input panel on a chat page; detecting whether a video shooting event is triggered in the emoticon input panel; acquiring video data in response to detecting the video shooting event; obtaining an edit operation for the video data; processing video frames in the video data according to the edit operation to synthesize an animated emoticon; and adding an emoticon thumbnail corresponding to the animated emoticon to the emoticon input panel, the emoticon thumbnail displaying the animated emoticon to be used as a message on the chat page based on a user selecting the emoticon thumbnail in the emoticon input panel.Type: ApplicationFiled: September 9, 2019Publication date: May 27, 2021Applicant: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LTDInventors: Dong HUANG, Tian Yi LIANG, Jia Wen ZHONG, Jun Jie ZHOU, Jin JIANG, Ying Ql, Si Kun LIANG
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Publication number: 20210072653Abstract: Embodiments of bonded semiconductor structures and fabrication methods thereof are disclosed. In an example, a method for forming a semiconductor device is disclosed. A first device layer is formed on a first substrate. A first bonding layer including a first bonding contact and a first bonding alignment mark is formed above the first device layer. A second device layer is formed on a second substrate. A second bonding layer including a second bonding contact and a second bonding alignment mark is formed above the second device layer. The first bonding alignment mark is aligned with the second bonding alignment mark, such that the first bonding contact is aligned with the second bonding contact. The first substrate and the second substrate are bonded in a face-to-face manner, so that the first bonding contact is in contact with the second bonding contact at a bonding interface, and the first bonding alignment mark is in contact with the second bonding alignment mark at the bonding interface.Type: ApplicationFiled: November 21, 2020Publication date: March 11, 2021Inventors: Meng Yan, Jia Wen Wang, Si Ping Hu, Shun Hu
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Patent number: 10915780Abstract: In some examples, a window in an image may be identified. At least one property of the window may be identified. Based on the at least one property, whether the window is an error block may be determined.Type: GrantFiled: January 29, 2016Date of Patent: February 9, 2021Assignee: MICRO FOCUS LLCInventors: Jin Wang, Zhu Jing Wu, Jia-Wen Li, Yuguang Zhao, Jun Lu
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Publication number: 20210035941Abstract: Embodiments of bonded semiconductor structures and fabrication methods thereof are disclosed. In an example, a method for forming a semiconductor device is disclosed. A first interconnect layer including first interconnects is formed above a first substrate. A first bonding layer including first bonding contacts is formed above the first interconnect layer, such that each first interconnect is in contact with a respective first bonding contact. A second interconnect layer including second interconnects is formed above a second substrate. A second bonding layer including second bonding contacts is formed above the second interconnect layer, such that at least one second bonding contact is in contact with a respective second interconnect, and at least another second bonding contact is separated from the second interconnects. The first and second substrates are bonded in a face-to-face manner, such that each first bonding contact is in contact with one second bonding contact at a bonding interface.Type: ApplicationFiled: October 6, 2020Publication date: February 4, 2021Inventors: Tao Wang, Si Ping Hu, Jia Wen Wang, Shi Qi Huang, Jifeng Zhu, Jun Chen, Zi Qun Hua
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Publication number: 20210025014Abstract: Methods for determining a gender of a Cannabis seed include the identification of a Y-chromosome specific marker in a biological sample from a dry Cannabis seed such that the dry Cannabis seed can be identified as being a male or female Cannabis seed based on the presence or absence of the Y-chromosome specific marker. Methods for cultivating a female Cannabis plant include obtaining a biological sample from a dry Cannabis seed; determining the presence or absence of a Y-chromosome specific marker in the dry Cannabis seed sample; identifying the dry Cannabis seed as being a female Cannabis seed based on the absence of the Y-chromosome specific marker; and then germinating the identified female Cannabis seed. Kits for determining the gender of a Cannabis seed are also provided and include a primer pair of amplifying a Y-chromosome specific marker. The Y-chromosome specific marker can be a SCAR119 marker.Type: ApplicationFiled: July 23, 2020Publication date: January 28, 2021Inventors: David Hildebrand, Jia Wen Tan, Robert Geneve
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Patent number: 10887358Abstract: The present invention is directed to system and method for providing recommendation to users using location information. In various embodiments, the present invention provides system that integrates information from user profiles and user-generated content, which can be obtained from a number of social networks, and merchants, to generate recommendations using location information in conjunction with the context of user profiles from various data sources and/or social networks. In certain embodiments, user generated-contents, user profiles and relationships thereof are collected, integrated, analyzed, and stored to allow them to be useful and usable in making recommendations. There are other embodiments as well.Type: GrantFiled: February 28, 2017Date of Patent: January 5, 2021Assignee: PORTAURA GROUPInventors: Jin Yu, Xunhui Yu, Jia Wen
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Patent number: 10833042Abstract: Embodiments of bonded semiconductor structures and fabrication methods thereof are disclosed. In an example, a semiconductor device includes a first and a second semiconductor structures. The first semiconductor structure includes a first interconnect layer including first interconnects. The first semiconductor structure further includes a first bonding layer including first bonding contacts. Each first interconnect is in contact with a respective first bonding contact. The second semiconductor structure includes a second interconnect layer including second interconnects. The second semiconductor structure further includes a second bonding layer including second bonding contacts. At least one second bonding contact is in contact with a respective second interconnect. At least another second bonding contact is separated from the second interconnects. The semiconductor device further includes a bonding interface between the first and second bonding layers.Type: GrantFiled: March 4, 2019Date of Patent: November 10, 2020Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.Inventors: Tao Wang, Si Ping Hu, Jia Wen Wang, Shi Qi Huang, Jifeng Zhu, Jun Chen, Zi Qun Hua
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Publication number: 20200335450Abstract: Embodiments of bonded semiconductor structures and fabrication methods thereof are disclosed. In an example, a semiconductor device includes a first and a second semiconductor structures. The first semiconductor structure includes a first interconnect layer including first interconnects. At least one first interconnect is a first dummy interconnect. The first semiconductor structure further includes a first bonding layer including first bonding contacts. Each first interconnect is in contact with a respective first bonding contact. The second semiconductor structure includes a second interconnect layer including second interconnects. At least one second interconnect is a second dummy interconnect. The second semiconductor structure further includes a second bonding layer including second bonding contacts. Each second interconnect is in contact with a respective second bonding contact. The semiconductor device further includes a bonding interface between the first and second bonding layers.Type: ApplicationFiled: July 8, 2020Publication date: October 22, 2020Inventors: Tao Wang, Si Ping Hu, Jia Wen Wang, Shi Qi Huang, Jifeng Zhu, Jun Chen, Zi Qun Hua
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Patent number: 10775284Abstract: There is provided a method of charging an array of micro-capillaries. The micro-capillaries have at least one end that is open for fluid communication. The method includes the steps of: (a) filling the array of micro-capillaries with an assay liquid; (b) controllably evaporating at least some of the assay liquid to remove it from the micro-capillary and create a void space in each of the capillaries between the assay liquid and the open end; and (c) filling the void space with a liquid that is immiscible with said assay liquid. There is also provided a use of the disclosed method and a device for charging an array of micro-capillaries.Type: GrantFiled: May 26, 2016Date of Patent: September 15, 2020Assignee: JN Medsys Pte LtdInventors: Kian Kok Johnson Ng, Koon Kiat Teu, Mei Tze Belinda Ling, Jia Wen Sim
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Publication number: 20200273706Abstract: Embodiments of wafer bonding method and structures thereof are disclosed. The wafer bonding method can include performing a plasma activation treatment on a front surface of a first and a front surface of a second wafer; performing a silica sol treatment on the front surfaces of the first and the second wafers; performing a preliminary bonding process of the first and second wafer; and performing a heat treatment of the first and the second wafers to bond the front surface of the first wafer to the front surface of the second wafers.Type: ApplicationFiled: May 8, 2020Publication date: August 27, 2020Applicant: Yangtze Memory Technologies Co., Ltd.Inventors: Shuai GUO, Jia Wen WANG, Tao Tao DING, Rui Yuan XING, Xiao Jin WANG, Jia You WANG, Chun Long LI
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Patent number: 10755291Abstract: A method and system receive consumer media consumption data and dynamically prioritize the allocation of marketing resources amongst a variety of media intellectual property (IP) assets and for a variety of media IP asset managers and owners to run automated targeted marketing campaigns. The system identifies patterns in consumer media consumption using a statistical model which detects media IP assets demonstrating a high likelihood of realizing an efficient marketing opportunity. The efficiency of a marketing opportunity is evaluated using a statistical model based on the identification of customers who are most likely to increase the frequency with which they stream the assets after being exposed to them via a marketing action in addition to the projected costs of reaching this audience. The system automatically constructs a marketing campaign. The campaign is presented to the asset manager/owner in a graphical user interface (GUI) which enables the option to purchase and execute the marketing actions.Type: GrantFiled: October 25, 2019Date of Patent: August 25, 2020Inventors: Shantanu K Sharma, Daniel Cownden, James Parks, Michael Lavender, Jia Wen Tian
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Patent number: 10748851Abstract: Embodiments of bonded semiconductor structures and fabrication methods thereof are disclosed. In an example, a semiconductor device includes a first and a second semiconductor structures. The first semiconductor structure includes a first interconnect layer including first interconnects. At least one first interconnect is a first dummy interconnect. The first semiconductor structure further includes a first bonding layer including first bonding contacts. Each first interconnect is in contact with a respective first bonding contact. The second semiconductor structure includes a second interconnect layer including second interconnects. At least one second interconnect is a second dummy interconnect. The second semiconductor structure further includes a second bonding layer including second bonding contacts. Each second interconnect is in contact with a respective second bonding contact. The semiconductor device further includes a bonding interface between the first and second bonding layers.Type: GrantFiled: March 4, 2019Date of Patent: August 18, 2020Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.Inventors: Tao Wang, Si Ping Hu, Jia Wen Wang, Shi Qi Huang, Jifeng Zhu, Jun Chen, Zi Qun Hua
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Publication number: 20200243473Abstract: Embodiments of bonded semiconductor structures and fabrication methods thereof are disclosed. In an example, a semiconductor device includes a first and a second semiconductor structures. The first semiconductor structure includes a first interconnect layer including first interconnects. The first semiconductor structure further includes a first bonding layer including first bonding contacts. Each first interconnect is in contact with a respective first bonding contact. The second semiconductor structure includes a second interconnect layer including second interconnects. The second semiconductor structure further includes a second bonding layer including second bonding contacts. At least one second bonding contact is in contact with a respective second interconnect. At least another second bonding contact is separated from the second interconnects. The semiconductor device further includes a bonding interface between the first and second bonding layers.Type: ApplicationFiled: March 4, 2019Publication date: July 30, 2020Inventors: Tao Wang, Si Ping Hu, Jia Wen Wang, Shi Qi Huang, Jifeng Zhu, Jun Chen, Zi Qun Hua
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Publication number: 20200243455Abstract: Embodiments of bonded semiconductor structures and fabrication methods thereof are disclosed. In an example, a semiconductor device includes a first and a second semiconductor structures. The first semiconductor structure includes a first interconnect layer including first interconnects. At least one first interconnect is a first dummy interconnect. The first semiconductor structure further includes a first bonding layer including first bonding contacts. Each first interconnect is in contact with a respective first bonding contact. The second semiconductor structure includes a second interconnect layer including second interconnects. At least one second interconnect is a second dummy interconnect. The second semiconductor structure further includes a second bonding layer including second bonding contacts. Each second interconnect is in contact with a respective second bonding contact. The semiconductor device further includes a bonding interface between the first and second bonding layers.Type: ApplicationFiled: March 4, 2019Publication date: July 30, 2020Inventors: Tao Wang, Si Ping Hu, Jia Wen Wang, Shi Qi Huang, Jifeng Zhu, Jun Chen, Zi Qun Hua
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Patent number: 10679854Abstract: Embodiments of wafer bonding method and structures thereof are disclosed. The wafer bonding method can include performing a plasma activation treatment on a front surface of a first and a front surface of a second wafer; performing a silica sol treatment on the front surfaces of the first and the second wafers; performing a preliminary bonding process of the first and second wafer; and performing a heat treatment of the first and the second wafers to bond the front surface of the first wafer to the front surface of the second wafers.Type: GrantFiled: July 26, 2018Date of Patent: June 9, 2020Assignee: Yangtze Memory Technologies Co., Ltd.Inventors: Shuai Guo, Jia Wen Wang, Tao Tao Ding, Rui Yuan Xing, Xiao Jin Wang, Jia You Wang, Chun Long Li
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Publication number: 20200159133Abstract: Embodiments of bonded semiconductor structures and fabrication methods thereof are disclosed. In an example, a semiconductor device includes a first semiconductor structure, a second semiconductor structure, and a bonding interface between the first semiconductor structure and the second semiconductor structure. The first semiconductor structure includes a substrate, a first device layer disposed on the substrate, and a first bonding layer disposed above the first device layer and including a first bonding contact and a first bonding alignment mark. The second semiconductor structure includes a second device layer, and a second bonding layer disposed below the second device layer and including a second bonding contact and a second bonding alignment mark. The first bonding alignment mark is aligned with the second bonding alignment mark at the bonding interface, such that the first bonding contact is aligned with the second bonding contact at the bonding interface.Type: ApplicationFiled: December 12, 2018Publication date: May 21, 2020Inventors: Meng Yan, Jia Wen Wang, Si Ping Hu, Shun Hu
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Patent number: 10580788Abstract: Embodiments of methods for forming three-dimensional (3D) memory devices are disclosed. In an example, a peripheral device is formed on a first substrate. A first interconnect layer is formed above the peripheral device on the first substrate. A dielectric stack including a plurality of dielectric/sacrificial layer pairs and a plurality of memory strings each extending vertically through the dielectric stack is formed on a second substrate. A second interconnect layer is formed above the memory strings on the second substrate. The first substrate and the second substrate are bonded, so that the first interconnect layer is below and in contact with the second interconnect layer. The second substrate is thinned after the bonding. A memory stack is formed below the thinned second substrate and including a plurality of conductor/dielectric layer pairs by replacing, with a plurality of conductor layers, sacrificial layers in the dielectric/sacrificial layer pairs.Type: GrantFiled: September 21, 2018Date of Patent: March 3, 2020Assignee: Yangtze Memory Technologies, Co., Ltd.Inventors: Jifeng Zhu, Jun Chen, Zhenyu Lu, Qian Tao, Si Ping Hu, Jia Wen Wang, Yang Fu
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Publication number: 20200027892Abstract: Embodiments of methods for forming three-dimensional (3D) memory devices are disclosed. In an example, a peripheral device is formed on a first substrate. A first interconnect layer is formed above the peripheral device on the first substrate. A dielectric stack including a plurality of dielectric/sacrificial layer pairs and a plurality of memory strings each extending vertically through the dielectric stack is formed on a second substrate. A second interconnect layer is formed above the memory strings on the second substrate. The first substrate and the second substrate are bonded, so that the first interconnect layer is below and in contact with the second interconnect layer. The second substrate is thinned after the bonding. A memory stack is formed below the thinned second substrate and including a plurality of conductor/dielectric layer pairs by replacing, with a plurality of conductor layers, sacrificial layers in the dielectric/sacrificial layer pairs.Type: ApplicationFiled: September 21, 2018Publication date: January 23, 2020Inventors: Jifeng Zhu, Jun Chen, Zhenyu Lu, Qian Tao, Si Ping Hu, Jia Wen Wang, Yang Fu
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Publication number: 20190283205Abstract: The present invention provides a polishing roll capable of, for example, realizing three-dimensional polishing of hard materials such as sapphire glass at a high removal amount. The polishing roll is a cylindrical polishing roll capable of rotating about a central axis, characterized in that the polishing roll includes a core part serving as a central axis to which torque is applied, an intermediate part having a cross-section concentric with the core part, and a polishing part disposed on the outer peripheral surface of the intermediate part, and the intermediate part is made of a cushion material that is softer than the polishing part.Type: ApplicationFiled: October 30, 2017Publication date: September 19, 2019Applicant: NITTA HAAS INCORPORATEDInventors: Yoshitaka MORIOKA, Kazunori ITO, Keng LIN, Jia-Wen TSAI
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Patent number: 10300109Abstract: Disclosed are peptidomimetic macrocycles comprising a helix, such as an alpha helix, and methods of using such macrocycles for the treatment of disease such as cancer. In other aspects, the peptidomimetic macrocycle comprises an ?,?-disubstituted amino acid, or may comprise a crosslinker linking the ?-positions of at least two amino acids or at least one of said two amino acids may be an ?,?-disubstituted amino acid. Further included is the targeting of components of the Wnt signaling pathway such as the Tcf4-/3-catenin complex.Type: GrantFiled: November 11, 2016Date of Patent: May 28, 2019Assignee: AILERON THERAPEUTICS, INC.Inventors: Huw M. Nash, Rosana Kapeller-Libermann, Jia-Wen Han, Tomi K. Sawyer, Justin Noehre, Noriyuki Kawahata