Patents by Inventor Jia Yuan
Jia Yuan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250107309Abstract: A tandem solar cell and a method of manufacturing the same are provided. The tandem solar cell includes a bottom solar cell, a silicon suboxide thin film disposed over the bottom solar cell, a transparent conductive thin film disposed over the silicon suboxide thin film, and a top solar cell disposed on the transparent conductive thin film and series connected to the bottom solar cell. The silicon suboxide thin film has a refractive index of 2.0 to 3.5 for a visible light with a wavelength of 700 nm to 750 nm, and the transparent conductive thin film has a refractive index of 1.7 to 2.1 for the visible light with the wavelength of 700 nm to 750 nm. The tandem solar cell can achieve better optical matching and increase conversion efficiency.Type: ApplicationFiled: September 27, 2023Publication date: March 27, 2025Inventors: Jia Hao LIN, Wei-Chen TIEN, Yii-Der WU, Chang-Sin YE, Cheng-Yuan HUNG
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Patent number: 12261255Abstract: An electronic assembly is provided. The electronic assembly includes a first circuit structure including a conductive structure, a second circuit structure disposed on the first circuit structure, a plurality of electronic elements disposed on the first circuit structure, and a connecting element disposed on the first circuit layer. The connecting element is disposed between two adjacent ones of the plurality electronic elements and electrically connected to the second circuit layer and one of the two adjacent ones of the plurality of electronic elements.Type: GrantFiled: December 19, 2023Date of Patent: March 25, 2025Assignee: INNOLUX CORPORATIONInventors: Jia-Yuan Chen, Tsung-Han Tsai, Kuan-Feng Lee, Yuan-Lin Wu
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Patent number: 12253409Abstract: A light sensing method having a sensing order adjusting mechanism is provided. The method includes steps of: in a previous sensing cycle, sensing a first light signal that is emitted by both of an ambient light source and a light-emitting component and then is reflected by a tested object; in the previous sensing cycle, sensing a second light signal that is emitted by both of the ambient light source and the light-emitting component and then is reflected by the tested object; in the previous sensing cycle, sensing an ambient light signal emitted by only the ambient light source; and in a next sensing cycle, sensing the first light signal, the second light signal and the ambient light signal in an order different from that in the previous sensing cycle.Type: GrantFiled: September 22, 2022Date of Patent: March 18, 2025Assignee: ANPEC ELECTRONICS CORPORATIONInventors: Yu-Yu Chen, Jia-Hua Hong, Chih-Yuan Chen
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Publication number: 20250085799Abstract: An electronic device includes a substrate, a first mesh structure, a second mesh structure and a sub-pixel. The first mesh structure is disposed on the substrate and has a plurality of first openings. The second mesh structure is disposed adjacent to the first mesh structure and has a plurality of second openings. The sub-pixel overlaps one of the plurality of first openings in a top-view direction. In the top-view direction, the first mesh structure and the second mesh structure are separated by a minimum distance along a first direction, and the minimum distance is less than a maximum width of the sub-pixel along the first direction.Type: ApplicationFiled: November 21, 2024Publication date: March 13, 2025Applicant: Innolux CorporationInventors: Hsiao-Lang Lin, Kuan-Feng Lee, Jia-Yuan Chen
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Publication number: 20250084101Abstract: The present invention relates to a compound represented by general formula (I) or a stereoisomer, deuterated compound, solvate, prodrug, metabolite, pharmaceutically acceptable salt or eutectic crystal thereof, and an intermediate thereof, and use thereof in IRAK4-related diseases such as an autoimmune disease, an inflammatory disease or cancer.Type: ApplicationFiled: January 4, 2023Publication date: March 13, 2025Applicant: XIZANG HAISCO PHARMACEUTICAL CO., LTD.Inventors: Chen ZHANG, Yuting LIAO, Chenfei ZHAO, Yan YU, Pingming TANG, Junjie MA, Xiaogang CHEN, Shuai YUAN, Xinfan CHENG, Fei YE, Yao LI, Jia NI, Pangke YAN
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Patent number: 12250862Abstract: An electronic device emitting an output light includes an optical layer. The electronic device emits the output light under an operation of a highest brightness. The output light has an output spectrum, an intensity integral of the output spectrum from 380 nm to 489 nm is defined as a first intensity integral, and an intensity integral of the output spectrum from 490 nm to 780 nm is defined as a second intensity integral. A ratio of the first intensity integral over the second intensity integral is defined as a first ratio, and the first ratio is greater than 0% and less than or equal to 7.5%.Type: GrantFiled: January 23, 2024Date of Patent: March 11, 2025Assignee: InnoLux CorporationInventors: Hsiao-Lang Lin, Jui-Jen Yueh, Kuan-Feng Lee, Jia-Yuan Chen
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Patent number: 12241340Abstract: A coal and coalbed methane mining system based on ground drilling includes: a drilling component, a coal mining drill bit and a ground facility group. The coal mining drill bit is set at a predetermined end of a directional borehole in a coal seam, connected to the drilling component through a connecting pipeline. The ground facility group is connected to the drilling component, to provide coal cutting slurry for the coal mining drill bit, receive reflux slurry carrying coal and coalbed methane, and precipitate and separate the reflux slurry carrying the coal and the coalbed methane. A coal and coalbed methane mining method based on ground drilling and related devices are also disclosed.Type: GrantFiled: October 14, 2024Date of Patent: March 4, 2025Assignee: CHINA UNIVERSITY OF MINING AND TECHNOLOGY, BEIJINGInventors: Yifan Zeng, Donghui Yang, Qiang Wu, Junhao Ren, Zilong Yuan, Fulong Zhai, Jia Zhao, Hao Li
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Patent number: 12241371Abstract: Disclosed are an integrated mining method and an integrated mining system of coal breaking, coal extraction and water circulation in a U-well. The integrated mining system includes a first ground facility unit, a second ground facility unit, a jet unit and an extraction unit. The first ground facility unit is configured to transport jet fluid to the jet unit. The jet unit is configured to break a coal seam in a sub-segment to obtain broken cinders. The extraction unit is configured to extract a coal-water mixture. The second ground facility unit is configured to receive the coal-water mixture. In response to determining that an extraction of the sub-segment is complete, the jet unit and the extraction unit is configured to move to a next sub-segment using powers provided by the first ground facility unit and the second ground facility unit.Type: GrantFiled: July 1, 2024Date of Patent: March 4, 2025Assignee: CHINA UNIVERSITY OF MINING AND TECHNOLOGY, BEIJINGInventors: Yifan Zeng, Donghui Yang, Qiang Wu, Hao Li, Junhao Ren, Zeyang Liu, Jia Zhao, Zilong Yuan
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Publication number: 20250069796Abstract: An isolation circuit includes a power factor correction circuit and a resonant conversion circuit. The resonant conversion circuit includes a primary circuit, a resonant circuit and a secondary circuit. The resonant circuit includes a resonant inductor, a resonant capacitor and a transformer including a primary winding and a secondary winding. At least one of the primary winding and the secondary winding includes a winding wire having a wire and an insulating layer wrapping therearound, wherein the insulating layer is disposed through one edge thereof, which is in an X-axis direction, on the wire, which is arranged in the X-axis direction, and then wraps around the wire in a Y-axis direction perpendicular to the X-axis direction until a number of insulating layers wrapping the wire is at least three. A withstand voltage value between an input terminal and an output terminal of the isolation circuit is ranged between 4000 VAC and 5000 VAC.Type: ApplicationFiled: November 12, 2024Publication date: February 27, 2025Inventors: Xiaoxia Yuan, Jia-Dian Luo, Chun-Ching Yen, Huai-Pei Tung, Chih-Ho Lai, Shaodong Zhang, Ming-Hsien Peng
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Publication number: 20250070041Abstract: A method for manufacturing a display device is provided. The method includes providing an array module having at least one first alignment mark. The method also includes providing a light-emitting module having at least one second alignment mark. The method further includes aligning the light-emitting module and the array module by the at least one first alignment mark and the at least one second alignment mark. In addition, the method includes bonding the light-emitting module onto the array module.Type: ApplicationFiled: November 14, 2024Publication date: February 27, 2025Inventors: Jia-Yuan CHEN, Tsung-Han TSAI, Kuan-Feng LEE, Yuan-Lin WU
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Patent number: 12237350Abstract: An NMOS structure includes a semiconductor substrate, a dielectric structure, a source doped region, a drain doped region, a channel region, a gate structure and two isolation P-type wells. The dielectric structure is formed in the semiconductor substrate to define an active region, in which the source/drain doped region and the channel region are formed. The channel region includes two opposite first sides and two opposite second sides. The source/drain doped region is respectively formed between the two second sides and the dielectric structure. The gate structure is formed on the semiconductor substrate. The gate structure covers a part of the dielectric structure beside the first sides. The two isolation P-type wells are formed in a part of the dielectric structure not covered by the gate structure. The isolation P-type wells respectively surround a periphery of the source/drain doped region and end at the respective second side.Type: GrantFiled: December 1, 2021Date of Patent: February 25, 2025Assignee: UNITED MICROELECTRONICS CORPORATIONInventors: Hau-Yuan Huang, Chia-Chen Tsai, Jia-Bin Yeh, Shou-Wei Hsieh
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Publication number: 20250063792Abstract: Gate isolation processes (e.g., gate-to-source/drain contact isolation) are described herein. An exemplary contact gate isolation process may include recessing (e.g., by etching) sidewall portions of a high-k gate dielectric and gate spacers of a gate structure to form a contact gate isolation (CGI) opening that exposes sidewalls of a gate electrode of the gate structure, forming a gate isolation liner along the sidewalls of the gate electrode that partially fills the CGI opening, and forming a gate isolation layer over the gate isolation liner that fills a remainder of the CGI opening. A dielectric constant of the gate isolation liner is less than a dielectric constant of the high-k gate dielectric. A dielectric constant of the gate isolation layer is less than a dielectric constant of the high-k gate dielectric. A dielectric constant of the gate isolation layer may be less than a dielectric constant of the gate isolation layer.Type: ApplicationFiled: December 1, 2023Publication date: February 20, 2025Inventors: Jia-Chuan YOU, Chia-Hao CHANG, Chu-Yuan HSU, Kuo-Cheng CHIANG, Chih-Hao WANG
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Publication number: 20250056848Abstract: A semiconductor device structure and a method for forming a semiconductor device structure are provided. The method includes forming a metal gate stack wrapped around multiple semiconductor nanostructures. The semiconductor nanostructures are beside an epitaxial structure. The method includes forming a dielectric layer over the metal gate stack and the epitaxial structure. The method further includes forming a contact opening in the dielectric layer and forming a protective layer over sidewalls of the contact opening. In addition, the method includes deepening the contact opening so that the contact opening extends into the epitaxial structure after the formation of the protective layer. The method includes forming a conductive contact filling the contact opening.Type: ApplicationFiled: August 9, 2023Publication date: February 13, 2025Inventors: Chu-Yuan HSU, Jia-Chuan YOU, Chia-Hao CHANG, Kuo-Cheng CHIANG, I-Han HUANG
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Publication number: 20250054765Abstract: An integrated circuit includes a first nanostructure transistor having a first gate electrode and a second nanostructure transistor having a second gate electrode. A dielectric isolation structure is between the first and second gate electrodes. A gate connection metal is on a portion of the top surface of the first gate electrode and on a portion of a top surface of the second gate electrode. The gate connection metal is patterned to expose other portions of the top surfaces of the first and second gate electrodes adjacent to the dielectric isolation structure. A conductive via contacts the exposed portion of the top surface of the second gate electrode.Type: ApplicationFiled: October 30, 2024Publication date: February 13, 2025Inventors: Jia-Chuan YOU, Chia-Hao CHANG, Chu-Yuan HSU, Kuo-Cheng CHIANG, Chih-Hao WANG
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Publication number: 20250054332Abstract: An electronic device includes a light source and an optical sensor. The light source emits a light having a maximum light intensity at a first wavelength A. The optical sensor has a maximum response value at a second wavelength B, and receives a reflected portion of the light that is reflected by an object. The integral value of the light intensity of the light from the wavelength 380 nm to the first wavelength A is I1. The integral value of the light intensity of the light from the first wavelength A to the wavelength 780 nm is I2. The first wavelength A, the second wavelength B, the integral value I1, and the integral value I2 satisfy the following equation: (B-A)*(I2-I1)>0.Type: ApplicationFiled: October 30, 2024Publication date: February 13, 2025Inventors: Jia-Yuan CHEN, Tsung-Han TSAI
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Publication number: 20250056867Abstract: An integrated circuit includes a nanosheet transistor having a plurality of stacked channels, a gate electrode surrounding the stacked channels, a source/drain region, and a source/drain contact. The integrated circuit includes a first dielectric layer between the gate metal and the source/drain contact, a second dielectric layer on the first dielectric layer, and a cap metal on the first gate metal and on a hybrid fin structure. The second dielectric layer is on the hybrid fin structure between the cap metal and the source/drain contact.Type: ApplicationFiled: October 30, 2024Publication date: February 13, 2025Inventors: Chia-Hao CHANG, Jia-Chuan YOU, Chu-Yuan HSU, Kuo-Cheng CHIANG, Chih-Hao WANG
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Patent number: 12220603Abstract: Provided are a high-intensity focused ultrasound apparatus (10) and a control method. According to the high-intensity focused ultrasound apparatus (10), by providing a focusing transducer (120) having a freely transformable shape, after an entire transducer assembly (100) extends into an inner cavity of an object to be treated, the transducer assembly (100) can extend through a narrow part into the inner cavity of an object to be treated, and after extending into the inner cavity of the object to be treated, the shape of the focusing transducer (120) in the transducer assembly (100) changes, so that the effective area of the focusing transducer (120) increases, and the ultrasonic energy produced increases, thereby enhancing the irradiation intensity for a region to be treated, and satisfying normal operation requirements of the transducer assembly (100).Type: GrantFiled: March 12, 2021Date of Patent: February 11, 2025Assignee: ULTRASOUND ASSISTED MEDTECH PTE. LTD.Inventors: Jiawei Mao, Jinqiang Yuan, Zuping Jiang, Jia Zhou, Xiaobin Gao
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Publication number: 20250041353Abstract: A method for treating a subject suffering from a graft versus host disease (GvHD) or with the risk of GvHD, comprising: selecting a CD90+hAEC cell population with a stronger immunoregulation capability as a primary therapeutic cell. Research on related action mechanisms finds that the stem cell pluripotent markers SSEA4, OCT4 and NANOG of CD90+hAECs are significantly higher than general hAECs, and have better immunomodulatory functions, and therefore, the CD90+hAECs cells are used as therapeutic means to obtain better clinical results.Type: ApplicationFiled: September 30, 2021Publication date: February 6, 2025Inventors: Xiaojun HUANG, Luyang YU, Chuanyu ZHANG, Pengjie YANG, Xiangyu ZHAO, Yaohui KOU, Weixin YUAN, Jinying LI, Jia LIU
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Patent number: 12218285Abstract: A display device is provided. The display device includes a substrate, a driving layer, a light-emitting element, and a light-shielding element. The substrate has a surface. The driving layer includes a thin-film transistor. The thin-film transistor is disposed on the surface. The light-emitting element has a P-end and an N-end. The light-emitting element is disposed on the driving layer and arranged in such a way that a virtual line connecting the P-end and the N-end is parallel to the surface of the substrate. The light-shielding element is disposed between the light-emitting element and the thin-film transistor for blocking a light emitted from the light-emitting element from irradiating the thin-film transistor.Type: GrantFiled: December 8, 2021Date of Patent: February 4, 2025Assignee: INNOLUX CORPORATIONInventors: Jia-Yuan Chen, Tsung-Han Tsai, Kuan-Feng Lee
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Patent number: 12204450Abstract: A computing system performs shared cache allocation to allocate cache resources to groups of tasks. The computing system monitors the bandwidth at a memory hierarchy device that is at a next level to the cache in a memory hierarchy of the computing system. The computing system estimates a change in dynamic power from a corresponding change in the bandwidth before and after the cache resources are allocated. The allocation of the cache resources are adjusted according to an allocation policy that receives inputs including the estimated change in the dynamic power and a performance indication of task execution.Type: GrantFiled: August 17, 2023Date of Patent: January 21, 2025Assignee: MediaTek Inc.Inventors: Yu-Pin Chen, Jia-Ming Chen, Chien-Yuan Lai, Ya Ting Chang, Cheng-Tse Chen