Patents by Inventor Jian-Dong Du
Jian-Dong Du has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250061022Abstract: A flash memory method includes: classifying data into a plurality of groups of data; respectively executing error code encoding to generate first corresponding parity check code to store the groups of data and first corresponding parity check code into flash memory module as first blocks; reading out the groups of data from first blocks; executing error correction and de-randomize operation upon read out data to generate de-randomized data; executing randomize operation upon de-randomized data according to a set of seeds to generate randomized data; performing error code encoding upon randomized data to generate second corresponding parity check code; and, storing randomized data and second corresponding parity check code into flash memory module as second block; a cell of first block is used for storing data of first bit number which is different from second bit number corresponding to a cell of second block.Type: ApplicationFiled: November 6, 2024Publication date: February 20, 2025Applicant: Silicon Motion, IncInventors: Tsung-Chieh Yang, Hong-Jung Hsu, Jian-Dong DU
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Patent number: 12197285Abstract: A flash memory method includes: classifying data into a plurality of groups of data; respectively executing error code encoding to generate first corresponding parity check code to store the groups of data and first corresponding parity check code into flash memory module as first blocks; reading out the groups of data from first blocks; executing error correction and de-randomize operation upon read out data to generate de-randomized data; executing randomize operation upon de-randomized data according to a set of seeds to generate randomized data; performing error code encoding upon randomized data to generate second corresponding parity check code; and, storing randomized data and second corresponding parity check code into flash memory module as second block; a cell of first block is used for storing data of first bit number which is different from second bit number corresponding to a cell of second block.Type: GrantFiled: October 31, 2023Date of Patent: January 14, 2025Assignee: Silicon Motion, Inc.Inventors: Tsung-Chieh Yang, Hong-Jung Hsu, Jian-Dong Du
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Publication number: 20240061745Abstract: A flash memory method includes: classifying data into a plurality of groups of data; respectively executing error code encoding to generate first corresponding parity check code to store the groups of data and first corresponding parity check code into flash memory module as first blocks; reading out the groups of data from first blocks; executing error correction and de-randomize operation upon read out data to generate de-randomized data; executing randomize operation upon de-randomized data according to a set of seeds to generate randomized data; performing error code encoding upon randomized data to generate second corresponding parity check code; and, storing randomized data and second corresponding parity check code into flash memory module as second block; a cell of first block is used for storing data of first bit number which is different from second bit number corresponding to a cell of second block.Type: ApplicationFiled: October 31, 2023Publication date: February 22, 2024Applicant: Silicon Motion, Inc.Inventors: Tsung-Chieh Yang, Hong-Jung Hsu, Jian-Dong Du
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Patent number: 11847023Abstract: A flash memory method includes: classifying data into a plurality of groups of data; respectively executing error code encoding to generate first corresponding parity check code to store the groups of data and first corresponding parity check code into flash memory module as first blocks; reading out the groups of data from first blocks; executing error correction and de-randomize operation upon read out data to generate de-randomized data; executing randomize operation upon de-randomized data according to a set of seeds to generate randomized data; performing error code encoding upon randomized data to generate second corresponding parity check code; and, storing randomized data and second corresponding parity check code into flash memory module as second block; a cell of first block is used for storing data of first bit number which is different from second bit number corresponding to a cell of second block.Type: GrantFiled: October 11, 2022Date of Patent: December 19, 2023Assignee: Silicon Motion, Inc.Inventors: Tsung-Chieh Yang, Hong-Jung Hsu, Jian-Dong Du
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Method for managing flash memory module and associated flash memory controller and electronic device
Patent number: 11630768Abstract: A flash memory controller includes a read only memory (ROM) and a microprocessor. The ROM is arranged to store a program code. The microprocessor is arranged to execute the program code to control access of a flash memory module. When executing the program code, the microprocessor is arranged to perform operations of: monitoring data retention state of one or more blocks in the flash memory module by reading a last page of the one or more blocks to obtain time information regarding the one or more blocks, which is generated by the flash memory controller; and arranging a specific block to a garbage collection process if time information obtained from the last page of the specific block exceeds a threshold.Type: GrantFiled: June 29, 2022Date of Patent: April 18, 2023Assignee: Silicon Motion, Inc.Inventors: Jian-Dong Du, Chia-Jung Hsiao, Pi-Ju Tsai -
Patent number: 11573734Abstract: The present invention proposes a method for managing a plurality of memory units in a flash memory module. The method includes: creating a programed timestamp corresponding to each first memory unit according to a data-written time of said each first memory unit; selecting a corresponding read-retry table for performing a read operation upon said each first memory unit according to the programed timestamp of said each first memory unit; and performing a first refresh operation according to program timestamps of first memory units that have been written with data.Type: GrantFiled: January 1, 2020Date of Patent: February 7, 2023Assignee: Silicon Motion, Inc.Inventors: Jian-Dong Du, Pi-Ju Tsai, Tsung-Chieh Yang
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Publication number: 20230032032Abstract: A flash memory method includes: classifying data into a plurality of groups of data; respectively executing error code encoding to generate first corresponding parity check code to store the groups of data and first corresponding parity check code into flash memory module as first blocks; reading out the groups of data from first blocks; executing error correction and de-randomize operation upon read out data to generate de-randomized data; executing randomize operation upon de-randomized data according to a set of seeds to generate randomized data; performing error code encoding upon randomized data to generate second corresponding parity check code; and, storing randomized data and second corresponding parity check code into flash memory module as second block; a cell of first block is used for storing data of first bit number which is different from second bit number corresponding to a cell of second block.Type: ApplicationFiled: October 11, 2022Publication date: February 2, 2023Applicant: Silicon Motion, Inc.Inventors: Tsung-Chieh Yang, Hong-Jung Hsu, Jian-Dong Du
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Patent number: 11500722Abstract: A flash memory method includes: classifying data into a plurality of groups of data; respectively executing error code encoding to generate first corresponding parity check code to store the groups of data and first corresponding parity check code into flash memory module as first blocks; reading out the groups of data from first blocks; executing error correction and de-randomize operation upon read out data to generate de-randomized data; executing randomize operation upon de-randomized data according to a set of seeds to generate randomized data; performing error code encoding upon randomized data to generate second corresponding parity check code; and, storing randomized data and second corresponding parity check code into flash memory module as second block; a cell of first block is used for storing data of first bit number which is different from second bit number corresponding to a cell of second block.Type: GrantFiled: April 28, 2021Date of Patent: November 15, 2022Assignee: Silicon Motion, Inc.Inventors: Tsung-Chieh Yang, Hong-Jung Hsu, Jian-Dong Du
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Patent number: 11487655Abstract: The present invention provides a flash memory controller, wherein the flash memory controller is arranged to access a flash memory module, and the flash memory controller includes a ROM, a microprocessor and a timer. The ROM stores a program code, the microprocessor is configured to execute the program code to control the access of the flash memory module, and the timer is used to generate time information. In the operations of the flash memory controller, the microprocessor refers to the time information to perform dummy read operations upon at least a portion of the blocks, wherein the dummy read operations are not triggered by read commands from a host device.Type: GrantFiled: June 23, 2021Date of Patent: November 1, 2022Assignee: Silicon Motion, Inc.Inventors: Jian-Dong Du, Chia-Jung Hsiao, Tsung-Chieh Yang
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METHOD FOR MANAGING FLASH MEMORY MODULE AND ASSOCIATED FLASH MEMORY CONTROLLER AND ELECTRONIC DEVICE
Publication number: 20220334960Abstract: A flash memory controller includes a read only memory (ROM) and a microprocessor. The ROM is arranged to store a program code. The microprocessor is arranged to execute the program code to control access of a flash memory module. When executing the program code, the microprocessor is arranged to perform operations of: monitoring data retention state of one or more blocks in the flash memory module by reading a last page of the one or more blocks to obtain time information regarding the one or more blocks, which is generated by the flash memory controller; and arranging a specific block to a garbage collection process if time information obtained from the last page of the specific block exceeds a threshold.Type: ApplicationFiled: June 29, 2022Publication date: October 20, 2022Applicant: Silicon Motion, Inc.Inventors: Jian-Dong Du, Chia-Jung Hsiao, Pi-Ju Tsai -
Method for managing flash memory module and associated flash memory controller and electronic device
Patent number: 11409650Abstract: The present invention provides a flash memory controller, wherein the flash memory controller is arranged to access a flash memory module, and the flash memory controller includes a ROM, a microprocessor and a time-management circuit. The ROM stores a program code, the microprocessor is configured to execute the program code to control the access of the flash memory module, and the time-management circuit is configured to generate current time information. In the operations of the flash memory controller, when the microprocessor writes data into last pages of a specific block of the flash memory module, the microprocessor writes the time information generated by the time-management circuit into one of the last pages of the specific block.Type: GrantFiled: November 13, 2019Date of Patent: August 9, 2022Assignee: Silicon Motion, Inc.Inventors: Jian-Dong Du, Chia-Jung Hsiao, Pi-Ju Tsai -
Publication number: 20220066641Abstract: A method for use in management of a flash memory module is provided. The flash memory module has a plurality of blocks, wherein a portion of the blocks belong to a spare pool. The method includes: preserving at least one erased block in the spare pool for a write operation; monitoring an erasing period regarding the at least one erased block; and performing a replacement operation to replace the at least one erased block when the erase time exceeds a threshold.Type: ApplicationFiled: October 14, 2021Publication date: March 3, 2022Applicant: Silicon Motion, Inc.Inventors: Jian-Dong Du, Chia-Jung Hsiao, Tsung-Chieh Yang
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Method for managing flash memory module and associated flash memory controller and electronic device
Patent number: 11210209Abstract: The present invention provides a method for managing a flash memory module, wherein the flash memory module includes a plurality of flash memory chips, each flash memory chip includes a plurality of blocks, and each block includes a plurality of pages, and the method includes the steps of: using a time management circuit to generate current time information; when data is written into any one of the blocks, recording the time information generated by the time management circuit; and determining at least one specific block according to quantity of invalid pages within each block and the time information of each block.Type: GrantFiled: November 18, 2019Date of Patent: December 28, 2021Assignee: Silicon Motion, Inc.Inventors: Jian-Dong Du, Pi-Ju Tsai, Tsung-Chieh Yang -
Patent number: 11210028Abstract: The present invention discloses a method for accessing a flash memory module, wherein the flash memory module comprises a plurality of block, each block is implemented by a plurality of word lines, and each word line comprises a plurality of memory cells supporting a plurality of states. The method comprises the steps of: reading the memory cells of at least a first word line of a specific block of the plurality of blocks to obtain a cumulative distribution information of the states of the memory cells; determining a target decoding flow selected from at least a first decoding flow and a second decoding flow according to the cumulative distribution information; reading the memory cells of a second word line to obtain readout information of the second word line; and using the target decoding flow to decode the readout information of the second word line.Type: GrantFiled: April 22, 2020Date of Patent: December 28, 2021Assignee: Silicon Motion, Inc.Inventors: Jian-Dong Du, Pi-Ju Tsai
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Patent number: 11175841Abstract: A method for use in management of a flash memory module is provided. The flash memory module has a plurality of blocks, wherein a portion of the blocks belong to a spare pool. The method includes: preserving at least one erased block in the spare pool for a write operation; monitoring an erasing period regarding the at least one erased block; and performing a replacement operation to replace the at least one erased block when the erase time exceeds a threshold.Type: GrantFiled: January 7, 2020Date of Patent: November 16, 2021Assignee: Silicon Motion, Inc.Inventors: Jian-Dong Du, Chia-Jung Hsiao, Tsung-Chieh Yang
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Publication number: 20210334039Abstract: The present invention discloses a method for accessing a flash memory module, wherein the flash memory module comprises a plurality of block, each block is implemented by a plurality of word lines, and each word line comprises a plurality of memory cells supporting a plurality of states. The method comprises the steps of: reading the memory cells of at least a first word line of a specific block of the plurality of blocks to obtain a cumulative distribution information of the states of the memory cells; determining a target decoding flow selected from at least a first decoding flow and a second decoding flow according to the cumulative distribution information; reading the memory cells of a second word line to obtain readout information of the second word line; and using the target decoding flow to decode the readout information of the second word line.Type: ApplicationFiled: April 22, 2020Publication date: October 28, 2021Inventors: Jian-Dong Du, Pi-Ju Tsai
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Publication number: 20210318953Abstract: The present invention provides a flash memory controller, wherein the flash memory controller is arranged to access a flash memory module, and the flash memory controller includes a ROM, a microprocessor and a timer. The ROM stores a program code, the microprocessor is configured to execute the program code to control the access of the flash memory module, and the timer is used to generate time information. In the operations of the flash memory controller, the microprocessor refers to the time information to perform dummy read operations upon at least a portion of the blocks, wherein the dummy read operations are not triggered by read commands from a host device.Type: ApplicationFiled: June 23, 2021Publication date: October 14, 2021Applicant: Silicon Motion, Inc.Inventors: Jian-Dong Du, Chia-Jung Hsiao, Tsung-Chieh Yang
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Publication number: 20210248036Abstract: A flash memory method includes: classifying data into a plurality of groups of data; respectively executing error code encoding to generate first corresponding parity check code to store the groups of data and first corresponding parity check code into flash memory module as first blocks; reading out the groups of data from first blocks; executing error correction and de-randomize operation upon read out data to generate de-randomized data; executing randomize operation upon de-randomized data according to a set of seeds to generate randomized data; performing error code encoding upon randomized data to generate second corresponding parity check code; and, storing randomized data and second corresponding parity check code into flash memory module as second block; a cell of first block is used for storing data of first bit number which is different from second bit number corresponding to a cell of second block.Type: ApplicationFiled: April 28, 2021Publication date: August 12, 2021Inventors: Tsung-Chieh Yang, Hong-Jung Hsu, Jian-Dong Du
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Patent number: 11074174Abstract: The present invention provides a flash memory controller, wherein the flash memory controller is arranged to access a flash memory module, and the flash memory controller includes a ROM, a microprocessor and a timer. The ROM stores a program code, the microprocessor is configured to execute the program code to control the access of the flash memory module, and the timer is used to generate time information. In the operations of the flash memory controller, the microprocessor refers to the time information to perform dummy read operations upon at least a portion of the blocks, wherein the dummy read operations are not triggered by read commands from a host device.Type: GrantFiled: November 13, 2019Date of Patent: July 27, 2021Assignee: Silicon Motion, Inc.Inventors: Jian-Dong Du, Chia-Jung Hsiao, Tsung-Chieh Yang
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Patent number: 11030042Abstract: A flash memory method includes: classifying data into a plurality of groups of data; respectively executing error code encoding to generate first corresponding parity check code to store the groups of data and first corresponding parity check code into flash memory module as first blocks; reading out the groups of data from first blocks; executing error correction and de-randomize operation upon read out data to generate de-randomized data; executing randomize operation upon de-randomized data according to a set of seeds to generate randomized data; performing error code encoding upon randomized data to generate second corresponding parity check code; and, storing randomized data and second corresponding parity check code into flash memory module as second block; a cell of first block is used for storing data of first bit number which is different from second bit number corresponding to a cell of second block.Type: GrantFiled: April 7, 2020Date of Patent: June 8, 2021Assignee: Silicon Motion, Inc.Inventors: Tsung-Chieh Yang, Hong-Jung Hsu, Jian-Dong Du