Patents by Inventor Jian Liang

Jian Liang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240146173
    Abstract: In one example, an apparatus comprises an amplifier, a ramp generation circuit, and a comparator. The amplifier has a reference input, a power converter feedback input, and an amplifier output. The ramp generation circuit has a ramp slope control terminal and a ramp signal terminal, the ramp slope control terminal coupled to the amplifier output. The comparator has a current sense input, a ramp signal input, and a comparator output, in which the ramp signal input is coupled to the ramp signal terminal, and the comparator output is coupled to a power converter control terminal.
    Type: Application
    Filed: October 27, 2022
    Publication date: May 2, 2024
    Inventors: Jing Ji, Jian Liang
  • Patent number: 11972361
    Abstract: Provided is a method including receiving object IOs for a target device, grouping the object IOs using a first plurality of input parameters, associating a tracking parameter with the first plurality of input parameters and a performance parameter corresponding to the first plurality of input parameters, storing a first data entry including the tracking parameter, the first plurality of input parameters, and the performance parameter in a database, extracting a plurality of data entries from the database, the plurality of data entries including the first data entry, training a training model using one or more of the plurality of data entries, cross-validating the training model to determine a degree of error reduction of the training model, performing a model check to compare the training model to an inferencing model, and updating the inferencing model based on the model check.
    Type: Grant
    Filed: March 12, 2020
    Date of Patent: April 30, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Somnath Saha, Jian Liang, Ramaraj Pandian
  • Publication number: 20240120836
    Abstract: A circuit includes a control circuit having a first control circuit input, a second control circuit input, a first control circuit output, and a second control circuit output, and a first transistor having a first current terminal, a second current terminal, and a control terminal, the control terminal coupled to the first control circuit output, the first current terminal coupled to the first control circuit input and to a second transistor, and the second current terminal adapted to be coupled to the second transistor, a logic circuit having a first logic input, a second logic input, and a logic output, the first logic input coupled to the second control circuit output and a switch having a first switch terminal, a second switch terminal, and a switch control terminal, the switch control terminal coupled to the logic output and the first switch terminal coupled to the second current terminal.
    Type: Application
    Filed: November 30, 2023
    Publication date: April 11, 2024
    Inventors: Jian LIANG, Yao LU, Chen FENG
  • Publication number: 20240113621
    Abstract: A boost converter that provides a wide average current limiting range includes a switch coupled to an inductor output and a power input, a diode coupled to the inductor output and an output terminal load and configured to conduct current in only one direction away from the inductor output and toward the output terminal, a clamp circuit coupled to the diode and the switch, and a minimum time off module coupled to the diode and the switch. The clamp circuit is configured to clamp an inductor output current to a reference current while the converter is operating in a continuous conduction mode (CCM) of operation. The minimum time off module is configured to cause the inductor output current to be zero for at least a time Toff while the converter is operating in a pulse frequency modulation (PFM) mode of operation.
    Type: Application
    Filed: September 30, 2022
    Publication date: April 4, 2024
    Inventors: Jian Liang, Chen Feng, Zichen Feng
  • Publication number: 20240104683
    Abstract: The present disclosure relates to methods and apparatus for sharing GPU hardware to generate bin visibility information concurrently for graphics processing. The apparatus can cause a processor to: store, in a GMEM, first data associated with a first graphics processing pass for a first frame of graphics data and second data associated with a second graphics processing pass for a second frame of graphics data. The apparatus can also cause a geometry processor to perform the first graphics processing pass using the first data and a second processor to concurrently perform the second graphics processing pass using the second data such that the first graphics processing pass and the second graphics processing path share the geometry processor. In some aspects, the apparatus can switch the geometry processor from being used for the first graphics processing pass to being used for the second graphics processing pass at a primitive batch boundary.
    Type: Application
    Filed: September 23, 2022
    Publication date: March 28, 2024
    Inventors: Vishwanath Shashikant NIKAM, Kalyan Kumar BHIRAVABHATLA, Jian LIANG, Zhenbiao MA, Siva Satyanarayana KOLA, Suvam CHATTERJEE
  • Publication number: 20240104684
    Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for improving visibility generation in tile-based GPU architectures. A graphics processor may perform a first binning pass associated with visibility information for each of a plurality of primitives in at least one frame. The visibility information for each of the plurality of primitives may correspond to a visible indication or an invisible indication. The graphics processor may update a depth buffer based on the visibility information for all of the plurality of primitives in the at least one frame. The graphics processor may perform a second binning pass for each of the visible set of primitives based on the updated depth buffer. The graphics processor may store at least one of the updated visibility information or updated position data for all primitives in the visible set of primitives from the second binning pass.
    Type: Application
    Filed: September 23, 2022
    Publication date: March 28, 2024
    Inventors: Kalyan Kumar BHIRAVABHATLA, Andrew Evan GRUBER, Rahul Sunil KUKREJA, Vishwanath Shashikant NIKAM, Tao WANG, Jian LIANG
  • Publication number: 20240078737
    Abstract: A sliced graphics processing unit (GPU) architecture in processor-based devices is disclosed. In some aspects, a GPU based on a sliced GPU architecture includes multiple hardware slices. The GPU further includes a command processor (CP) circuit and an unslice primitive controller (PC_US). Upon receiving a graphics instruction from a central processing unit (CPU), the CP circuit determines a graphics workload, and transmits the graphics workload to the PC_US. The PC_US then partitions the graphics workload into multiple subbatches and distributes each subbatch to a PC_S of a hardware slice for processing.
    Type: Application
    Filed: May 19, 2023
    Publication date: March 7, 2024
    Inventors: Jian LIANG, Andrew Evan GRUBER, Tao WANG, Xuefeng TANG, Vishwanath Shashikant NIKAM, Nigel POOLE, Kalyan Kumar BHIRAVABHATLA, Fei XU, Zilin YING
  • Publication number: 20240078735
    Abstract: A sliced graphics processing unit (GPU) architecture in processor-based devices is disclosed. In some aspects, a GPU based on a sliced GPU architecture includes multiple hardware slices. The GPU further includes a command processor (CP) circuit and an unslice primitive controller (PC_US). Upon receiving a graphics instruction from a central processing unit (CPU), the CP circuit determines a graphics workload, and transmits the graphics workload to the PC_US. The PC_US then partitions the graphics workload into multiple subbatches and distributes each subbatch to a PC_S of a hardware slice for processing.
    Type: Application
    Filed: December 19, 2022
    Publication date: March 7, 2024
    Inventors: Jian Liang, Andrew Evan Gruber, Tao Wang, Xuefeng Tang, Vishwanath Shashikant Nikam, Nigel Poole, Kalyan Kumar Bhiravabhatla, Fei Xu, Zilin Ying
  • Publication number: 20240064460
    Abstract: The present disclosure discloses acoustic devices. The acoustic device may include a diaphragm; a housing configured to accommodate the diaphragm and form a first acoustic cavity and a second acoustic cavity respectively corresponding to a front side and a rear side of the diaphragm, wherein the diaphragm radiates sounds to the first acoustic cavity and the second acoustic cavity, respectively, and the sounds are guided through a first acoustic hole coupled with the first acoustic cavity and a second acoustic hole coupled with the second acoustic cavity, respectively; and a sound absorption structure, wherein the sound absorption structure is coupled with the second acoustic cavity and is configured to absorb the sound transmitted to the second acoustic hole through the second acoustic cavity in a target frequency range, the target frequency range including a resonant frequency of the second acoustic cavity.
    Type: Application
    Filed: November 1, 2023
    Publication date: February 22, 2024
    Applicant: SHENZHEN SHOKZ CO., LTD.
    Inventors: Zhen WANG, Jianing LIANG, Lei ZHANG, Xin QI
  • Patent number: 11881770
    Abstract: A voltage converter having a voltage input and a voltage output, the voltage converter including a first and second transistors and an average current control circuit. The first transistor has a first control input, a first current terminal, and a second current terminal. The first current terminal is adapted to be coupled to a switch node. The second transistor has a second control input, a third current terminal, and a fourth current terminal. The third current terminal is adapted to be coupled to an inductor. The average current control circuit is coupled to the third current terminal and the fourth current terminal. The average current control circuit is configured to determine an average current level of current flowing through the second transistor and to control a voltage on the first control input of the first terminal based on the determined average current level.
    Type: Grant
    Filed: December 28, 2021
    Date of Patent: January 23, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Jian Liang, Yao Lu, Chen Feng
  • Publication number: 20230406019
    Abstract: An auxiliary tool includes a first stamping plate, a guiding frame, and a magnetic element. The first stamping plate is detachably attached on a first side wall of a container, and has a plurality of positioning grooves indently and spacedly formed on a first outer surface of the first stamping plate. The guiding frame has an engagement rim detachably engaging with one of the positioning grooves, and a supporting platform shaped and sized to correspond to the stamp. The magnetic element is mounted on the guiding frame to provide a magnetic attractive force for magnetically attracting the stamp so that a user is able to impart an impact on the stamp for forming a printed text on a workpiece.
    Type: Application
    Filed: September 1, 2023
    Publication date: December 21, 2023
    Inventor: Jian LIANG
  • Publication number: 20230394738
    Abstract: The present disclosure relates to methods and apparatus for graphics processing, e.g., a GPU. The apparatus may receive an image including a plurality of pixels associated with one or more workgroups and one or more pixel tiles, each of the workgroups and the pixel tiles including one or more pixels of the plurality of pixels. The apparatus may determine whether the one or more workgroups are misaligned with the one or more pixel tiles. The apparatus may determine a conversion order of the one or more workgroups when the one or more workgroups are misaligned with the one or more pixel tiles, the conversion order corresponding to a common multiple of one of the one or more workgroups and one of the one or more pixel tiles. The apparatus may convert each of the one or more workgroups based on the conversion order of the one or more workgroups.
    Type: Application
    Filed: November 9, 2020
    Publication date: December 7, 2023
    Inventors: Yibin ZHANG, Zilin YING, Yun DU, Heng QI, Jiexia YU, Yang YU, Andrew Evan GRUBER, Jian LIANG, Tao WANG, Alexei Vladimirovich BOURD, Gang ZHONG, Minjie HUANG
  • Publication number: 20230387998
    Abstract: A communication apparatus and an electronic device for implementing multi-carrier aggregation are provided. The communication apparatus includes a transceiver and an antenna array. The transceiver is coupled to a plurality of radio frequency channels, and the plurality of radio frequency channels are coupled to all antenna units in the antenna array in a one-to-one manner. Each of the plurality of radio frequency channels includes a phase shifter, and the phase shifter is configured to set a phase of a radio frequency signal transmitted in the radio frequency channel. The antenna array includes a plurality of first antenna units and a plurality of second antenna units. The plurality of first antenna units are configured to transmit a plurality of radio frequency signals of a first band, to form a first carrier signal pointing to a first direction.
    Type: Application
    Filed: August 8, 2023
    Publication date: November 30, 2023
    Inventors: Zhi Li, Jian Liang, Peng Gao
  • Patent number: 11765349
    Abstract: Method and apparatus of coding pictures containing one or more virtual boundaries, such as 360-degree virtual reality (VR360) video are disclosed. According to this method, a reconstructed filtered unit associated with a loop filter for a current reconstructed pixel is received. The loop filtering process associated with the loop filter is applied to the current reconstructed pixel to generate a filtered reconstructed pixel, where if the loop filtering process for the current reconstructed pixel is across a virtual boundary of the picture, the loop filtering process is disabled when fixed-size loop filtering is used or a smaller-size loop filter is selected when adaptive-size loop filtering is used for the current reconstructed pixel, where the filtered reconstructed pixel is the same as the current reconstructed pixel when the loop filtering process is disabled. The filtered reconstructed pixel is the same as the current reconstructed pixel.
    Type: Grant
    Filed: August 30, 2019
    Date of Patent: September 19, 2023
    Assignee: MEDIATEK INC.
    Inventors: Sheng Yen Lin, Lin Liu, Jian-Liang Lin
  • Publication number: 20230282833
    Abstract: There is provided a hydrogel binder and a method of synthesizing the same. There is also provided a free-standing electrode comprising the hydrogel binder and a method of preparing the free-standing electrode comprising the hydrogel binder. There is further provided a battery comprising the free-standing electrode as defined herein.
    Type: Application
    Filed: July 14, 2021
    Publication date: September 7, 2023
    Inventors: Jackie Y. YING, Jian LIang CHEONG
  • Publication number: 20230278868
    Abstract: There is provided a coral-like composite material comprising highly dispersed conductive metal nitride, metal carbide or metal carbonitride nanoparticles on mesoporous carbon nanosheets, and a method of preparing the same. There is also provided a coating material for a modified separator of a lithium-sulfur battery comprising the coral-like composite material as described herein, a conducting carbon material and a binder, and a method of preparing the same.
    Type: Application
    Filed: June 2, 2021
    Publication date: September 7, 2023
    Inventors: Jackie Y. YING, Jian Liang CHEONG
  • Publication number: 20230238857
    Abstract: The present application disclosed a magnetic levitation system, and the magnetic levitation system includes a stator, a rotor, and a magnetic coupling mechanism; the stator includes a stator winding mechanism for controlling the rotor to move away from or close to the axis direction of the stator. The magnetic coupling mechanism includes magnetic sources, and the magnetic coupling mechanism is magnetically coupled with the rotor through the magnetic sources to drive the rotor to rotate around the axis direction of the stator. The magnetic levitation system decouples the magnetic circuit that drives the rotor to move from the magnetic circuit that drives the rotor to rotate, so as to reduce control difficulty, enhance stability, and reduce torque fluctuations.
    Type: Application
    Filed: March 23, 2021
    Publication date: July 27, 2023
    Applicants: SHENZHEN INSTITUTES OF ADVANCED TECHNOLOGY CHINESE ACADEMY OF SCIENCES, NATIONAL INSTITUTE OF ADVANCED MEDICAL DEVICES, SHENZHEN
    Inventors: Tianfu SUN, Hairong ZHENG, Jianing LIANG, Linghui LONG, Fucheng JIANG, Huiyun LI, Liwen WAN, Long LI
  • Publication number: 20230226865
    Abstract: Disclosed are a towing device for a vehicle and a vehicle. The towing device includes a front end portion and a rear end portion connected to the front end portion, where the front end portion is arranged on a rear floor and a rear floor cross member, so as to disperse an external force borne by the front end portion to the rear floor cross member; and the rear end portion includes a connecting seat and a tow hook connected to the connecting seat and extending out towards an exterior of the vehicle, the connecting seat being arranged on a rear anti-collision beam, so as to transmit an external force borne by the rear end portion to longitudinal members by means of the rear anti-collision beam and energy absorption boxes.
    Type: Application
    Filed: May 20, 2021
    Publication date: July 20, 2023
    Applicants: ZHEJIANG LIANKONG TECHNOLOGIES CO., LTD, ZHEJIANG GEELY HOLDING GROUP CO., LTD
    Inventors: Xiaoxiang JING, Kent Ove BOVELLAN, Tao FU, Qiang DAI, Jian LIANG, Ze YU, Shuhao WEI, Qun LIU
  • Jar
    Patent number: D999639
    Type: Grant
    Filed: November 4, 2020
    Date of Patent: September 26, 2023
    Assignee: HOUSEABLES, LLC
    Inventor: Jian-Liang Chen
  • Patent number: RE49903
    Abstract: The present invention discloses a radio frequency receiver and a receiving method, where the method includes: performing band splitting on a radio frequency signal of multiple carriers to obtain at least one band signal, and outputting the signal; separately performing filtering and amplification processing on the at least one band signal to obtain at least one processed signal; generating multiple oscillation signals; and selectively receiving a processed signal, of the at least one processed signal, that includes a target carrier; receiving an oscillation signal corresponding to the target carrier; selectively selecting a frequency division ratio from multiple frequency division ratios; using the frequency division ratio to perform frequency division on the received oscillation signal to obtain a local oscillator signal; using the local oscillator signal to perform frequency mixing on the received processed signal that includes the target carrier to obtain a mixed signal.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: April 2, 2024
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Min Yi, Jian Liang, Nianyong Zhu