Patents by Inventor Jian Wei

Jian Wei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240203091
    Abstract: The disclosure provides an external parameter determination method and an image processing device. The method includes the following. A plurality of images taken by a plurality of cameras for a specific pattern are obtained. A plurality of feature point combinations are found by performing a feature point matching algorithm on the plurality of images. A slope corresponding to each feature point combination is determined. A plurality of candidate combinations are found based on the slope corresponding to each feature point combination. External parameters between the plurality of cameras are determined based on the plurality of candidate combinations.
    Type: Application
    Filed: April 26, 2023
    Publication date: June 20, 2024
    Applicant: Acer Incorporated
    Inventors: Chen-Ju Cheng, Chao-Shih Huang, Jian-Wei Lee
  • Patent number: 12012588
    Abstract: The invention relates to the novel use of photosynthetic microorganisms to allow for the generation of micron-scale optical output mechanical sensors. In one preferred embodiment, the invention includes systems, methods and compositions for the use of photosynthetic microbes as biologically-based micron-scale tunable, light/chemical-mechanical energy transducers, sensors, and/or actuators.
    Type: Grant
    Filed: July 16, 2018
    Date of Patent: June 18, 2024
    Assignee: THE REGENTS OF THE UNIVERSITY OF COLORADO, A BODY CORPORATE
    Inventors: Jeffrey Carlyle Cameron, Kristin A. Moore, Evan B. Johnson, Jian Wei Tay, Janet B. Fox, Sabina Altus, David Bortz
  • Patent number: 12008388
    Abstract: Systems and methods of transferring data from memory to manage graphical output latency are provided. A device having a display receives an acoustic signal that carries a query. The device determines that a wireless controller is in a first state. The device establishes, based on receipt of the acoustic signal and the determination that the wireless controller device is in the first state, a first interaction mode for a graphical user interface rendered by the computing device for display via the display device. The device sets a prefetch parameter to a first value and prefetches the corresponding amount of electronic content items. The device establishes a second interaction mode and overrides the first value of the prefetch parameter to a second value, and prefetches a second amount of electronic content items corresponding to the second value.
    Type: Grant
    Filed: June 12, 2023
    Date of Patent: June 11, 2024
    Assignee: GOOGLE LLC
    Inventors: Jian Wei Leong, Leo Baghdassarian, Lucas Hiroshi De Carvalho Hirata
  • Publication number: 20240180224
    Abstract: The invention discloses a preparation method of mogroside and a processing device therefor, which relates to the technical field of sweet glycoside preparation. The device includes a collection cabin, a collection pipe, a peeling assembly and a centrifugal separation assembly, wherein the collection cabin is provided with the peeling assembly, the peeling assembly can peel a fresh fructus momordicae, and a peeled pulp enters the collection cabin so that the collection cabin can transport the pulp to the centrifugal separation assembly; the centrifugal separation assembly includes a separation cabin, a disc, a centrifugal cylinder and a filter pipe, wherein the disc is rotatably arranged in the separation cabin, a plurality of the centrifugal cylinders distributed in a circle are fixed at intervals on an outer peripheral side of the disc, the separation cabin being further provided with a liquid injection head corresponding to the centrifugal cylinder.
    Type: Application
    Filed: February 7, 2023
    Publication date: June 6, 2024
    Applicant: GUILIN SANLENG BIOTECH CO., LTD
    Inventors: Wude MAO, Rongjun TANG, Jian WEI, Haiyuan LIN, Xiaoyan LIANG
  • Publication number: 20240185858
    Abstract: In one example, a method includes method comprising: receiving audio data generated by a microphone of a current computing device; identifying, based on the audio data, one or more computing devices that each emitted a respective audio signal in response to speech reception being activated at the current computing device; and selecting either the current computing device or a particular computing device from the identified one or more computing devices to satisfy a spoken utterance determined based on the audio data.
    Type: Application
    Filed: February 13, 2024
    Publication date: June 6, 2024
    Inventor: Jian Wei Leong
  • Patent number: 12002539
    Abstract: A memory unit includes at least one memory cell and a computational cell. The at least one memory cell stores a weight. The at least one memory cell is controlled by a first word line and includes a local bit line transmitting the weight. The computational cell is connected to the at least one memory cell and receiving the weight via the local bit line. Each of an input bit line and an input bit line bar transmits a multi-bit input value. The computational cell is controlled by a second word line and an enable signal to generate a multi-bit output value on each of an output bit line and an output bit line bar according to the multi-bit input value multiplied by the weight. The computational cell is controlled by a first switching signal and a second switching signal for charge sharing.
    Type: Grant
    Filed: August 4, 2020
    Date of Patent: June 4, 2024
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Meng-Fan Chang, Yen-Chi Chou, Jian-Wei Su
  • Publication number: 20240170194
    Abstract: A magnetic element can include: at least one group of inner cores; where each group of inner cores comprises a lower magnetic core cover plate, a first winding, at least one middle magnetic core cover plate, a second winding, and an upper magnetic core cover plate that are stacked in sequence; where the first winding and the second winding are spaced by the at least one corresponding middle magnetic core cover plate; and where materials of the upper magnetic core cover plate, the middle magnetic core cover plate, and the lower magnetic core cover plate comprise a metal magnetic powder core material.
    Type: Application
    Filed: November 6, 2023
    Publication date: May 23, 2024
    Inventors: Ke Dai, Jian Wei, Jiajia Yan
  • Publication number: 20240161959
    Abstract: A module structure can include a first type structure including a first encapsulation body having a magnetic property, and at least one inductive element, where at least part of the inductive element is encapsulated in the first encapsulation body; a second type structure including a second encapsulation body having a non-magnetic property, and at least one non-inductive element, where the non-inductive element is encapsulated in the second encapsulation body; and pin structures located on exposed surfaces of the first type structure and/or the second type structure, in order to lead out corresponding electrodes.
    Type: Application
    Filed: November 2, 2023
    Publication date: May 16, 2024
    Inventors: Ke Dai, Jian Wei, Jiajia Yan, Chen Zhao
  • Publication number: 20240161958
    Abstract: An inductor can include at least one winding, where each winding comprises a coil body and at least two lead-out terminals being in contact with the coil body; a first encapsulation body configured to at least encapsulate part of the lead-out terminals and part of the coil body, and to expose the lead-out terminals; and where the first encapsulation body includes an insulating main material and magnetic particles dispersed in the insulating main material.
    Type: Application
    Filed: November 2, 2023
    Publication date: May 16, 2024
    Inventors: Ke Dai, Jian Wei, Jiajia Yan
  • Patent number: 11983267
    Abstract: A data processing method based on Trojan circuit detection includes controlling a processor, in a testing stage, to perform following steps: obtaining a plurality of characteristic values corresponding to a logic gate circuit; performing a distribution adjustment operation on the characteristic values to generate a plurality of adjusted characteristic values; and performing classification on the adjusted characteristic values to generate a logic identification result.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: May 14, 2024
    Assignee: INSTITUTE FOR INFORMATION INDUSTRY
    Inventors: Jian Wei Liao, Ting Yu Lin, Kai Chiang Wu, Jung Che Tsai
  • Patent number: 11967357
    Abstract: A memory unit with time domain edge delay accumulation for computing-in-memory applications is controlled by a first word line and a second word line. The memory unit includes at least one memory cell, at least one edge-delay cell multiplexor and at least one edge-delay cell. The at least one edge-delay cell includes a weight reader and a driver. The weight reader is configured to receive a weight and a multi-bit analog input voltage and generate a multi-bit voltage according to the weight and the multi-bit analog input voltage. The driver is connected to the weight reader and configured to receive an edge-input signal. The driver is configured to generate an edge-output signal having a delay time according to the edge-input signal and the multi-bit voltage. The delay time of the edge-output signal is positively correlated with the multi-bit analog input voltage multiplied by the weight.
    Type: Grant
    Filed: January 21, 2022
    Date of Patent: April 23, 2024
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Meng-Fan Chang, Ping-Chun Wu, Li-Yang Hong, Jin-Sheng Ren, Jian-Wei Su
  • Patent number: 11952576
    Abstract: A novel method of diluting the structures in the cell population, such that individual cells, dependent on the activity of the structures, become single measurement devices. This can be applied to all Bacterial Microcomparments (“BMCs”), organelles, and macromolecules, and could provide a universal method for the design of novel ones and understanding of the diverse structures. In one aspect the present invention provides A method of creating a bacterial strain with inducible and detectable carboxysomes. The method includes the steps of incorporating a labeled carbon-fixation enzyme into the genome of a bacterium; deleting all or a portion of the ccm operon from the bacterium; and reintroducing a ccm operon comprising an inducible promoter to create a ?ccm+ strain.
    Type: Grant
    Filed: November 16, 2020
    Date of Patent: April 9, 2024
    Assignee: The Regents of the University of Colorado, a body corporate
    Inventors: Jeffrey Carlyle Cameron, Nicholas C. Hill, Jian Wei Tay, Sabina Altus, David Matthew Bortz, Kristin Ann Moore
  • Publication number: 20240113856
    Abstract: The present invention provides an encryption determining method. The method includes the following steps: receiving a side channel signal; generating a filtered side channel signal by filtering noise within the side channel signal; generating a phasor signal by utilizing a filter to covert the filtered side channel signal; locating the encrypted segment by calculating a periodicity of the phasor signal utilizing a standard deviation window; extracting at least one encrypted characteristic from the encrypted segment; and generating an encryption analytic result by recognizing the at least one encrypted characteristic according to a characteristic recognition model; wherein the encryption analytic result includes a position of the encrypted segment within the side channel signal, and an encryption type corresponding to the side channel signal. The present invention is able to automatically and efficiently locate the encryption segment and analyze the encryption type corresponding to the side channel signal.
    Type: Application
    Filed: October 31, 2022
    Publication date: April 4, 2024
    Applicant: INSTITUTE FOR INFORMATION INDUSTRY
    Inventors: Jian-Wei LIAO, Cheng-En LEE, Ting-Yu LIN
  • Publication number: 20240106893
    Abstract: A filecoin cluster data transmission method and system based on RDMA, including: providing a RDMA interface; receiving and encapsulating sector data by a first node, invoking the RDMA interface to transmit the sector data, serially transmitting the sector data to a next encapsulation node; when receiving the sector data from a previous node, invoking the RDMA interface to directly transmit the sector data to a user mode memory of the node for encapsulation; invoking the RDMA interface to serially transmit the sector data back to the HCA card, and transmitting the sector data to a next node; receiving, by a last node, the sector data, invoking the RDMA interface to directly transmit the sector data to the user mode memory of the last node; invoking the RDMA interface to serially transmit the sector data back to the HCA card of the last node, and transmitting the sector data to distributed storage.
    Type: Application
    Filed: November 30, 2021
    Publication date: March 28, 2024
    Inventors: Xiaofei WANG, Jian WEI
  • Patent number: 11942263
    Abstract: A package device can include: a package body having a support body and an encapsulating body configured to encapsulate a conductive body of the package device; at least one extraction electrode electrically connected to the conductive body, and having a part exposed outside the package body; and where the support body is located on only part of a bottom surface of the encapsulating body, and protrudes from the bottom surface of the encapsulating body to form a cavity defined by the remaining exposed bottom surface of the encapsulating body and inner side surface of the supporting body.
    Type: Grant
    Filed: November 4, 2019
    Date of Patent: March 26, 2024
    Assignee: Silergy Semiconductor Technology (Hangzhou) LTD
    Inventors: Jian Wei, Ke Dai
  • Publication number: 20240088048
    Abstract: A chip structure provided herein includes a bridge structure including an interconnect bridge, a dielectric layer laterally surrounding the interconnect bridge and through dielectric vias extending from a top of the dielectric layer to a bottom of the dielectric layer, wherein a thickness of the interconnect bridge is identical to a height of each of the through dielectric vias; semiconductor dies disposed on the bridge structure, wherein each of the semiconductor dies overlaps both the interconnect bridge and the dielectric layer and is electrically connected to the interconnect bridge and at least one of the through dielectric vias; and a die support, the semiconductor dies being disposed between the die support and the bridge structure, wherein a sidewall of the die support is coplanar with a sidewall of the bridge structure.
    Type: Application
    Filed: January 10, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuo-Chiang Ting, Jian-Wei Hong, Sung-Feng Yeh
  • Publication number: 20240079051
    Abstract: Disclosed is a memory cell including a first transistor having a first terminal coupled to a bit line; a second transistor having a first terminal coupled to a bit line bar; a weight storage circuit coupled between a gate terminal of the first transistor and a gate terminal of the second transistor, storing a weight value, and determining to turn on the first transistor or the second transistor according to the weight value; and a driving circuit coupled to a second terminal of the first transistor, a second terminal of the second transistor, and at least one word line, receiving at least one threshold voltage and at least one input data from the word line, and determining whether to generate an operation current on a path of the turned-on first transistor or the turned-on second transistor according to the threshold voltage and the input data.
    Type: Application
    Filed: November 8, 2022
    Publication date: March 7, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Chih-Sheng Lin, Tuo-Hung Hou, Fu-Cheng Tsai, Jian-Wei Su, Kuo-Hua Tseng
  • Publication number: 20240079391
    Abstract: In an embodiment, a device includes: a first integrated circuit die comprising a semiconductor substrate and a first through-substrate via; a gap-fill dielectric around the first integrated circuit die, a surface of the gap-fill dielectric being substantially coplanar with an inactive surface of the semiconductor substrate and with a surface of the first through-substrate via; a dielectric layer on the surface of the gap-fill dielectric and the inactive surface of the semiconductor substrate; a first bond pad extending through the dielectric layer to contact the surface of the first through-substrate via, a width of the first bond pad being less than a width of the first through-substrate via; and a second integrated circuit die comprising a die connector bonded to the first bond pad.
    Type: Application
    Filed: January 10, 2023
    Publication date: March 7, 2024
    Inventors: Chia-Hao Hsu, Jian-Wei Hong, Kuo-Chiang Ting, Sung-Feng Yeh
  • Publication number: 20240079364
    Abstract: Die structures and methods of forming the same are described. In an embodiment, a device includes: a lower integrated circuit die; a first upper integrated circuit die face-to-face bonded to the lower integrated circuit die, the first upper integrated circuit die including a first semiconductor substrate and a first through-substrate via; a gap-fill dielectric around the first upper integrated circuit die, a top surface of the gap-fill dielectric being substantially coplanar with a top surface of the first semiconductor substrate and with a top surface of the first through-substrate via; and an interconnect structure including a first dielectric layer and first conductive vias, the first dielectric layer disposed on the top surface of the gap-fill dielectric and the top surface of the first semiconductor substrate, the first conductive vias extending through the first dielectric layer to contact the top surface of the first through-substrate via.
    Type: Application
    Filed: January 9, 2023
    Publication date: March 7, 2024
    Inventors: Chia-Hao Hsu, Jian-Wei Hong, Kuo-Chiang Ting, Sung-Feng Yeh
  • Publication number: 20240059285
    Abstract: In various examples, techniques for using future trajectory predictions for adaptive cruise control (ACC) are described. For instance, a vehicle may determine a future path(s) of the vehicle and a future path(s) of an object(s). The vehicle may then use a speed profile(s) and the future path(s) to determine a trajectory(ies) for the vehicle. The vehicle may then select a trajectory, such as based on the future path(s) of the object(s). Based on the trajectory, ACC of the vehicle may cause the vehicle to navigate at a speed or a velocity. This way, the vehicle is able to continue using ACC even when the driver makes a maneuver(s) or the system determined to make a maneuver, such as switching lanes or choosing a lane when a road splits.
    Type: Application
    Filed: August 19, 2022
    Publication date: February 22, 2024
    Inventors: Julia Ng, Jian Wei Leong, Nikolai Smolyanskiy, Yizhou Wang, Fangkai Yang, Nianfeng Wan, Chang Liu