Patents by Inventor Jian You

Jian You has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12283935
    Abstract: A radio frequency apparatus includes a power amplifier circuit, a signal coupling circuit, an extraction circuit, and a harmonic filter circuit. The power amplifier circuit is configured to amplify a differential signal to output a to-be-filtered signal. The signal coupling circuit includes a primary side inductor and a secondary side inductor. The signal coupling circuit is configured to convert the to-be-filtered signal received by the primary side inductor into a single-ended signal outputted from the secondary side inductor. The extraction circuit has a center tap. The extraction circuit is configured to inductively couple to the primary side inductor and output a common mode signal from the center tap. The harmonic filter circuit is configured to perform a harmonic filtering on the single-ended signal according to the common mode signal, such that the secondary side inductor of the signal coupling circuit outputs a filtered signal.
    Type: Grant
    Filed: August 11, 2022
    Date of Patent: April 22, 2025
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Hung-Han Chen, Hsiao-Tsung Yen, Jian-You Chen, Po-Chih Wang
  • Publication number: 20250078596
    Abstract: An authorization and unlocking method for a door lock is disclosed. A device binding operation is performed to bind a digital key to a digital door lock. The digital key is unlocked. The digital door lock is activated when the digital key is inserted into the digital door lock. It is determined whether the digital key is bound to the digital door lock. A network link between the digital door lock and the digital key is established if the digital key is bound to the digital door lock. It is determined whether the digital door lock is authorized by a remote authorization server. An unlock operation is performed on the digital door lock if the digital door lock is authorized by the remote authorization server.
    Type: Application
    Filed: September 1, 2023
    Publication date: March 6, 2025
    Inventor: JIAN-YOU HUANG
  • Patent number: 12176136
    Abstract: A transformer device includes a first coil, a second coil, and a third coil. The first coil includes a first ring structure, a second ring structure, a first connecting portion, and a first terminal, in which the first terminal is arranged on the first connecting portion and is located at a central location between the first ring structure and the second ring structure, the first terminal is connected to the first ring structure through the first connecting portion in a first direction, and connected to the second ring structure through the first connecting portion in a second direction, and the first direction is the opposite of the second direction. The second coil is configured to couple the first ring structure. The third coil is configured to couple the second ring structure, in which the second coil and the third coil have the same structure.
    Type: Grant
    Filed: May 6, 2021
    Date of Patent: December 24, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Hsiao-Tsung Yen, Jian-You Chen, Ka-Un Chan
  • Patent number: 12062480
    Abstract: An inductor device includes a first trace, a second trace, and a capacitor. The first trace includes at least two sub-traces. One terminal of each of the at least two sub-traces are coupled to each other at a first node. The second trace includes at least two sub-traces. One terminal of each of the at least two sub-traces are coupled to each other at a second node. The capacitor is coupled to the firs node and the second node.
    Type: Grant
    Filed: September 8, 2020
    Date of Patent: August 13, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Hsiao-Tsung Yen, Jian-You Chen, Ka-Un Chan
  • Publication number: 20240071849
    Abstract: A semiconductor package including one or more dam structures and the method of forming are provided. A semiconductor package may include an interposer, a semiconductor die bonded to a first side of the interposer, an encapsulant on the first side of the interposer encircling the semiconductor die, a substrate bonded to the a second side of the interposer, an underfill between the interposer and the substrate, and one or more of dam structures on the substrate. The one or more dam structures may be disposed adjacent respective corners of the interposer and may be in direct contact with the underfill. The coefficient of thermal expansion of the one or more of dam structures may be smaller than the coefficient of thermal expansion of the underfill.
    Type: Application
    Filed: August 26, 2022
    Publication date: February 29, 2024
    Inventors: Jian-You Chen, Kuan-Yu Huang, Li-Chung Kuo, Chen-Hsuan Tsai, Kung-Chen Yeh, Hsien-Ju Tsou, Ying-Ching Shih, Szu-Wei Lu
  • Patent number: 11869700
    Abstract: An inductor device includes first trace, second trace, third trace, fourth trace, first capacitor, and second capacitor. One terminal of each of the at least two sub-traces of first trace are coupled to each other at first node. One terminal of each of the at least two sub-traces of second trace are coupled to each other at second node. One terminal of third trace is coupled to second trace, and another terminal of third trace is coupled to first input/output terminal. One terminal of fourth trace is coupled to first trace, and another terminal of fourth trace is coupled to second input/output terminal. First capacitor is coupled to first node and second node. Second capacitor is coupled between first node and first input/output terminal, or coupled between first node and second input/output terminal, or coupled between first input/output terminal and second input/output terminal.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: January 9, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Hsiao-Tsung Yen, Jian-You Chen, Ka-Un Chan
  • Publication number: 20230050926
    Abstract: A radio frequency apparatus includes a power amplifier circuit, a signal coupling circuit, an extraction circuit, and a harmonic filter circuit. The power amplifier circuit is configured to amplify a differential signal to output a to-be-filtered signal. The signal coupling circuit includes a primary side inductor and a secondary side inductor. The signal coupling circuit is configured to convert the to-be-filtered signal received by the primary side inductor into a single-ended signal outputted from the secondary side inductor. The extraction circuit has a center tap. The extraction circuit is configured to inductively couple to the primary side inductor and output a common mode signal from the center tap. The harmonic filter circuit is configured to perform a harmonic filtering on the single-ended signal according to the common mode signal, such that the secondary side inductor of the signal coupling circuit outputs a filtered signal.
    Type: Application
    Filed: August 11, 2022
    Publication date: February 16, 2023
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventors: Hung-Han CHEN, Hsiao-Tsung YEN, Jian-You CHEN, Po-Chih WANG
  • Patent number: 11406526
    Abstract: This invention provides devices and systems and methods therefrom for properly controlling negative pressure applied to oral cavity, facilitating breathing and treating sleep apnea and snoring. The systems comprise a negative pressure system providing a vacuum source and an oral device comprising a shield, a tube passing through the shield, a flexible negative pressure deliverable part connected to the shield or the tube, an optional tongue protector, where the negative pressure deliverable part is conformable to the contour of the upper palate. Negative pressure is delivered to the front and back zones inside the oral cavity via the negative pressure deliverable part to eliminate air space in the oral cavity.
    Type: Grant
    Filed: January 13, 2014
    Date of Patent: August 9, 2022
    Assignee: Somnics, Inc.
    Inventors: Chung-Chu Chen, Yin-Ruei Chen, Ming-Jian You, Wen-Yen Huang
  • Publication number: 20220076872
    Abstract: An inductor device includes a first trace, a second trace, and a capacitor. The first trace includes at least two sub-traces. One terminal of each of the at least two sub-traces are coupled to each other at a first node. The second trace includes at least two sub-traces. One terminal of each of the at least two sub-traces are coupled to each other at a second node. The capacitor is coupled to the firs node and the second node.
    Type: Application
    Filed: November 14, 2021
    Publication date: March 10, 2022
    Inventors: Hsiao-Tsung Yen, Jian-You Chen, Ka-Un Chan
  • Patent number: 11246742
    Abstract: This invention provides devices and systems and methods therefrom for properly controlling negative pressure applied to oral cavity, facilitating breathing and treating sleep apnea and snoring. The systems comprise a negative pressure system providing a vacuum source and an oral device comprising a shield, a tube passing through the shield, a flexible negative pressure deliverable part connected to the shield or the tube, an optional tongue protector, where the negative pressure deliverable part is conformable to the contour of the upper palate. Negative pressure is delivered to the front and back zones inside the oral cavity via the negative pressure deliverable part to eliminate air space in the oral cavity.
    Type: Grant
    Filed: January 10, 2014
    Date of Patent: February 15, 2022
    Inventors: Chung-Chu Chen, Yin-Ruei Chen, Ming-jian You, Wen-Yen Huang
  • Publication number: 20210358681
    Abstract: A transformer device includes a first coil, a second coil, and a third coil. The first coil includes a first ring structure, a second ring structure, a first connecting portion, and a first terminal, in which the first terminal is arranged on the first connecting portion and is located at a central location between the first ring structure and the second ring structure, the first terminal is connected to the first ring structure through the first connecting portion in a first direction, and connected to the second ring structure through the first connecting portion in a second direction, and the first direction is the opposite of the second direction. The second coil is configured to couple the first ring structure. The third coil is configured to couple the second ring structure, in which the second coil and the third coil have the same structure.
    Type: Application
    Filed: May 6, 2021
    Publication date: November 18, 2021
    Inventors: HSIAO-TSUNG YEN, JIAN-YOU CHEN, KA-UN CHAN
  • Patent number: 11095324
    Abstract: A wireless transmission circuit includes a first induction circuit, a second induction circuit, a detection circuit, a first signal adjustment circuit, and a third induction circuit. The first induction circuit is configured to receive a first signal outputted from a power amplifier. The second induction circuit is configured to output the received first signal as a second signal. The detection circuit is configured to detect a common mode signal associated with the first signal. The first signal adjustment circuit is configured to adjust a phase or an amplitude of the common mode signal to generate a third signal. The third induction circuit is configured to receive the third signal and be coupled to the second induction circuit to reduce a second harmonic in the second signal.
    Type: Grant
    Filed: March 13, 2020
    Date of Patent: August 17, 2021
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Jian-You Chen, Hsiao-Tsung Yen, Beng-Meng Chen
  • Publication number: 20210074465
    Abstract: An inductor device includes a first trace, a second trace, and a capacitor. The first trace includes at least two sub-traces. One terminal of each of the at least two sub-traces are coupled to each other at a first node. The second trace includes at least two sub-traces. One terminal of each of the at least two sub-traces are coupled to each other at a second node. The capacitor is coupled to the firs node and the second node.
    Type: Application
    Filed: September 8, 2020
    Publication date: March 11, 2021
    Inventors: Hsiao-Tsung YEN, Jian-You CHEN, Ka-Un CHAN
  • Publication number: 20210074466
    Abstract: An inductor device includes first trace, second trace, third trace, fourth trace, first capacitor, and second capacitor. One terminal of each of the at least two sub-traces of first trace are coupled to each other at first node. One terminal of each of the at least two sub-traces of second trace are coupled to each other at second node. One terminal of third trace is coupled to second trace, and another terminal of third trace is coupled to first input/output terminal. One terminal of fourth trace is coupled to first trace, and another terminal of fourth trace is coupled to second input/output terminal. First capacitor is coupled to first node and second node. Second capacitor is coupled between firs node and first input/output terminal, or coupled between first node and second input/output terminal, or coupled between first input/output terminal and second input/output terminal.
    Type: Application
    Filed: September 9, 2020
    Publication date: March 11, 2021
    Inventors: Hsiao-Tsung YEN, Jian-You CHEN, Ka-Un CHAN
  • Publication number: 20210044309
    Abstract: A wireless transmission circuit includes a first induction circuit, a second induction circuit, a detection circuit, a first signal adjustment circuit, and a third induction circuit. The first induction circuit is configured to receive a first signal outputted from a power amplifier. The second induction circuit is configured to output the received first signal as a second signal. The detection circuit is configured to detect a common mode signal associated with the first signal. The first signal adjustment circuit is configured to adjust a phase or an amplitude of the common mode signal to generate a third signal. The third induction circuit is configured to receive the third signal and be coupled to the second induction circuit to reduce a second harmonic in the second signal.
    Type: Application
    Filed: March 13, 2020
    Publication date: February 11, 2021
    Inventors: Jian-You CHEN, Hsiao-Tsung YEN, Beng-Meng CHEN
  • Patent number: 10504812
    Abstract: A heating-cooling module is disposed on an electronic component and includes a heat-dissipation element, a first thermal conductive layer, a heater, and a second thermal conductive layer. The heat-dissipation element is arranged over the electronic component. The first thermal conductive layer is arranged between the electronic component and the heat-dissipation element. The heater is arranged over the electronic component, in which the heater and the heat-dissipation element are located above the same side of the electronic component, and the heater and the heat-dissipation element are separated from each other. The second thermal conductive layer is arranged between the electronic component and the heater and is separated from the first thermal conductive layer.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: December 10, 2019
    Assignee: Chicony Electronics Co., Ltd.
    Inventor: Jih-Jian You
  • Patent number: 10483937
    Abstract: A transceiver circuit including: a substrate; a signal coupler configured on the substrate and including a coiled first conductive layer pattern; and a notch filter configured on the substrate and including a coiled second conductive layer pattern; wherein each of the first conductive layer pattern and the second conductive layer pattern is arranged as a substantially symmetrical pattern with respect to a first virtual axis.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: November 19, 2019
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Jian-You Chen, Cheng-Wei Luo, Kuan-Yu Shih
  • Patent number: 10343202
    Abstract: The present invention discloses a method for synchronously processing dual belt materials. The method comprises steps of feeding, processing, detecting, assembling and outputting finished products. The step of feeding materials comprises cleaning, dividing materials, positioning and feeding. The step of assembling comprises pushing and assembling. A dual-belt-material feeder is used for feeding, and a dual-belt-material mold is used for punching. The dual-belt-material feeder (1) comprises a moving feeding device (11), a fixed feeding device (13) and two guide frames (14). The dual-belt-material mold comprises two punching molds. The beneficial effects of the method for synchronously processing dual belt materials are that: the method can be used for producing thin wall miniature assembly parts in a single line and assembling the thin wall miniature assembly parts on line, so that problems caused by that the thin wall miniature assembly parts are produced in two production lines can be avoided.
    Type: Grant
    Filed: May 25, 2016
    Date of Patent: July 9, 2019
    Assignee: CHENGDU HOMIN TECHNOLOGY CO., LTD.
    Inventors: Daojun Sun, Guofu Tian, Jian You, Yan Zhuang, Jiazhen Gong, Junjie Guo, Zhouyan Wang
  • Publication number: 20190165751
    Abstract: A transceiver circuit including: a substrate; a signal coupler configured on the substrate and including a coiled first conductive layer pattern; and a notch filter configured on the substrate and including a coiled second conductive layer pattern; wherein each of the first conductive layer pattern and the second conductive layer pattern is arranged as a substantially symmetrical pattern with respect to a first virtual axis.
    Type: Application
    Filed: September 27, 2018
    Publication date: May 30, 2019
    Inventors: JIAN-YOU CHEN, CHENG-WEI LUO, KUAN-YU SHIH
  • Patent number: 10256716
    Abstract: A voltage feed-forward circuit, a multiplier using the voltage feed-forward circuit, and a power factor correction circuit using the multiplier. The voltage feed-forward circuit is used to maintain and output a peak voltage (Vff) of an input voltage (Vin), and includes first switch element (S1), a logic control unit (U1), a second switch element (S2), a first capacitor (C1), a third switch element (S3) and a second capacitor (C2). The first control signal (?1) and the second control signal (?2) begin to be provided at the same time, and the first control signal (?1) stops being provided when a voltage of the second end of the first capacitor (C1) is greater than the peak voltage (Vff) of the input voltage (Vin).
    Type: Grant
    Filed: January 25, 2016
    Date of Patent: April 9, 2019
    Assignee: COSEMITECH (SHANGHAI) CO., LTD.
    Inventors: Jian You, Xiaoping Yin