Patents by Inventor Jiang He

Jiang He has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240132476
    Abstract: The present invention discloses compounds of Formula (I), and pharmaceutically acceptable salts and esters thereof: which inhibit the Apoptosis signal-regulating kinase 1 (ASK-1), which is associated with autoimmune disorders, neurodegenerative disorders, inflammatory diseases, chronic kidney disease, cardiovascular disease. The present invention further relates to pharmaceutical compositions comprising the aforementioned compounds for administration to a subject suffering from ASK-1 related disease. The invention also relates to methods of treating an ASK-1 related disease in a subject by administering a pharmaceutical composition comprising the compounds of the present invention. The present invention specifically relates to methods of treating ASK-1 associated with hepatic steatosis, including non-alcoholic fatty liver disease (NAFLD) and non-alcoholic steatohepatitis (NASH).
    Type: Application
    Filed: October 25, 2023
    Publication date: April 25, 2024
    Inventors: Guoqiang Wang, Ruichao Shen, Brett Granger, Jing He, Xuechao Xing, Yong He, Jiang Long, Jun Ma, Bin Wang, Yat Sun Or
  • Patent number: 11958879
    Abstract: The present invention provides compounds represented by Formula I, or pharmaceutically acceptable salts, stereoisomers, solvates, hydrates or combination thereof, The invention also provides pharmaceutical compositions comprising these compounds and methods of using this compounds for treating FXR-mediated or TGR5-mediated diseases or conditions.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: April 16, 2024
    Assignee: Enanta Pharmaceuticals, Inc.
    Inventors: Guoqiang Wang, Yat Sun Or, Ruichao Shen, Xuechao Xing, Jiang Long, Peng Dai, Brett Granger, Jing He
  • Publication number: 20240104943
    Abstract: A method for detecting an interior condition of a vehicle is provided to use a camera device and a radar device to acquire images and point cloud datasets with respect to an interior space of the vehicle. A computing device generates a synthesized image based on the images and the point cloud datasets, obtains a skeleton feature dataset and a facial feature dataset with respect to a living object in the synthesized image, and determines the interior condition of the vehicle based on the skeleton feature dataset and the facial feature dataset.
    Type: Application
    Filed: December 15, 2022
    Publication date: March 28, 2024
    Applicant: Automotive Research & Testing Center
    Inventors: Yi-Feng SU, Zi-Rong DING, Meng-Jiang HE
  • Patent number: 11940269
    Abstract: A system for determining a location of a feature of an object, the system including a first marker including a first area and a surface having two parallel edges and a third edge disposed perpendicularly to the two parallel edges, the two parallel edges are disposed about a first central axis of the two parallel edges; and a sensor configured to provide a distance from the sensor to a portion of the first marker, wherein the sensor is adapted to obtain distances between the sensor and the first marker and an environment surrounding the first marker to form a first map representing the distances corresponding to locations from which the distances are obtained using the sensor and the location of the feature of the object is determined based on at least one corner corresponding to an intersection formed of the third edge and one of the two parallel edges.
    Type: Grant
    Filed: September 29, 2023
    Date of Patent: March 26, 2024
    Assignee: MLOptic Corp.
    Inventors: Bailing Hou, Wei Zhou, Jiang He, Yuanqin Wang
  • Patent number: 11936571
    Abstract: Examples described herein relate to offload reliable transport management to a network interface device and store packets to be resent, based on received packet receipt acknowledgements (ACKs), into one or more kernel space queues that are also accessible in user space.
    Type: Grant
    Filed: November 4, 2022
    Date of Patent: March 19, 2024
    Assignee: Intel Corporation
    Inventors: Shaopeng He, Cunming Liang, Jiang Yu, Ziye Yang, Ping Yu, Bo Cui, Jingjing Wu, Liang Ma, Hongjun Ni, Zhiguo Wen, Changpeng Liu, Anjali Singhai Jain, Daniel Daly, Yadong Li
  • Publication number: 20240083954
    Abstract: The present invention provides HIV-1 vaccine immunogens. Some of the immunogens contain a soluble gp140-derived protein that harbors a modified N-terminus of the HR1 region in gp41. Some of the immunogens contain an HIV-1 Env-derived trimer protein that is presented on a nanoparticle platform. The invention also provides methods of using the HIV-1 vaccine immunogens for eliciting an immune response or treating HIV infections.
    Type: Application
    Filed: August 15, 2023
    Publication date: March 14, 2024
    Inventors: Leopold Kong, Ian A. Wilson, Natalia de Val, Andrew B. Ward, Dennis Burton, Linling He, Jiang Zhu
  • Publication number: 20240088284
    Abstract: Disclosed is a semiconductor device and a method for fabricating such semiconductor device, specifically a High Electron Mobility Transistor (HEMT) with a back barrier layer for blocking electron leakage and improve threshold voltage. In one embodiment, a semiconductor device, includes: a Gallium Nitride (GaN) layer; a front barrier layer over the GaN layer; a source electrode, a drain electrode and a gate electrode formed over the front barrier layer; a 2-Dimensional Electron Gas (2-DEG) in the GaN layer at a first interface between the GaN layer and the front barrier layer; and a back barrier layer in the GaN layer, wherein the back barrier layer comprises Aluminum Nitride (AlN).
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Inventors: Chia-Ling YEH, Pravanshu MOHANTA, Ching-Yu CHEN, Jiang-He XIE, Yu-Shine LIN
  • Publication number: 20240079486
    Abstract: A semiconductor structure includes a barrier layer over a channel layer, and a doped layer over the barrier layer. A gate electrode is over the doped layer and a doped interface layer is formed between the barrier layer and the doped layer. The doped interface layer includes a dopant and a metal. The metal has a metal concentration that follows a gradient function from a highest metal concentration to a lowest metal concentration.
    Type: Application
    Filed: March 27, 2023
    Publication date: March 7, 2024
    Inventors: Wei-Ting CHANG, Ching Yu CHEN, Jiang-He XIE
  • Patent number: 11867501
    Abstract: A system for calibrating an equipment, the system including a beam splitter; a first reticle configured to be removably attached to the equipment; and an image capture device including an image plane, wherein an image of the first reticle is configured to be received by way of the beam splitter at the image plane along an optical axis of the beam splitter, wherein the orientation as indicated by the first reticle is compared to an orientation of the image plane and if the orientation as indicated by the first reticle differs from the orientation of the image plane, the equipment is rotated about the optical axis of the beam splitter such that the orientation as indicated by the first reticle matches the orientation of the image plane.
    Type: Grant
    Filed: December 28, 2021
    Date of Patent: January 9, 2024
    Assignee: MLOptic Corp.
    Inventors: Pengfei Wu, Wei Zhou, Jiang He, Siyuan Liang
  • Patent number: 11871518
    Abstract: A backlight module and a display device is disclosed. The backlight module includes a backplate, a light board framework, and assembled light board arranged in sequence. The assembled light board include multiple light boards with a seam formed between adjacent light boards. The light board framework is arranged on the backplate and includes a main body defining multiple mounting grooves provided in a number equal to the number of the light boards in the assembled light board. Each of the light boards is installed in one of the mounting grooves. A supplementary light-emitting diode (LED) is disposed between adjacent mounting grooves to supplement light for the seam between every two adjacent ones of the light boards.
    Type: Grant
    Filed: June 19, 2023
    Date of Patent: January 9, 2024
    Assignee: HKC CORPORATION LIMITED
    Inventors: Jiang He, Haijiang Yuan
  • Patent number: 11860380
    Abstract: An alignment tool including a first and a second positioning system configured for positioning and orientating a first lens and a second lens respectively, wherein a light beam is configured to be disposed through the first lens and the second lens to cast a light spot on the image plane, if the light spot does not stay stationary on the image plane when at least one of the first lens and the second lens is rotated about the central axis of the light beam, at least one of the first positioning system and the second positioning system is actuated to alter at least one of the position and orientation of at least one of the first lens and the second lens until the light spot becomes stationary on the image plane, indicating the first lens is coaxially disposed with the second lens.
    Type: Grant
    Filed: August 15, 2023
    Date of Patent: January 2, 2024
    Assignee: MLOptic Corp.
    Inventors: Wei Zhou, Yubo Guan, Jiang He
  • Patent number: 11852464
    Abstract: A chromatic confocal sensor configured for calibrating an orientation of an equipment about the optical axis of the chromatic confocal sensor, wherein the equipment is disposed at a first orientation about the optical axis of the chromatic confocal sensor, the chromatic confocal sensor including a light source, a collimator, a lens and a reticle, wherein the light source, the collimator and the lens are coaxially disposed along the optical axis, the reticle is configured to be interposable between the collimator and the lens along the optical axis, an image is configured to be cast by the light source through the collimator, the reticle and the lens on the equipment, the image is disposed at a second orientation about the optical axis and the equipment is calibratable by aligning the equipment with the image such that the first orientation approaches the second orientation.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: December 26, 2023
    Assignee: MLOptic Corp.
    Inventors: Wei Zhou, Jiang He, Siyuan Liang
  • Patent number: 11855199
    Abstract: Disclosed is a semiconductor device and a method for fabricating such semiconductor device, specifically a High Electron Mobility Transistor (HEMT) with a back barrier layer for blocking electron leakage and improve threshold voltage. In one embodiment, a semiconductor device, includes: a Gallium Nitride (GaN) layer; a front barrier layer over the GaN layer; a source electrode, a drain electrode and a gate electrode formed over the front barrier layer; a 2-Dimensional Electron Gas (2-DEG) in the GaN layer at a first interface between the GaN layer and the front barrier layer; and a back barrier layer in the GaN layer, wherein the back barrier layer comprises Aluminum Nitride (AlN).
    Type: Grant
    Filed: October 29, 2020
    Date of Patent: December 26, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia-Ling Yeh, Pravanshu Mohanta, Ching-Yu Chen, Jiang-He Xie, Yu-Shine Lin
  • Patent number: 11843042
    Abstract: Structures and methods for controlling dopant diffusion and activation are disclosed. In one example, a semiconductor structure is disclosed. The semiconductor structure includes: a channel layer; a barrier layer over the channel layer; a gate electrode over the barrier layer; and a doped layer formed between the barrier layer and the gate electrode. The doped layer includes (a) an interface layer in contact with the barrier layer and (b) a main layer between the interface layer and the gate electrode. The doped layer comprises a dopant whose doping concentration in the interface layer is lower than that in the main layer.
    Type: Grant
    Filed: August 18, 2021
    Date of Patent: December 12, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ching-Yu Chen, Wei-Ting Chang, Yu-Shine Lin, Jiang-He Xie
  • Publication number: 20230387282
    Abstract: A method of manufacturing a High-Electron-Mobility Transistor (HEMT) includes: preparing a substrate; forming a first buffer over the substrate; forming a second buffer over the first buffer, wherein forming the second buffer includes doping a first thickness of a material such as gallium nitride (GaN) with a first concentration of a dopant such as carbon, and doping a second thickness of the material with a second concentration of the dopant such that the second concentration of dopant has a gradient though the second thickness which progressively decreases in a direction away from the first thickness; forming a channel layer such as a GaN channel over the second buffer; forming a barrier layer such as aluminum gallium nitride (AlGaN) over the channel layer; and forming drain, source and gate terminals for the HEMT.
    Type: Application
    Filed: May 25, 2022
    Publication date: November 30, 2023
    Inventors: Pravanshu Mohanta, Wei-Ting Chang, Ching Yu Chen, Jiang-He Xie
  • Publication number: 20230377881
    Abstract: Strain relief trenches may be formed in a substrate prior to growth of an epitaxial layer on the substrate. The trenches may reduce the stresses and strains on the epitaxial layer that occur during the epitaxial growth process due to differences in material properties (e.g., lattice mismatches, differences in thermal expansion coefficients, and/or the like) between the epitaxial layer material and the substrate material. The stress and strain relief provided by the trenches may reduce or eliminate cracks and/or other types of defects in the epitaxial layer and the substrate, may reduce and/or eliminate bowing and warping of the substrate, may reduce breakage of the substrate, and/or the like. This may increase the center-to-edge quality of the epitaxial layer, may permit epitaxial layers to be grown on larger substrates, and/or the like.
    Type: Application
    Filed: July 31, 2023
    Publication date: November 23, 2023
    Inventors: Yi-Chuan LO, Pravanshu MOHANTA, Jiang-He XIE, Ching Yu CHEN, Ming-Tsung CHEN, Chia-Ling YEH
  • Patent number: 11811591
    Abstract: Embodiments of the present disclosure provide methods and apparatuses for network communication. A method comprises determining a link between an edge device of a second network and the first edge device of the first network is failed or the edge device of the second network is failed or an identifier of an Ethernet segment corresponding to the edge device of the second network has been changed; and advertising a first message including withdrawal of the Ethernet segment corresponding to the edge device of the second network and a corresponding substitution Ethernet segment of the second network, wherein the corresponding substitution Ethernet segment of the second network can be used by one or more other edge devices of the first network receiving the first message to switch routes associated with the Ethernet segment corresponding to the edge device of the second network to the corresponding substitution Ethernet segment of the second network.
    Type: Grant
    Filed: May 31, 2019
    Date of Patent: November 7, 2023
    Assignee: TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
    Inventors: Jiang He, Zhenning Zhao, Bolin Nie
  • Patent number: 11804374
    Abstract: Strain relief trenches may be formed in a substrate prior to growth of an epitaxial layer on the substrate. The trenches may reduce the stresses and strains on the epitaxial layer that occur during the epitaxial growth process due to differences in material properties (e.g., lattice mismatches, differences in thermal expansion coefficients, and/or the like) between the epitaxial layer material and the substrate material. The stress and strain relief provided by the trenches may reduce or eliminate cracks and/or other types of defects in the epitaxial layer and the substrate, may reduce and/or eliminate bowing and warping of the substrate, may reduce breakage of the substrate, and/or the like. This may increase the center-to-edge quality of the epitaxial layer, may permit epitaxial layers to be grown on larger substrates, and/or the like.
    Type: Grant
    Filed: October 27, 2020
    Date of Patent: October 31, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Chuan Lo, Pravanshu Mohanta, Jiang-He Xie, Ching Yu Chen, Ming-Tsung Chen, Chia-Ling Yeh
  • Publication number: 20230279465
    Abstract: The present disclosure is generally directed to methods for anchoring nucleic acid in a matrix and subsequently imaging nucleic acid targets (e.g. RNA transcript molecules) within tissue samples, for example, formalin-fixed paraffin-embedded (FFPE) tissue sections wherein the nucleic acid may be fragmented.
    Type: Application
    Filed: February 17, 2023
    Publication date: September 7, 2023
    Inventors: Jiang He, Lizhi He, Arpan Ghosh
  • Patent number: 11721541
    Abstract: A method for forming a semiconductor arrangement is provided. The method includes forming a patterned photoresist over a top surface of a substrate. The method includes doping a first portion of the substrate using the patterned photoresist. The method includes removing the patterned photoresist using a gas comprising fluoride, wherein fluoride residue from the gas remains on the top surface of the substrate after removing the patterned photoresist. The method includes treating the substrate with nitrous oxide to remove the fluoride residue.
    Type: Grant
    Filed: March 3, 2021
    Date of Patent: August 8, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Ting-Jui Chen, Chen Chih-Fen, Jason Yu, Tung-Hsi Hsieh, Jiang-He Xie