Abstract: Methods for reducing contact resistance include performing a selective titanium silicide (TiSi) deposition process on a middle of the line (MOL) contact structure that includes a cavity in a substrate of dielectric material. The contact structure also includes a silicon-based connection portion at a bottom of the cavity. The selective TiSi deposition process is selective to silicon-based material over dielectric material. The methods also include performing a selective deposition process of a metal material on the MOL contact structure. The selective deposition process is selective to TiSi material over dielectric material and forms a silicide capping layer on the silicon-based connection portion. The methods further include performing a seed layer deposition process of the metal material on the contact structure.

Abstract: A method and apparatus for a gap-fill in semiconductor devices are provided. The method includes forming a metal seed layer on an exposed surface of the substrate, wherein the substrate has features in the form of trenches or vias formed in a top surface of the substrate, the features having sidewalls and a bottom surface extending between the sidewalls. A gradient oxidation process is performed in a first process chamber to oxidize exposed portions of the metal seed layer to form a metal oxide, wherein the gradient oxidation process preferentially oxidizes a field region of the substrate over the bottom surface of the features. An etch back process is performed in the first process chamber removes or reduces the oxidized portion of the seed layer. A metal gap-fill process fills or partially fills the features with a gap fill material.

Abstract: Methods of depositing a metal silicide on a substrate are provided herein. In some embodiments, a method of depositing a metal silicide on a substrate having a silicon containing surface includes: creating a plasma comprising a first gas in a plasma region in a chemical vapor deposition (CVD) chamber, wherein the plasma region is disposed between a lid heater and a showerhead; flowing the first gas through a plurality of first openings of the showerhead to an activation region in the CVD chamber disposed between the showerhead and the substrate; flowing a second gas comprising a metal precursor in a non-plasma state through a plurality of second openings of the showerhead to the activation region, wherein the plurality of second openings are fluidly independent from the plurality of first openings within the showerhead; mixing the first gas with the second gas to activate the second gas in the activation region; and exposing the silicon containing surface of the substrate to the activated second gas.

Abstract: Embodiments of the disclosure include a method of forming contact structure on a semiconductor substrate. The method includes treating a native oxide layer formed on a contact junction, wherein treating the native oxide layer forms a silica salt layer on the contact junction disposed within a contact feature that includes one or more surfaces that comprise silicon nitride. Then exposing the silica salt layer and the one or more surfaces to a plasma comprising oxygen, wherein the plasma forms a silicon oxynitride material on the one or more surfaces. Then removing the second silica salt layer, selectively forming a metal silicide layer on the contact junction, and then filling the contact feature with a metal, wherein filling the feature comprises selectively depositing a metal layer over the selectively formed metal silicide layer.

Abstract: Embodiments of the disclosure provide a method that includes delivering a pulsed radio frequency (RF) signal from a source RF generator to an electrode of a processing chamber. A plasma is formed in a processing region of the processing chamber based on the pulsed RF signal. The plasma is disposed between the electrode and a substrate. The pulsed RF signal is caused to have a duty cycle in a range of 5 to 15 percent. The pulsed RF signal is caused to have an off-time in a range of 50 to 250 microseconds. A first material is deposited on a second material of the substrate and a third material of the substrate based on the duty cycle and the off-time.

Abstract: Embodiments described herein provide methods for atomic layer deposition and atomic layer etching of high aspect ratio structures. In some embodiments, a pulsed gas dilution method is provided. The method includes providing a substrate, the substrate includes a cavity, the cavity having a first surface and a second surface, where the first surface is disposed below the second surface in the cavity. The method includes supplying a first gas, pulsing a second gas at a high pressure, and creating a concentration gradient where there is a higher concentration of the first gas at the first surface of the cavity.

Abstract: Embodiments of the present principles generally relate to forming low resistivity contacts for semiconductor device formation. In some embodiments, a method of forming a metal silicide layer on a surface of a contact structure includes depositing a first layer including a metal on a first surface that includes silicon and a second surface that includes a dielectric material by providing a carrier gas, a metal-containing precursor, and a hydrogen-containing precursor to a deposition chamber and applying an RF power while maintaining the substrate at a first temperature. The method includes delivering a gas mixture including titanium tetrachloride (TiCl4) to the first surface and the second surface, while maintaining the substrate at the first temperature, to remove at least a portion of the deposited metal and cyclically repeating the metal deposition and the delivering the gas mixture processes to reach the desired thickness of the metal silicide layer.

Abstract: The present disclosure generally provides methods of forming contact structures on semiconductor substrates. The method includes forming a titanium layer on a surface of the contact structure. The contact structure includes a feature formed in a surface of the semiconductor substrate. The feature includes an opening that is defined by a silicon containing contact, a bottom surface, and sidewalls, which comprise a dielectric material. The titanium layer is at least formed over the sidewalls and the silicon containing contact. A first selective capping layer is formed. The first selective capping layer is formed over the titanium layer. A second selective capping layer is formed. The second selective capping layer is formed over the silicon containing contact, where at least a portion of the formed titanium layer is disposed between the second selective capping layer and the surface of the silicon containing contact.

Abstract: The present disclosure generally provides methods of forming contact structures on semiconductor substrates. The methods include forming a first metal containing layer on a surface of the contact structure and forming a second metal containing layer over the first metal containing layer. Performing a gradient etch process including exposing the first metal containing layer and the second metal containing layer to an etchant gas containing plasma to remove at least a portion of the first metal containing layer and the second metal containing layer from the sidewalls. Performing a selective etch process including a deposition operation, an etch operation and a trim operation. Performing a post etch treatment process including exposing the first metal containing layer and a carbon-containing passivation layer with a hydrogen plasma to remove at least a portion of the carbon-containing passivation layer.

Abstract: The present disclosure generally provides methods of forming contact structures on semiconductor substrates. The methods include forming a metal silicide layer on a surface of a contact structure by maintaining a first temperature of a substrate and providing a first carrier gas, a first metal-containing precursor, and a first hydrogen-containing precursor to a first deposition chamber. The contact structure includes a feature formed in a surface of the semiconductor substrate. The metal silicide layer is formed over the sidewalls and the silicon containing contact. The metal silicide layer is exposed to a chlorine containing plasma to remove at least a portion of the metal silicide layer formed on the sidewalls. A metal layer is formed on a surface of the silicon containing contact. A portion of the formed metal silicide layer is disposed between the metal layer and the surface of the silicon containing contact.

Abstract: Methods of depositing titanium silicide (TiSi) in the formation of semiconductor structures are described. The methods include thermal chemical vapor deposition (CVD) in which a semiconductor substrate in a semiconductor processing chamber is exposed to a titanium-containing precursor, a silicon-containing precursor, and hydrogen (H2) to deposit the titanium silicide (TiSi) layer directly on the semiconductor substrate. Methods of selectively depositing titanium silicide (TiSi) in the formation of semiconductor structures, e.g., an n-type transistor and a p-type transistor, are also described.

Abstract: Embodiments of the present disclosure generally relate to methods and processes for selectively depositing a metal fill layer into a feature on the surface of a semiconductor structure. In some embodiments, a method of forming a contact structure includes performing a preclean operation on a contact structure to form a precleaned contact structure. The contact structure includes a silicon-based portion exposed in a cavity of a substrate. The method further includes depositing a metal layer over the precleaned contact structure to form a deposited contact structure. The method further includes introducing a metal halide precursor to the deposited contact structure to at least partially remove the second layer from the deposited contact structure to form an etched contact structure. The method further includes depositing a metal fill layer onto the first layer to form a filled contact structure. The deposited metal fill layer comprises a super conformal profile.

Abstract: Embodiments of the disclosure relate to methods using an oligomer film to protect a substrate surface. The oligomer film is formed on the substrate surface with a first feature and a second feature each having a feature depth. The first feature has a first critical dimension (CD) and the second feature has a second CD. The semiconductor substrate surface is exposed to one or more monomers to form the oligomer film, and the oligomer film forms selectively on the bottom and fills a portion of the feature depth. The oligomer film fills the feature depth to substantially the same or the same height in each of the first feature and the second feature. Methods of forming semiconductor devices using the oligomer film are also disclosed.

Abstract: Embodiments of the disclosure relate to methods for selectively removing metal material from the top surface and sidewalls of a feature. The metal material which is covered by a flowable polymer material remains unaffected. In some embodiments, the metal material is formed by physical vapor deposition resulting in a relatively thin sidewall thickness. Any metal material remaining on the sidewall after removal of the metal material from the top surface may be etched by an additional etch process. The resulting metal layer at the bottom of the feature facilitates selective metal gapfill of the feature.

Abstract: A contact structure includes a cavity comprising a device contact formed on a surface of a substrate, a bottom surface, and sidewalls. A metal silicide layer disposed over the surface of the device contact, the bottom surface, and the sidewalls of the cavity, and a treated surface formed over a portion of the metal silicide layer disposed over the sidewalls of the cavity.