Abstract: A display substrate and a display device are provided, which includes a pixel unit, the display substrate includes a semiconductor layer, a first metal layer, a second metal layer and a first conductive layer, the first metal layer includes a first reset control signal line and a gate signal line; the second metal layer includes a first initialization signal line and a second initialization signal line; the first conductive layer includes a first connection structure and a second connection structure, a first end of the first connection structure is electrically connected with the second initialization signal line and the first connection structure extends in the second direction, a first end of the second connection structure is electrically connected with the first initialization signal line and the second connection structure extends in the second direction; the semiconductor layer includes a first connection part.

Abstract: A display substrate and a display device are provided. In the display substrate, the shift register unit includes a charge pump circuit, the charge pump circuit includes a first capacitor and a first transistor, and the charge pump circuit is electrically connected with a first input node and a first node, respectively; a first electrode plate of the first capacitor is connected with the first clock signal line, a second electrode plate of the first capacitor is connected with the first input node, a gate electrode of the first transistor is connected with a first electrode of the first transistor, a second electrode plate of the first capacitor is provided with a first portion, and the first portion of the second electrode plate of the first capacitor and the gate electrode of the first transistor have an integral structure.

Abstract: The present disclosure provides a display substrate and a display device. The display substrate includes a plurality of sub-pixels in rows. The sub-pixels in each row includes first sub-pixels, second sub-pixels and third sub-pixels arranged alternately, and two adjacent rows of sub-pixels are arranged in a staggered manner. In every two adjacent rows of sub-pixels, each first sub-pixel in one row of sub-pixels and the second sub-pixel and the third sub-pixel adjacent to the first sub-pixel in another row of sub-pixels form a pixel. White brightness centers of the pixels in a same pixel row are located on a same straight line, and a brightness center of the first sub-pixel is not on a same straight line as the brightness centers of the second sub-pixel and the third sub-pixel located in a same sub-pixel row.

Abstract: The display panel includes a plurality of rows and a plurality of columns of pixel circuits, a plurality of rows of gate lines, a plurality rows of reset control lines, and a plurality of columns of data lines, a same row of pixel circuits corresponds to two rows of gate lines, and one/the other row of gate line is electrically connected to odd/even-numbered columns of pixel circuits in the row of pixel circuits, and provides a corresponding gate driving signal for the odd/even-numbered columns of pixel circuits; a same column of pixel circuits corresponds to two columns of data lines, and one/the other column of data line of the two columns of data lines is electrically connected to odd/even-numbered rows of pixel circuits, and provides a corresponding data voltage for the odd/even-numbered rows of pixel circuits.

Abstract: Provided is a display substrate, a drive method thereof and a display apparatus, the display substrate includes: a first drive mode and a second drive mode, the first drive mode has a refresh rate less than that of the second drive mode, wherein the contents displayed on the display substrate include a plurality of display frames, in the first drive mode, the display frames include: a refresh frame and at least one maintain frame; the display substrate includes pixel circuits arranged in an array, the pixel circuits include a data signal line and a first initial signal line; the data signal line provides a first data signal in the maintain frame, the voltage value of the first data signal is constant, and/or the first initial signal line provides a first initial signal in the refresh frame and the maintain frame, the first initial signal is an AC signal.

Abstract: A display substrate includes a scan circuit, a first reference signal line in a third region, and at least three clock signal lines arranged in a fourth region. The scan circuit includes a plurality of stages, wherein a respective stage of the scan circuit includes a respective scan unit configured to provide a control signal to at least a row of subpixels. The respective scan unit includes an input subcircuit configured to receive from an input terminal a start signal or an output signal from a previous scan unit of a previous stage, a first processing subcircuit, a second processing subcircuit, and an output subcircuit configured to output an output signal from an output terminal. The output subcircuit includes a first output transistor. The input subcircuit includes a first input transistor and a second input transistor sequentially coupled between an input terminal and a first node.

Abstract: Provided is a display panel. The display panel includes a base substrate, provided with a curved display region and a planar display region, wherein the curved display region is configured for curved display; and a plurality of first sub-pixels disposed in the curved display region and a plurality of second sub-pixels disposed in the planar display region, wherein each of the first sub-pixels and the second sub-pixels includes: a planarization layer, an electrode pattern, a light-emitting pattern, and an electrode layer which are sequentially laminated in a direction going away from the base substrate.

Abstract: A display substrate includes a base substrate that includes a first display area provided with multiple sub-pixels of different colors. At least one sub-pixel includes a first electrode, a second electrode, and an organic light-emitting layer provided between the first electrode and the second electrode. A first structure is provided on a side of the first electrode of a sub-pixel of at least one target color close to the base substrate, and a surface of the first structure close to the first electrode is uneven. The first structure comprises at least one convex structure, the at least one convex structure is made of a metallic material, and the first structure further includes a second insulating layer between the at least one convex structure and the first electrode.

Abstract: A gate driving unit includes a charge pump circuit and an output circuit; the charge pump circuit is connected to a first input node, an input clock signal terminal and a first node; the charge pump circuit is configured to control a voltage signal of the first input node under the control of an input clock signal provided by the input clock signal terminal, the voltage signal of the first input node is written into the first node when the voltage signal of the first input node is a first voltage signal; the output circuit comprises a first output transistor, a control electrode of the first output transistor is connected to the first node, a first electrode of the first output transistor is connected to an output voltage terminal, and a second electrode of the first output transistor is connected to a gate driving signal output terminal.

Abstract: A display substrate and a display device are provided, the display substrate includes: a substrate, and a power source layer, a conductive layer, and a cathode layer sequentially stacked on the substrate in a direction away from the substrate; the conductive layer includes first conductive patterns and second conductive patterns insulated from each other, the first conductive patterns are coupled to the power source layer, and the second conductive patterns are coupled to the cathode layer.

Abstract: Provided is a display substrate, a drive method thereof and a display apparatus, the display substrate includes: a first drive mode and a second drive mode, the first drive mode has a refresh rate less than that of the second drive mode, wherein the contents displayed on the display substrate include a plurality of display frames, in the first drive mode, the display frames include: a refresh frame and at least one maintain frame; the display substrate includes pixel circuits arranged in an array, the pixel circuits include a data signal line and a first initial signal line; the data signal line provides a first data signal in the maintain frame, the voltage value of the first data signal is constant, and/or the first initial signal line provides a first initial signal in the refresh frame and the maintain frame, the first initial signal is an AC signal.

Abstract: A display panel includes a base substrate, a first metal layer, and a second metal layer. The first metal layer is located on a side of the base substrate. The first metal layer includes a plurality of fan-out transposition lines. The second metal layer is located on a side of the first metal layer facing away from the base substrate. The second metal layer includes a plurality of data signal lines and a plurality of data fan-out lines. At least some of the data signal lines distant from a middle area of the display panel are connected to the fan-out transposition lines by means of via holes, and the fan-out transposition lines are further connected to the data fan-out lines proximate to the middle area of the display panel by means of via holes.

Abstract: An array substrate includes a first respective data line configured to provide data signals to first electrodes of data write transistors in a same column of pixel driving circuits and in a first row of two adjacent rows of pixel driving circuits; and a second respective data line configured to provide data signals to first electrodes of data write transistors in the same column and in a second row of the two adjacent rows of pixel driving circuits. The first respective data line and the second respective data line at least partially extend in the same column. The first respective data line is electrically isolated from the first electrodes of the data write transistors in the same column and in the second row. The second respective data line is electrically isolated from the first electrodes of the data write transistors in the same column and in the first row.

Abstract: The embodiments of the present disclosure provides a display substrate, including: an active region and a peripheral region, the active region is provided therein with a plurality of pixel units arranged in an array, all the pixel units are divided into n pixel unit groups, the peripheral region is provided therein with a driver block including a first gate drive circuit having n+x first signal output terminals configured to sequentially output first gate drive signals in an active level and the first gate line provided for an ith pixel unit group is electrically connected to a (i+x)th first signal output terminal, and the reset signal line provided for the ith pixel unit group is electrically connected to an ith first signal output terminal, with i being a positive integer and i?n.

Abstract: A display substrate comprises a base substrate that comprises a first display area provided with multiple sub-pixels of different colors. At least one sub-pixel comprises a light-emitting element and a pixel driving circuit for driving the light-emitting element to emit light. The light-emitting element comprises a first electrode, a second electrode, and an organic light-emitting layer provided between the first electrode and the second electrode. The first electrode is a reflective electrode and is electrically connected to the pixel driving circuit. A first structure is provided on a side of the first electrode of the light-emitting element of a sub-pixel of at least one target color close to the base substrate, and a surface of the first structure close to the first electrode is uneven.

Abstract: A display panel includes: a substrate; at least one first signal line disposed on the substrate and located in a peripheral region; at least one second signal line disposed on the substrate and located in the peripheral region; an insulating layer covering the at least one first signal line and the at least one second signal line; and a shielding signal line covering the at least one groove. The at least one second signal line and the at least one first signal line are arranged in a same layer. A surface of the insulating layer away from the substrate has at least one groove. An orthogonal projection, on the substrate, of a bottom surface of a groove is located between orthogonal projections, on the substrate, of a first signal line and a second signal line.

Abstract: A display substrate and a display device are provided, the display substrate includes: a substrate, and a power source layer, a conductive layer, and a cathode layer sequentially stacked on the substrate in a direction away from the substrate; the conductive layer includes first conductive patterns and second conductive patterns insulated from each other, the first conductive patterns are coupled to the power source layer, and the second conductive patterns are coupled to the cathode layer.

Abstract: A display substrate includes a driving module arranged on the base substrate, the driving module includes a plurality of driving units, and the driving unit includes a plurality of stages of driving circuits; the driving unit includes a first signal line, and the driving circuit includes an output sub-circuit; the display substrate includes at least two metal layers stacked along a direction away from the base substrate; in at least one driving unit, an orthographic projection of the first signal line on the base substrate at least partially overlaps an orthographic projection of a first electrode or a second electrode of at least one transistor included in the output sub-circuit on the base substrate, the first electrode and the second electrode are arranged on the same metal layer, and the first electrode and the first signal line are arranged on different metal layers.

Abstract: An array substrate includes a first respective data line configured to provide data signals to first electrodes of data write transistors in a same column of pixel driving circuits and in a first row of two adjacent rows of pixel driving circuits; and a second respective data line configured to provide data signals to first electrodes of data write transistors in the same column and in a second row of the two adjacent rows of pixel driving circuits. The first respective data line and the second respective data line at least partially extend in the same column. The first respective data line is electrically isolated from the first electrodes of the data write transistors in the same column and in the second row. The second respective data line is electrically isolated from the first electrodes of the data write transistors in the same column and in the first row.

Abstract: A shift register unit includes: an input circuit configured to provide an input signal to a first node in response to a first clock signal; a reset circuit configured to provide a first reference signal to a second node in response to a second clock signal; a first control circuit configured to provide the second clock signal to the second node in response to a first control signal; an output circuit configured to provide a third clock signal to a drive output terminal in response to a signal of the first node, and provide a second reference signal to the drive output terminal in response to a signal of the second node; where a duration of an active level of the first control signal is longer than a duration of an active level of a signal of the drive output terminal.