Abstract: An executable program compiled according to a source instruction set architecture (source ISA) is loaded for execution by a target instruction set architecture (target ISA)-based hardware execution unit, wherein the source and target ISA's are different. The loading includes mapping a compiler built-in helper function in the executable program to a target ISA machine instruction. The loaded program is then executed. As part of the execution, the helper function is replaced with the target ISA machine instruction to which the helper function was mapped, and the target ISA machine instruction is executed rather than the helper function.

Abstract: Systems and methods are provided in example embodiments for performing binary translation. A binary translation system converts, by a translator module, source instructions to target instructions. The binary translation system identifies a condition code block in the source instructions, where the condition code block includes a plurality of condition bits. In response to identifying the condition code block, the binary translation system provides an optimizer module to convert the condition code block. Then, the binary translation system performs a pre-execution on the condition code block to resolve the plurality of condition bits in the condition code block.

Abstract: A method and system to support scheduling of memory store instructions across atomic regions in binary translation in a processing unit or processor. In one embodiment of the invention, the processing unit has a store buffer that allows store instructions to be issued in different order than the source binary program order but still retire in source binary program order. This facilitates a small atomic region that maps to each iteration of a source binary code and these atomic regions are joined together into a pipelined region. In one embodiment of the invention, the processing unit executes commit instruction(s) once every loop iteration instead of executing the commit instruction(s) once after the loop exit.

Abstract: One embodiment pre-builds translations of kernel functions (KFs) and loads them into a translation pool and corresponding indexed table. The KFs are thus quickly loaded and do not necessarily await trapping and emulation via a LIB emulator. This results in faster access to KFs. Other embodiments provide hybrid emulation where some application functions (e.g., those that need quick performance) are translated from a source ISA library while other applications functions are processed via emulation to a target ISA library. Doing so provides faster access to certain functions. Other embodiments are described herein.

Abstract: Methods, apparatuses and storage medium associated with ISA bridging with support for virtual functions, are disclosed. In embodiments, at least one computer-readable storage medium may include instructions configured to enable a target device with a target ISA, in response to execution, to provide an ISA bridging layer to the target device to facilitate a library service of a library of the target device to call a virtual function of the library, while servicing an application operating on the target device, where the application has an overriding implementation. The ISA bridging layer may include a loader configured to load the application for execution, and as part of loading the application, detect the virtual function and modify a virtual function table of the application to enable the call. Other embodiments may be disclosed or claimed.

Abstract: Methods, apparatuses and storage medium associated with ISA bridging with support for virtual functions, are disclosed. In embodiments, at least one computer-readable storage medium may include instructions configured to enable a target device with a target ISA, in response to execution, to provide an ISA bridging layer to the target device to facilitate a library service of a library of the target device to call a virtual function of the library, while servicing an application operating on the target device, where the application has an overriding implementation. The ISA bridging layer may include a loader configured to load the application for execution, and as part of loading the application, detect the virtual function and modify a virtual function table of the application to enable the call. Other embodiments may be disclosed or claimed.

Abstract: Methods, apparatuses and storage medium associated with ISA bridging with callback, are disclosed. In various embodiments, at least one computer-readable storage medium may include instructions configured to enable a target device with a target ISA, in response to execution of the instructions, to provide an ISA bridging layer to the target device to facilitate a library service to callback a callback function of an application. The library service may be implemented for the target ISA, and the application may be implemented at least partially for a source ISA that may be different from the target ISA. The ISA bridging layer may include a source ISA emulator and a library emulator configured to cooperate to enable the application to call the library service, and the library service to callback the callback function, across the two instruction set architectures. Other embodiments may be disclosed or claimed.

Abstract: Various embodiments include nested emulation for a source application and source emulator. Duplicate source ISA libraries redirect the source emulator library calls to a target library, thereby forcing the native emulator through proper emulation channels between first and second ISAs. Other embodiments concern accelerating dynamic linking by determining certain function calls that, rather than being processed through emulation of PLT code, are instead directly called without the need for PLT code translation. Some embodiments address both nested emulation and accelerated dynamic linking but other embodiments include one of nested emulation and accelerated dynamic linking. Other embodiments are described herein.

Abstract: Methods, systems, and articles for receiving, by a computing device, execution results of a plurality of query language expressions are described herein. In various embodiments, the plurality of query language expressions may be concurrently executed, and the receiving may be contemporaneous with production of the execution results. Also, in various embodiments, the computing device may store a result item of the execution results for at least a first of the query language expressions in a memory block allocated exclusively for the first of the query language expressions while the first of the query language expressions is being executed, or in a result handle associated with the first of the query language expressions.

Abstract: Methods and apparatuses for creating a dynamic profile for a plurality of structurally similar extensible markup language (XML) documents based at least in part on a document structure or data pattern of the XML documents. A specialized XML parser is generated based at least in part on the dynamic profile and then is specialized in parsing XML documents that substantially match the dynamic profile.

Abstract: A method, according to one aspect, may include estimating costs associated with translating a multi-format instruction of a source instruction set architecture to instructions of a target instruction set architecture by using a different format of the multi-format instruction for each of the costs, and selecting a format for the multiformat instruction based at least in part on the estimated costs. Methods of organizing or grouping multi-format instructions based on register use relationships. Software, hardware, and computer systems to implement the methods are also disclosed.

Abstract: Methods and apparatus to support the execution of a managed application that is linked to a native library or application are disclosed. The disclosed methods and apparatus support a virtual machine that is associated with the same ISA as the executing platform, while the ISA of the native library or application is of a different ISA. The disclosed methods and apparatus also support the execution of a managed application that is linked with several native libraries or applications that are associated with several different ISAs respectively.

Abstract: A method for validating a document by fragmenting the document, validating elements fully contained in each single fragment and validating elements spanning two or more fragments.

Abstract: Methods and apparatuses for creating a dynamic profile for a plurality of structurally similar extensible markup language (XML) documents based at least in part on a document structure or data pattern of the XML documents. A specialized XML parser is generated based at least in part on the dynamic profile and then is specialized in parsing XML documents that substantially match the dynamic profile.

Abstract: Methods and apparatus to support the execution of a managed application that is linked to a native library or application are disclosed. The disclosed methods and apparatus support a virtual machine that is associated with the same ISA as the executing platform, while the ISA of the native library or application is of a different ISA. The disclosed methods and apparatus also support the execution of a managed application that is linked with several native libraries or applications that are associated with several different ISAs respectively.

Abstract: Methods and apparatus to support the execution of a managed application that is linked to a native library or application are disclosed. The disclosed methods and apparatus support a virtual machine that is associated with the same ISA as the executing platform, while the ISA of the native library or application is of a different ISA. The disclosed methods and apparatus also support the execution of a managed application that is linked with several native libraries or applications that are associated with several different ISAs respectively.

Abstract: Embodiments of the invention disclose a method, apparatus and system of translating a source binary code into a target binary code. The translation according to embodiments of the invention may include determining whether or not a previously translated code block that relates to a source fragment to be currently translated may be reused for execution by a target processor. A reusability status of the previously translated code block may be determined based on a reusability status of a group of previously translated code blocks. In some embodiments, when no previously translated code blocks relating to the currently translated source fragment are found, the source fragment may be translated into a new target code block, which may be executed by the target processor. The new target code block may then be added to a group of previously translated code blocks.

Abstract: Methods, systems, and articles for receiving, by a computing device, execution results of a plurality of query language expressions are described herein. In various embodiments, the plurality of query language expressions may be concurrently executed, and the receiving may be contemporaneous with production of the execution results. Also, in various embodiments, the computing device may store a result item of the execution results for at least a first of the query language expressions in a memory block allocated exclusively for the first of the query language expressions while the first of the query language expressions is being executed, or in a result handle associated with the first of the query language expressions.

Abstract: Methods and apparatus are described to compile and translate source code. In some embodiments, source code is compiled into source binary code for a source platform; an annotation section associated with the source binary code is generated, wherein the annotation section comprises an annotation for a scope, the scope comprising at least one block of the source binary code having at least one attribute to aid a translator optimization. If the scope comprises a plurality of blocks, the blocks have consecutive addresses with each other and have the at least one attribute in common. In the embodiments, the source binary code is further translated into target binary code for a target platform by utilizing the annotation section.