Abstract: A multi-service node management system includes: at least two service nodes, where each of the service node is disposed with a baseboard management controller (BMC); a module management controller (MMC), having one end configured to perform data communication with the BMC in each service node of the at least two service nodes, and the other end performing data communication with a shared module; and the shared module, on which sharing management is performed by BMCs in the service nodes through an MMC.

Abstract: An equivalent radio frequency (RF) notch filter, an RF chip, and a receiver are provided. The equivalent RF notch filter includes: a local oscillation (LO) circuit, configured to provide a LO frequency signal; configured to be connected in parallel with the main chain, and down-convert signals of the main chain; and a frequency selective circuit realized by impedance difference, configured to provide different impedances for down-converted signals with different frequencies from the mixing circuit, so as to absorb the signals that need to be suppressed.

Abstract: A rear board of a blade server, a blade server and a subrack are provided. The blade server includes a front board and a back board, the rear board includes a standard ATCA interface, and the rear board is connected to the front board by the standard ATCA interface. The blade server also includes a connector configured to connect hard disks which is set on the rear board, and a portion of the rear board on which the connector is set is extended outward so as to accommodate at least two hard disks, and the at least two hard disks are connected to the connector. The blade server increases the ability of the heat dissipation ability of the front board, and the rear board supports data backup between the two hard disks and hot plug.

Abstract: The present disclosure relates to telecommunication, and in particular, to a base station Radio Frequency (RF) duplexer, an RF module, and an RF system. A base station RF apparatus provided herein includes: an enclosure, an intermediate RF processing unit, and a duplexer. The enclosure is located on the duplexer; the intermediate RF processing unit is located inside a cavity enclosed by the enclosure and the duplexer, or on the duplexer; a duplexer cavity and a heat dissipation part exist on the surface of the duplexer; the opening of the duplexer cavity is opposite to or against the enclosure; the heat dissipation part is designed to dissipate heat of the intermediate RF processing unit; and the duplexer is integrally molded. The foregoing technical solution requires no external fasteners, reduces the time of production and assembly. In addition, waterproof design and shielding design are not required, and thus improves the reliability.

Abstract: A rear board of a blade server, a blade server and a subrack are provided. The blade server includes a front board and a back board, the rear board includes a standard ATCA interface, and the rear board is connected to the front board by the standard ATCA interface. The blade server also includes a connector configured to connect hard disks which is set on the rear board, and a portion of the rear board on which the connector is set is extended outward so as to accommodate at least two hard disks, and the at least two hard disks are connected to the connector. The blade server increases the ability of the heat dissipation ability of the front board, and the rear board supports data backup between the two hard disks and hot plug.

Abstract: A single-stage amplifier includes (1) first and second “gain” transistors coupled in a common source configuration, (2) first and second resistors providing self-biasing for the first and second transistors, respectively, (3) first and second current sources providing bias currents for the first and second transistors, respectively, and (4) a load impedance coupled between the drains of the first and second transistors. The amplifier may further include (5) third and fourth “compensation” transistors coupled in parallel with, and used to compensate parasitic capacitances of, the first and second transistors, respectively, and (6) third and fourth resistors providing self-biasing for the third and fourth transistors, respectively. Variable gain may be achieved by varying the bias currents for the gain transistors. A two-stage amplifier may be formed with two stages coupled in cascade, with each stage including most or all of the circuit elements of the single-stage amplifier.

Abstract: A single-stage amplifier includes (1) first and second “gain” transistors coupled in a common source configuration, (2) first and second resistors providing self-biasing for the first and second transistors, respectively, (3) first and second current sources providing bias currents for the first and second transistors, respectively, and (4) a load impedance coupled between the drains of the first and second transistors. The amplifier may further include (5) third and fourth “compensation” transistors coupled in parallel with, and used to compensate parasitic capacitances of, the first and second transistors, respectively, and (6) third and fourth resistors providing self-biasing for the third and fourth transistors, respectively. Variable gain may be achieved by varying the bias currents for the gain transistors. A two-stage amplifier may be formed with two stages coupled in cascade, with each stage including most or all of the circuit elements of the single-stage amplifier.

Abstract: Compensation for variations in temperature and manufacturing process of a MOSFET operating in its sub-threshold mode. The compensation may include circuitry containing at least a second MOSFET that may also operate in its sub-threshold mode. The operational characteristics of the second MOSFET may be closely matched to those of the first MOSFET, and the second MOSFET may be contained on the same substrate.

Abstract: Compensation for variations in temperature and manufacturing process of a MOSFET operating in its sub-threshold mode. The compensation may include circuitry containing at least a second MOSFET that may also operate in its sub-threshold mode. The operational characteristics of the second MOSFET may be closely matched to those of the first MOSFET, and the second MOSFET may be contained on the same substrate.

Abstract: A power detector (50) detects a power level of an amplified signal (S20) produced by a power amplifier (16) on the same integrated circuit (100). The power detector compensates for an effect of temperature variations on the magnitude of the detected power level.

Abstract: A power detector (50) detects a power level of an amplified signal (S20) produced by a power amplifier (16) on the same integrated circuit (100). The power detector compensates for an effect of temperature variations on the magnitude of the detected power level.