Abstract: A transformer includes a magnetic core, a first winding and at least one second winding. The magnetic core has a window through which the first winding passes through without contacting the magnetic core. The second winding passes through the window of the magnetic core and is wound on the magnetic core. The second winding has a distance from the first winding, and the second winding has a first insulating part disposed on an outer surface of the second winding facing the first winding.

Abstract: A transformer includes a magnetic core, a first winding and at least one second winding. The magnetic core has a window through which the first winding passes through without contacting the magnetic core. The second winding passes through the window of the magnetic core and is wound on the magnetic core. The second winding has a distance from the first winding, and a semi-conductive part is disposed between the second winding and the magnetic core. The present disclosure can effectively lower the risk of partial discharge between the second winding and the magnetic core, and thus the transformer of the present disclosure has high reliability.

Abstract: The present disclosure discloses a gate voltage control circuit of an IGBT and a control method thereof. The gate voltage control circuit of the IGBT comprises a voltage control circuit, an active clamping circuit and a power amplifier circuit. A control voltage outputted by the voltage control circuit indirectly controls a gate voltage of the IGBT, so as to achieve a better control of the gate voltage of the IGBT with a smaller loss. It may prevent the active clamping circuit from a too-early response and may increase the active clamping circuit response speed; and may avoid the voltage oscillation of the collector-emitter voltage Vce and the gate voltage Vge, and may improve the reliability of the IGBTs connected in series.

Abstract: A hybrid topology power converter includes a three-level circuit module and a cascaded H-bridge circuit module. A control method includes the following steps. Firstly, a zero sequence component is injected into a total modulation wave, thereby generating a compensated total modulation wave. Then, a first voltage signal is generated according to the compensated total modulation wave. An H-bridge modulation wave is generated according to the compensated total modulation wave and the first voltage signal. A three-level driving signal is generated according to the first voltage signal, and an H-bridge driving signal is generated according to the H-bridge modulation wave. A duty cycle of at least one switch element of the three-level circuit module is adjusted according to the three-level driving signal. A duty cycle of at least one switch elements of the cascaded H-bridge circuit module is adjusted according to the H-bridge driving signal.

Abstract: A topology of composite cascaded high-voltage and low-voltage modules is provided. It includes at least one high-voltage module, at least one low-voltage module, at least one local control circuit and at least one DC-to-DC module. At least one high-voltage module is connected with at least one low-voltage module in cascade manner. At least one local control circuit outputs at least one signal to at least one high-voltage driving circuit and at least one low-voltage driving circuit. An input of at least one DC-to-DC module is connected with two ends of a low-voltage bus capacitor, for receiving a low-voltage DC bus voltage and converting the low-voltage DC bus voltage into a DC output voltage, so as to provide one or more of at least one high-voltage driving circuit, at least one low-voltage driving circuit and at least one local control circuit with a power supply.

Abstract: A driving method for power semiconductor switches in an H-bridge circuit is provided. The method includes: calculating a start time and an end time of a zero level of an output voltage and determining a zero level section based on the start time and end time of the zero level; and driving an upper power semiconductor switch of a first bridge arm and an upper power semiconductor switch of a second bridge arm to be on simultaneously or driving a lower power semiconductor switch of the first bridge arm and a lower power semiconductor switch of the second bridge arm to be on simultaneously in the zero level section.

Abstract: The present disclosure discloses a power conversion system and a method for suppressing the common-mode voltage. The power conversion system comprises a grid-side converter, a motor-side converter, a bus capacitor, a first reactor, a second reactor, and a third reactor. The bus capacitor is electrically connected between the grid-side converter and the motor-side converter. The first reactor includes a first terminal and a second terminal, wherein the first terminal is electrically connected to the motor-side converter. The second reactor includes a first terminal and a second terminal, wherein the first terminal is electrically connected to the second terminal of the first reactor and the second terminal of the second reactor is electrically connected to a motor. The third reactor includes a first terminal and a second terminal, wherein the first terminal is electrically connected to a grid and the second terminal is electrically connected to the grid-side converter.

Abstract: A power unit includes: a plurality of power converters, a first output terminal of one of two adjacent power converters among the plurality of power converters is connected successively to a second output terminal of the other one of the two adjacent power converters; a local controller configured to output a plurality of control signals; and a plurality of driving circuits configured to output driving signals according to the plurality of control signals, to drive the plurality of power semiconductor switches to be turned on and off, wherein the control signals corresponding to the power semiconductor switches in the same position of the plurality of power converters are the same, the power semiconductor switches in the same position of the plurality of power converters are simultaneously turned on and off.

Abstract: The present disclosure discloses a method of discharging a bus capacitor in a power converter, the method comprising: outputting a plurality of pulse control signals to the corresponding plurality of power semiconductor switch groups when the working state of the power converter is in a discharge state and the state of the main circuit breaker is open to control the ON and OFF of the plurality of power semiconductor switch groups, respectively, so as to form a discharge loop between the positive terminal and the negative terminal of the bus capacitor within at least a preset time, thereby causing the bus capacitor to discharge. Since a discharge loop is formed by the bus capacitor and the bridge arms and the energy of the bus capacitor is consumed by a power device, thereby the peak value and discharge rate of discharge current can be effectively controlled without adding additional discharge elements.

Abstract: The present disclosure provides a precharge device and a frequency converter. The precharge device is applied in a flying capacitor type multi-level converter circuit, and the multi-level converter circuit includes: a flying capacitor, a bus capacitor, a first and second semiconductor components, wherein the first semiconductor component is electrically connected between a first end of the flying capacitor and a first end of the bus capacitor, and the second semiconductor component is electrically connected between a second end of the flying capacitor and a second end of the bus capacitor; and the precharge device includes: an AC source; and an auxiliary circuit electrically connected with the AC source, wherein the auxiliary circuit reuses the first and second semiconductor components, and the AC source charges the flying capacitor and the bus capacitor through the auxiliary circuit.

Abstract: A high-power conversion system includes a switching circuit and at least one reactor, the at least one reactor being electrically connected to the switching circuit, and the core of the at least one reactor being electrically connected to a potential point of the high-power conversion system.

Abstract: A high-power conversion system includes a switching circuit and at least one reactor, the at least one reactor being electrically connected to the switching circuit, and the core of the at least one reactor being electrically connected to a potential point of the high-power conversion system.

Abstract: The present disclosure discloses a power conversion system and a method for suppressing the common-mode voltage. The power conversion system comprises a grid-side converter, a motor-side converter, a bus capacitor, a first reactor, a second reactor, and a third reactor. The bus capacitor is electrically connected between the grid-side converter and the motor-side converter. The first reactor includes a first terminal and a second terminal, wherein the first terminal is electrically connected to the motor-side converter. The second reactor includes a first terminal and a second terminal, wherein the first terminal is electrically connected to the second terminal of the first reactor and the second terminal of the second reactor is electrically connected to a motor. The third reactor includes a first terminal and a second terminal, wherein the first terminal is electrically connected to a grid and the second terminal is electrically connected to the grid-side converter.

Abstract: A pre-charge control method for a hybrid multilevel power converter comprises steps of: (a) controlling access of the current-limiting resistor unit, limiting current from the AC power via the current-limiting resistor unit, and outputting the current; (b) controlling the second capacitor unit to bypass, and charging the first capacitor unit; (c) controlling the access of the second capacitor unit when the first capacitor unit is charged to a third preset voltage, and charging the first and second capacitor units at the same time; (d) controlling the first capacitor unit to bypass when the second capacitor unit is charged to a fourth preset voltage, or the first capacitor unit is charged to a first preset voltage, and charging the second capacitor unit; and (e) controlling the access of the first capacitor units and the current-limiting resistor unit to bypass when the second capacitor unit is charged to a second preset voltage.

Abstract: A hybrid topology power converter includes a three-level circuit module and a cascaded H-bridge circuit module. A control method includes the following steps. Firstly, a zero sequence component is injected into a total modulation wave, thereby generating a compensated total modulation wave. Then, a first voltage signal is generated according to the compensated total modulation wave. An H-bridge modulation wave is generated according to the compensated total modulation wave and the first voltage signal. A three-level driving signal is generated according to the first voltage signal, and an H-bridge driving signal is generated according to the H-bridge modulation wave. A duty cycle of at least one switch element of the three-level circuit module is adjusted according to the three-level driving signal. A duty cycle of at least one switch elements of the cascaded H-bridge circuit module is adjusted according to the H-bridge driving signal.

Abstract: A pre-charge control method for a hybrid multilevel power converter comprises steps of: (a) controlling access of the current-limiting resistor unit, limiting current from the AC power via the current-limiting resistor unit, and outputting the current; (b) controlling the second capacitor unit to bypass, and charging the first capacitor unit; (c) controlling the access of the second capacitor unit when the first capacitor unit is charged to a third preset voltage, and charging the first and second capacitor units at the same time; (d) controlling the first capacitor unit to bypass when the second capacitor unit is charged to a fourth preset voltage, or the first capacitor unit is charged to a first preset voltage, and charging the second capacitor unit; and (e) controlling the access of the first capacitor units and the current-limiting resistor unit to bypass when the second capacitor unit is charged to a second preset voltage.

Abstract: The present application discloses a laminated busbar arrangement for use in a three-level power converter and a power converter. The laminated busbar arrangement comprises a first layer of busbar comprising a neutral-point sub busbar configured to make electrical connections between respective components in the three-level power converter and a neutral-point potential; a second layer of busbar comprising a plurality of sub busbars configured make electrical connections between the respective components in the three-level power converter and a positive direct current (DC) input, a negative DC input and an alternating current (AC) input/output in the three-level power converter, and between respective semiconductor switching components. The present application may effectively reduce stray inductance.

Abstract: The present invention relates to the technical field of motor control, and discloses an apparatus for measuring excitation parameters of an induction motor and a method thereof. The method comprises: maintaining the induction motor static, and inputting a test current to a test phase of the induction motor; and calculating, based on a voltage of the test phase of the induction motor, a stator flux linkage of the test phase of the induction motor corresponding to a magnitude of the test current. The disclosure can conveniently and accurately measure excitation parameters of the induction motor.

Abstract: A capacitor discharging circuit and a converter are disclosed. The converter comprises: a capacitor connected between the live line and null line of an AC power input terminals, a conversion module coupled to the capacitor and comprising an energy storage component at least, an energy transfer unit coupled with the energy storage component and the capacitor, an AC power-off detecting unit and a control unit; wherein the energy transfer unit comprises a switch device; when AC power is disconnected, the AC power-off signal triggers the control unit to output a switch driving signal, controlling the operation of the energy transfer unit to transfer the energy stored in the capacitor to the energy storage component to discharge the capacitor.

Abstract: The present invention relates to multi-phase parallel-interleaved converter circuits with each phase having two or more transformers and two or more rectifiers electrically coupled to the two or more transformers, and layouts of the transformers and the rectifiers of the multi-phase parallel-interleaved converter circuits. In the layouts, the multiple transformers and the multiple rectifiers of the multi-phase converters are interleavingly arranged to be symmetrical to common output polarized capacitor(s) so as to ensure the rectifier outputs of each phase relative to the common output polarized capacitors is symmetrical, thereby reducing the output ripples of the current of the output capacitors.