Patents by Inventor Jiaxin Wang

Jiaxin Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160279626
    Abstract: A method for regenerating semi-regenerated reforming catalyst comprises adjusting the reaction temperature to 250-480° C.; introducing sulfur-containing naphtha into the reforming reactor, so that the sulfur content in the catalyst is 0.32-0.8 mass %; then stopping introducing the raw materials into the reforming reactor; subjecting the catalyst to coke-burning, oxychlorination and reduction. Another method for regenerating semi-regenerated reforming catalyst comprises coke-burning the spent catalyst; introducing sulfate ions thereinto; then performing oxychlorination and reduction. There is still another method for regenerating a platinum-rhenium reforming catalyst, comprising coke-burning the spent catalyst; introducing sulfur and chlorine by impregnation; then drying, calcinating and reducing. The catalysts regenerated by said methods can be used without presulfurization and have excellent regeneration performance.
    Type: Application
    Filed: March 25, 2016
    Publication date: September 29, 2016
    Inventors: Daqing ZHANG, Gaoshan ZANG, Yuhong ZHANG, Jiaxin WANG, Tao WANG
  • Patent number: 9443038
    Abstract: Embodiments of the present invention are directed to facilitating tag assignment to data objects as data objects are added to a tag-associated data-object storage system by users of the tag-associated data-object storage system and to facilitate subsequent display, access, and further characterization of data objects that already reside in the a tag-associated data-object storage system. Methods and systems of the present invention provide for automated tag suggestion to users in order to both increase usability of the interface provided to the tag-associated data-object storage systems as well as decrease the likelihood of unnecessary and unproductive tag proliferation within the tag-associated data-object storage system.
    Type: Grant
    Filed: November 1, 2011
    Date of Patent: September 13, 2016
    Assignee: Vulcan Technologies LLC
    Inventors: Prasantha Jayakody, Linh Dinh Tran, Jiaxin Wang
  • Publication number: 20160133695
    Abstract: Provided are a method for suppressing a leakage current of a tunnel field-effect transistor (TFET), a corresponding device, and a manufacturing method, related to the field of field-effect transistor logic devices and circuits in CMOS ultra large-scale integration (ULSI). By inserting an insulating layer (7) between a source region (10) and a transistor body below a tunneling junction, and by inserting no insulating layer at a tunneling junction between a source region and a channel, a source/drain direct tunneling leakage current in a small-sized TFET device is effectively suppressed, and a threshold slope is effectively improved. The manufacturing method for the corresponding device is completely compatible with an existing CMOS process.
    Type: Application
    Filed: January 9, 2014
    Publication date: May 12, 2016
    Applicant: PEKING UNIVERSITY
    Inventors: Ru Huang, Qianqian Huang, Chunlei Wu, Jiaxin Wang, Chao Wang, Yangyuan Wang
  • Publication number: 20160079400
    Abstract: The present invention discloses a junction-modulated tunneling field effect transistor and a fabrication method thereof, belonging to a field of field effect transistor logic device and the circuit in connection with CMOS ultra large scale integrated circuit (ULSI). The PN junction provided by a highly-doped source region surrounding three sides of the vertical channel region of the tunneling field effect transistor can deplete effectively the channel region, so that the energy band of the surface channel under the gate is lifted, therefore the device may obtain a steeper energy band and a narrower tunneling barrier width than the conventional TFET when the band-to-band tunneling occurs, equivalently achieving the effect of a steep doping concentration gradient at the source tunneling junction, and thereby the sub-threshold characteristics are significantly improved while the turn-on current of the device is improved relative to the conventional TFET.
    Type: Application
    Filed: January 9, 2014
    Publication date: March 17, 2016
    Inventors: Ru Huang, Qianqian Huang, Chunlei Wu, Jiaxin Wang, Zhan Zhan, Yangyuan Wang
  • Publication number: 20160051969
    Abstract: A naphtha reforming catalyst, comprising an alumina support and following components with the content calculated on the basis of the support: VIII group metal 0.1-2.0% by weight, VIM group metal 0.1-3.0% by weight, sulfate ion 0.45-3.0% by weight, and halogen 0.5-3.0% by weight. The catalyst is used in a naphtha reforming reaction without presulfurization and has a high aromatization activity and a selectivity.
    Type: Application
    Filed: August 20, 2015
    Publication date: February 25, 2016
    Inventors: Daqing ZHANG, Gaoshan ZANG, Yuhong ZHANG, Jiaxin WANG, Tao WANG
  • Publication number: 20160043220
    Abstract: The present invention discloses a tunneling field effect transistor having a three-side source and a fabrication method thereof, referring to field effect transistor logic devices and circuits in CMOS ultra large scale integrated circuits (ULSI). By means of the strong depletion effect of the three-side source, the transistor can equivalently achieve a steep doping concentration gradient for the source junction, significantly optimizing the sub-threshold slope of the TFET. Meanwhile, the turn-on current of the transistor is boosted. Furthermore, due to a region uncovered by the gate between the gate and the drain, the bipolar conduction effect of the transistor is effectively inhibited, and on the other hand, in the small-size transistor a parasitic tunneling current at the corner of the source junction is inhibited. The fabrication method is simple and can be accurately controlled.
    Type: Application
    Filed: March 31, 2014
    Publication date: February 11, 2016
    Inventors: Ru Huang, Qianqian Huang, Chunlei Wu, Jiaxin Wang, Yangyuan Wang
  • Publication number: 20160035889
    Abstract: The present invention discloses a strip-shaped gate tunneling field effect transistor using composite mechanism and a fabrication method thereof, which belongs to a field of field effect transistor logic devices and circuits in the CMOS ultra large scale integrated circuit (ULSI). According to the tunneling field effect transistor, the energy band of the channel underneath the gate is elevated by means of a change of the gate morphology and the PN junction depletion effect occurred at both sides of the strip-shaped gate, so that the sub-threshold characteristics of the transistor are improved. Meanwhile, the on-state current of the transistor is effectively increased by means of the composite mechanism introduced by the two parts of the doped source region.
    Type: Application
    Filed: January 8, 2014
    Publication date: February 4, 2016
    Inventors: Ru HUANG, Qianqian HUANG, Chunlei WU, Jiaxin WANG, Zhan ZHAN, Yangyuan WANG
  • Publication number: 20160020306
    Abstract: The present invention discloses a short-gate tunneling field effect transistor having a non-uniformly doped vertical channel and a fabrication method thereof. The short-gate tunneling field effect transistor has a vertical channel and the channel region is doped in such a slowly-varied and non-uniform manner that a doping concentration in the channel region appears a Gaussian distribution along a vertical direction and the doping concentration in the channel near the drain region is higher while the doping concentration in the channel near the source region is lower; and double control gates are formed at both sides of the vertical channel and the control gates form an L-shaped short-gate structure, so that a gate underlapped region is formed in the channel near the drain region, and a gate overlapped region is formed at the source region.
    Type: Application
    Filed: September 30, 2013
    Publication date: January 21, 2016
    Inventors: Ru Huang, Chunlei Wu, Qianqian Huang, Chao Wang, Jiaxin Wang, Yangyuan Wang
  • Patent number: 8176072
    Abstract: Embodiments of the present invention are directed to facilitating tag assignment to data objects as data objects are added to a tag-associated data-object storage system by users of the tag-associated data-object storage system and to facilitate subsequent display, access, and further characterization of data objects that already reside in the a tag-associated data-object storage system. Methods and systems of the present invention provide for automated tag suggestion to users in order to both increase usability of the interface provided to the tag-associated data-object storage systems as well as decrease the likelihood of unnecessary and unproductive tag proliferation within the tag-associated data-object storage system.
    Type: Grant
    Filed: July 28, 2009
    Date of Patent: May 8, 2012
    Assignee: Vulcan Technologies LLC
    Inventors: Prasantha Jayakody, Linh Dinh Tran, Jiaxin Wang
  • Publication number: 20120109982
    Abstract: Embodiments of the present invention are directed to facilitating tag assignment to data objects as data objects are added to a tag-associated data-object storage system by users of the tag-associated data-object storage system and to facilitate subsequent display, access, and further characterization of data objects that already reside in the a tag-associated data-object storage system. Methods and systems of the present invention provide for automated tag suggestion to users in order to both increase usability of the interface provided to the tag-associated data-object storage systems as well as decrease the likelihood of unnecessary and unproductive tag proliferation within the tag-associated data-object storage system.
    Type: Application
    Filed: November 1, 2011
    Publication date: May 3, 2012
    Inventors: Prasantha Jayakody, Linh Dinh Tran, Jiaxin Wang
  • Publication number: 20110029533
    Abstract: Embodiments of the present invention are directed to facilitating tag assignment to data objects as data objects are added to a tag-associated data-object storage system by users of the tag-associated data-object storage system and to facilitate subsequent display, access, and further characterization of data objects that already reside in the a tag-associated data-object storage system. Methods and systems of the present invention provide for automated tag suggestion to users in order to both increase usability of the interface provided to the tag-associated data-object storage systems as well as decrease the likelihood of unnecessary and unproductive tag proliferation within the tag-associated data-object storage system.
    Type: Application
    Filed: July 28, 2009
    Publication date: February 3, 2011
    Inventors: Prasantha Jayakody, Linh Dinh Tran, Jiaxin Wang
  • Patent number: 7472357
    Abstract: A method, apparatus, and a user interface for managing and prioritizing items in a list are provided. Each item in the list is associated with and displayed adjacent to a user interface control for flagging the associated list item. When selected, the user interface control is operative to flag the corresponding list item. Moreover, the user interface control is further operative to change its visual state to indicate that the corresponding list item is flagged. List items flagged by other users appear differently. When again selected, the user interface control is further operative to remove the flagged state for the corresponding item and to set the state of the item as completed.
    Type: Grant
    Filed: June 4, 2003
    Date of Patent: December 30, 2008
    Assignee: Microsoft Corporation
    Inventors: Jesse Clay Satterfield, Jensen Michael Harris, Jiaxin Wang, Richard Henry Leukart, III, George Arthur Herbert, III, Martijn Eldert van Tilburg