Abstract: Example methods, apparatus, and articles of manufacture to access data are disclosed. A disclosed example method involves generating a key-value association table in a non-volatile memory to store physical addresses of a data cache storing data previously retrieved from a data structure. The example method also involves storing recovery metadata in the non-volatile memory. The recovery metadata includes a first address of the key-value association table in the non-volatile memory. In addition, following a re-boot process, the locations of the key-value association table and the data cache are retrieved using the recovery metadata without needing to access the data structure to re-generate the key-value association table and the data cache.

Abstract: In a method of managing wear on a plurality of independent storage devices having respective sets of memory cells, access characteristics of the memory cells in the plurality of independent storage devices are monitored. In addition, an instruction to access data on at least one of the memory cells is received and an independent storage device of the plurality of independent storage devices is selected to access data on at least one of the memory cells of the selected independent storage device based upon one or more predetermined selection policies and the monitored access characteristics of the memory cells in the plurality of independent storage devices. Moreover, the selected independent storage device is assigned to access data on at least one of the memory cells of the selected independent storage device according to the received instruction.

Abstract: This disclosure is directed to optical data path systems that enable unidirectional and bidirectional transmission of optical signals between nodes of a multi-node system such as a multiprocessor system. In one aspect, an optical data path system includes an optical device layer connected to nodes of a multi-node system and a controller. The optical device layer includes a waveguide network of waveguide branches optically connecting each node of the multi-node system to every other node of the multi-node system, resonators disposed adjacent to the waveguide branches, and detectors disposed adjacent to waveguide branches of the waveguide network. Each detector is electronically connected to a node of the multi-node system. The resonators are operated by the controller to control the path of optical signals sent between the nodes of the multi-node system.

Abstract: A tier identification (TID) is to indicate a characteristic of a memory region associated with a virtual address in a tiered memory system. A thread may be serviced according to a first path based on the TID indicating a first characteristic. The thread may be serviced according to a second path based on the TID indicating a second characteristic.

Abstract: Methods and devices are provided for data compression. Data compression can include receiving a plurality of data chunks, sampling at least some of the plurality of data chunks extracting a common portion from a number of the plurality of data chunks based on the sampling, and storing a remainder of the plurality of data chunks in memory.

Abstract: Examples of the present disclosure include methods, devices, and/or systems. An example method for performing data stream operations can include passing input data through a data stream splitter, dividing the input data into multiple lines of data upon recognizing a delimiter within the input data at the data stream splitter, splitting the multiple lines of data into multiple data streams at the data stream splitter, and performing data stream operations on each of the multiple data streams with a respective one of a plurality of finite state machines (FSMs).

Abstract: The present disclosure includes accessing a local storage device using an auxiliary processor An example computing device (100, 202, 303) includes a local storage device (110, 210, 310), a first processor (112, 212, 312) able to access the local storage device (110, 210, 310), an auxiliary processor (114, 220, 360) able to access the local storage device (110, 210, 310) while the first processor (112, 212, 312) is shut down, wherein the auxiliary processor (114, 220, 360) uses less power than the first processor (112, 212, 312), and a management agent (125, 225, 370) to initiate an accessing of the local storage device (110, 210, 310) by the auxiliary processor (114, 220, 360) if a load associated with the computing device (100, 202, 303) falls below a particular threshold. One of the first processor (112, 212, 312) and the auxiliary processor (114, 220, 360) is able to access the local storage device (110, 210, 310) at a time.

Abstract: Example computer racks to improve environmental sustainability in data centers are disclosed. An example computer rack includes a spine (125); a first set of support structures (500) and a second set of support structures (500) extending from the spine (125). Each of the support structures (500) is positioned to receive a respective blade. A first communication port is carried by the spine (125) and associated with the first set of support structures (500). A second communication port is carried by the spine (125) and associated with the second set of support structures (500).

Abstract: Example methods, apparatus, and articles of manufacture to access data are disclosed. A disclosed example method involves generating a key-value association table in a non-volatile memory to store physical addresses of a data cache storing data previously retrieved from a data structure. The example method also involves storing recovery metadata in the non-volatile memory. The recovery metadata includes a first address of the key-value association table in the non-volatile memory. In addition, following a re-boot process, the locations of the key-value association table and the data cache are retrieved using the recovery metadata without needing to access the data structure to re-generate the key-value association table and the data cache.

Abstract: Embodiments herein relate to a method for remapping data. In an embodiment, it is determined if a first memory block is faulty. A pointer is stored to the first memory block and a pointer flag of the first memory block is set when the first memory block is faulty. Data previously stored at the first memory block is written to a second memory block, where the pointer points to a location of the second memory block.

Abstract: Methods, apparatus and articles of manufacture for controlling nanostore operation based on monitored performance are disclosed. An example method disclosed herein comprises monitoring performance of a nanostore, the nanostore including compute logic and a datastore accessible via the compute logic, and controlling operation of the nanostore in response to detecting a performance indicator associated with wearout of the compute logic to permit the compute logic to continue to access the datastore.

Abstract: A memory device is provided. The memory device comprises an array of memory cells, each including a volume of material that can stably exhibit at least two different physical states that are each associated with a different data value, word lines that each interconnects a row of memory cells within the array of memory cells to a word-line driver, and bit lines that each interconnects a column of memory cells, through a bit-line driver, to a write driver that is controlled, during a WRITE operation, to write an input data value to an activated memory cell at the intersection of the column of memory cells and an activated row of memory cells by generating a current density within the memory cells that corresponds to retention/endurance characteristics of the memory cell dynamically assigned to the memory cell by a memory controller, operating system, or other control functionality.

Abstract: An adaptive, memory system is provided. The adaptive memory system has a number of physical-memory devices and a memory controller that creates and maintains a logical address space to which the physical-memory devices and data-storage allocations are mapped, and through which mapping the memory controller matches static, dynamic, and dynamically-adjustable retention and resiliency characteristics of portions of the physical-memory devices with specified retention and resiliency characteristics specified for the data-storage allocations.

Abstract: A memory component or subsystem is provided. The memory comprises one or more memory devices and one or more write controllers within each of the one or more memory devices that each controls memory-device components to write input data values into a plurality of memory cells within a memory device that represents a unit of stored data addressed by a logical-address-space address, the write controller applying a current to the plurality of memory cells during a WRITE operation with a magnitude that corresponds to a retention value associated with the logical-address-space address.

Abstract: A write-absorbing, volatile memory buffer for use with a processor module and a non-volatile memory is disclosed. The write-absorbing buffer operates as a dirty cache that can be used to look up both read and write requests, although allocating new blocks only for write requests and not read requests. The blocks are small sized, and a write-only least-recently used cache replacement policy is used to transfer data in the blocks to the non-volatile memory. The write-absorbing buffer can be used to store copy-on-write pages for at least one virtual machine associated with the processor module and reduce write overhead to the non-volatile memory.

Abstract: Remote memory can be used for a number idle pages located on a virtual machine. A number of idle pages can be sent to the remote memory according to a placement policy, where the placement policy can include a number of weighting factors. A hypervisor on a computing device can record a local size and a remote page fault frequency of the number of virtual machines. The hypervisor can scan local memory to determine the number of idle pages and a number of idle virtual machines. The number of idle pages, including a page map and a remote address destination for each idle page, can be sent to the remote memory by the hypervisor. The number of virtual machines can be analyzed to determine a per-virtual machine local memory allocation.

Abstract: In a method for managing an infrastructure housing a plurality of disaggregated heat sources, in which a first disaggregated heat source has different heat dissipation characteristics as compared with a second disaggregated heat source, cooling requirements for the disaggregated heat sources are determined, in which the first disaggregated heat source and the second disaggregated heat source are to be positioned in separate homogeneous zones of the infrastructure. In addition, a respective available cooling resource is associated with the disaggregated heat sources based upon the determined cooling requirements of the disaggregated heat sources.

Abstract: Systems, methods, and computer-readable and executable instructions are provided for computing system reliability. A method for computing system reliability can include storing, on one of a plurality of devices, a checkpoint of a current state associated with the one of the plurality of devices. The method may further include storing the checkpoint in an erasure-code group across the plurality of devices.

Abstract: Data storage apparatus and methods are disclosed. A disclosed example data storage apparatus comprises a cache layer and a processor in communication with the cache layer. The processor is to dynamically enable or disable the cache layer via a cache layer enable line based on a data store access type.

Abstract: A system and method is shown wherein a memory agent module to identify a memory command related to virtual memory pages associated with a memory blade and maintain and optimize cache coherency for such pages. The system and method also includes a memory module, operatively connected to the memory agent that includes a page cache used by the memory agent to manage the virtual memory page. Further, the system and method includes a transmission module to transmit the memory command to the memory blade, as well as data structures to facilitate the page migration between the compute blade's local memory and remote memory on the memory blade.