Patents by Inventor Jichuan Chang

Jichuan Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120096052
    Abstract: In a method for managing a data structure in a memory, an accessor to access a version of the data structure is determined, in which the accessor includes a version number and a fat pointer, in which the version number corresponds to the most recent version of the data structure, and wherein the fat pointer is configured to enable for multiple versions of a linked-data structure to be maintained.
    Type: Application
    Filed: October 18, 2010
    Publication date: April 19, 2012
    Inventors: Niraj TOLIA, Nathan BINKERT, Yoshio TURNER, Jichuan CHANG
  • Publication number: 20120087674
    Abstract: This disclosure is directed to optical data path systems that enable unidirectional and bidirectional transmission of optical signals between nodes of a multi-node system such as a multiprocessor system. In one aspect, an optical data path system includes an optical device layer connected to nodes of a multi-node system and a controller. The optical device layer includes a waveguide network of waveguide branches optically connecting each node of the multi-node system to every other node of the multi-node system, resonators disposed adjacent to the waveguide branches, and detectors disposed adjacent to waveguide branches of the waveguide network. Each detector is electronically connected to a node of the multi-node system. The resonators are operated by the controller to control the path of optical signals sent between the nodes of the multi-node system.
    Type: Application
    Filed: October 6, 2010
    Publication date: April 12, 2012
    Inventors: David A. Roberts, Jichuan Chang, Parthasarathy Ranganathan
  • Publication number: 20120030406
    Abstract: A system and method is illustrated for comparing a target memory address and a local memory size using a hypervisor module that resides upon a compute blade, the comparison based upon a unit of digital information for the target memory address and an additional unit of digital information for the local memory size. Additionally, the system and method utilizes swapping of a local virtual memory page with a remote virtual memory page using a swapping module that resides on the hypervisor module, the swapping based upon the comparing of the target memory address and the local memory size. Further, the system and method is implemented to transmit the local virtual memory page to a memory blade using a transmission module that resides upon the compute blade.
    Type: Application
    Filed: June 29, 2009
    Publication date: February 2, 2012
    Inventors: Jichuan Chang, Kevin Lim, Partha Ranganathan
  • Publication number: 20120005556
    Abstract: A system and method is illustrated wherein a protocol agent module receives a memory request encoded with a protocol, the memory request identifying an address location in a memory module managed by a buffer. Additionally, the system and method includes a memory controller to process the memory request to identify the buffer that manages the address location in the memory module. Further, the system and method includes an address mapping module to process the memory request to identify at least one super page associated with the memory module, the at least one super page associated with the address location.
    Type: Application
    Filed: June 29, 2009
    Publication date: January 5, 2012
    Inventors: Jichuan Chang, Kevin Lim, Partha Ranganathan
  • Patent number: 8086765
    Abstract: Illustrated is a system and method for identifying a memory page that is accessible via a common physical address, the common physical address simultaneously accessed by a hypervisor remapping the physical address to a machine address, and the physical address used as part of a DMA operation generated by an I/O device that is programmed by a VM. It also includes transmitting data associated with the memory page as part of a memory disaggregation regime, the memory disaggregation regime to include an allocation of an additional memory page, on a remote memory device, to which the data will be written. It further includes updating a P2M translation table associated with the hypervisor, and an IOMMU translation table associated with the I/O device, to reflect a mapping from the physical address to a machine address associated with the remote memory device and used to identify the additional memory page.
    Type: Grant
    Filed: April 29, 2010
    Date of Patent: December 27, 2011
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Yoshio Turner, Jose Renato Santos, Jichuan Chang
  • Patent number: 8082400
    Abstract: To share a memory pool that includes at least one physical memory in at least one of plural computing nodes of a system, firmware in management infrastructure of the system is used to partition the memory pool into memory spaces allocated to corresponding ones of at least some of the computing nodes. The firmware maps portions of the at least one physical memory to the memory spaces, where at least one of the memory spaces includes a physical memory portion from another one of the computing nodes.
    Type: Grant
    Filed: October 1, 2008
    Date of Patent: December 20, 2011
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jichuan Chang, Parthasarathy Ranganathan, Kevin T. Lim
  • Publication number: 20110307679
    Abstract: In a method of managing wear on a plurality of independent storage devices having respective sets of memory cells, access characteristics of the memory cells in the plurality of independent storage devices are monitored. In addition, an instruction to access data on at least one of the memory cells is received and an independent storage device of the plurality of independent storage devices is selected to access data on at least one of the memory cells of the selected independent storage device based upon one or more predetermined selection policies and the monitored access characteristics of the memory cells in the plurality of independent storage devices. Moreover, the selected independent storage device is assigned to access data on at least one of the memory cells of the selected independent storage device according to the received instruction.
    Type: Application
    Filed: June 11, 2010
    Publication date: December 15, 2011
    Inventors: David Andrew ROBERTS, Jichuan Chang, Parthasarathy Ranganathan
  • Publication number: 20110271014
    Abstract: Illustrated is a system and method for identifying a memory page that is accessible via a common physical address, the common physical address simultaneously accessed by a hypervisor remapping the physical address to a machine address, and the physical address used as part of a DMA operation generated by an I/O device that is programmed by a VM. It also includes transmitting data associated with the memory page as part of a memory disaggregation regime, the memory disaggregation regime to include an allocation of an additional memory page, on a remote memory device, to which the data will be written. It further includes updating a P2M translation table associated with the hypervisor, and an IOMMU translation table associated with the I/O device, to reflect a mapping from the physical address to a machine address associated with the remote memory device and used to identify the additional memory page.
    Type: Application
    Filed: April 29, 2010
    Publication date: November 3, 2011
    Inventors: Yoshio Turner, Jose Renato Santos, Jichuan Chang
  • Publication number: 20110113115
    Abstract: One embodiment is a storage system having one or more compute blades to generate and use data and one or more memory blades to generate a computational result. The computational result is generated by a computational function that transforms the data generated and used by the one or more compute blades. One or more storage devices are in communication with and remotely located from the one or more compute blades. The one or more storage devices store and serve the data for the one or more compute blades.
    Type: Application
    Filed: November 6, 2009
    Publication date: May 12, 2011
    Inventors: Jichuan Chang, Kevin T. Lim, Parthasarathy Ranganathan
  • Publication number: 20110072204
    Abstract: A memory server providing remote memory for servers independent from the memory server. The memory server includes memory modules and a page table. A memory controller for the memory server allocates memory in the memory modules for each of the servers and manages remote memory accesses for the servers. The page table includes entries identifying the memory module and locations in the memory module storing data for the servers.
    Type: Application
    Filed: July 3, 2008
    Publication date: March 24, 2011
    Inventors: Jichuan Chang, Parthasarathy Ranganathan, Kevin T. Lim
  • Publication number: 20100332720
    Abstract: A system and method is illustrated for identifying an Input/Output (I/O) driver module, using a hypervisor, to receive a read command to read a virtual memory page from a remote memory location. Further, the system and method includes reading the remote virtual memory page, using the I/O driver module, into a memory buffer managed by the I/O driver module. Additionally, the system and method includes storing the virtual memory page in the memory buffer to a persistent storage device. The system and method also includes identifying a remote super page, using a hypervisor, the remote super page including a remote sub page. Additionally, the system and method includes identifying a local super page, using the hypervisor, the local super page including a local sub page. Further, the system and method includes swapping the local sub page for the remote sub page, using the hypervisor, the swapping occurring over a network.
    Type: Application
    Filed: June 26, 2009
    Publication date: December 30, 2010
    Inventors: Jichuan Chang, Kevin Lim, Partha Ranganathan