Abstract: A system comprising engine driven pumps, control units, a rate control algorithm, and a trained algorithmic model. The control units store operation variables for the engine driven pumps. The rate control algorithm includes an instruction set to read the operation variables for the engine driven pumps. The instruction set comprises a trained algorithmic model with a parameter space based on historical operation variables. The trained algorithmic model determines an optimal distribution rate based on an objective. The instruction set generates rate control variables based on the determined optimal distribution rate. Each rate control variable comprises a selected control unit identifier and a rate value. The instruction set distributes each rate control variable based on the selected control unit identifier. The trained algorithmic model determine the optimal distribution rate using an objective that defines a desired mixture between a first fuel and a second fuel.

Abstract: Systems and methods for constructing a panoramic view based on a changing viewpoint are disclosed. An exemplary system includes a storage device configured to receive first image data of a scene for a first viewpoint at a first predetermined elevation. The system further includes at least one processor configured to convert the first image data to candidate image data for at one or more second predetermined elevations using a deep learning neural network. The at least one processor is further configured to receive a user view request for virtually viewing the scene and determine second image data for a second viewpoint associated with the user view request, by mapping the second viewpoint to the one or more second predetermined elevations. The at least one processor is also configured to render the three-dimensional model of the scene based on the second image data and display the panoramic view in response to the user view request.

Abstract: A semiconductor structure includes a substrate, a storage capacitor unit, a transistor, and an electrical connection structure. The storage capacitor unit is located at an array area and includes: N insulation posts, distributed in a direction parallel to a surface of the substrate; a bottom electrode layer; a top electrode layer, directly facing the bottom electrode layer; and a capacitor dielectric layer, located between the top and bottom electrode layers. One of the bottom or top electrode layers corresponding to the N insulation posts is a continuous film layer, and the other is discrete film layers. The transistor is located at a circuit area and includes a capacitor control terminal located in the substrate of the circuit area. The electrical connection structure is electrically connected to the capacitor control terminal, and extends from the circuit area to the array area to come into contact with a corresponding discrete film layer.

Abstract: A method for controlling gait of a biped robot includes: collecting a lateral center of mass (CoM) speed and a lateral CoM position of the biped robot when the biped robot walks in place, calculating phase variables of virtual constraints corresponding to the CoM of the biped robot in a first phase and a second phase according to the lateral CoM speed and the lateral CoM position; constructing motion trajectory calculation equations for the biped robot based on the phase variables corresponding to the first phase and the second phase, respectively; and finding inverse solutions for joints of the biped robot using the motion trajectory calculation equations to obtain joint angles corresponding to each of the joints of the biped robot to realize gait control.

Abstract: The present disclosure provides a method for manufacturing a semiconductor device and a semiconductor device. The method for manufacturing a semiconductor device includes: providing a substrate; forming a plurality of first structures extending in a first direction on the substrate; forming a sacrificial layer on sidewalls of the first structures; forming an outer spacer layer on a sidewall of the sacrificial layer; removing part of the outer spacer layer to obtain a patterned outer spacer layer that exposes part of the sacrificial layer; and removing the sacrificial layer to form air gaps between the patterned outer spacer layer and the first structures.

Abstract: Thermosetting resin compositions useful for liquid compression molding encapsulation of a reconfigured wafer are provided. The so-encapsulated molded wafer offers improved resistance to warpage, compared to reconfigured wafers encapsulated with known encapsulation materials.

Abstract: A semiconductor structure and a method for manufacturing same are provided. The semiconductor structure includes: a doped conductive layer, doped with dopant ions; a metal conductive layer, located above the doped conductive layer; a nitrogen-containing dielectric layer, located above the metal conductive layer; a first molybdenum nitride layer, located between the doped conductive layer and the metal conductive layer and configured to be electrically connected to the doped conductive layer and the metal conductive layer; and a second molybdenum nitride layer, located between the metal conductive layer and the nitrogen-containing dielectric layer, where an atomic ratio of nitrogen atoms in the second molybdenum nitride layer is greater than an atomic ratio of nitrogen atoms in the first molybdenum nitride layer.

Abstract: A semiconductor structure and a method for manufacturing the semiconductor structure are provided. The method includes: providing a substrate including a core NMOS area, a core PMOS area and a peripheral NMOS area; performing oxidation treatment on the substrate in the core PMOS area to convert a thickness of a part of the substrate in the core PMOS area into an oxide layer; removing the oxide layer; forming a first semiconductor layer on the remaining substrate in the core PMOS area; forming a gate dielectric layer located on the first semiconductor layer and on the substrate in the core NMOS area and the peripheral NMOS area; and forming a gate on the gate dielectric layer.

Abstract: The present disclosure provides a stair climbing gait planning method and an apparatus and a robot using the same. The method includes: obtaining first visual measurement data through a visual sensor of the robot; converting the first visual measurement data to second visual measurement data; and performing a staged gait planning on a process of the robot to climb the staircase based on the second visual measurement data. Through the method, the visual measurement data is used as a reference to perform the staged gait planning on the process of the robot to climb the staircase, which greatly improves the adaptability of the robot in the complex scene of stair climbing.

Abstract: The present disclosure relates to the technical field of semiconductors, and provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes a substrate, an NMOS transistor, and a PMOS transistor. The NMOS transistor includes a first dielectric layer, a first work function layer, and a first conductive layer that are stacked in sequence. The PMOS transistor includes a second dielectric layer, a second work function layer, and a second conductive layer that are stacked in sequence.

Abstract: A memory includes a plurality of semiconductor structures stacked onto one another. Each of the plurality of semiconductor structures include: a first base including a peripheral circuit structure; a first integrated circuit layer disposed on the first base and electrically connected to the peripheral circuit structure; and a second base disposed on the first integrated circuit layer. A first dielectric layer is disposed between the first integrated circuit layer and the second base. The second base includes a storage circuit structure. Each of the first base and the second base includes a semiconductor layer.

Abstract: A semiconductor device and a method for manufacturing a semiconductor device are provided. The semiconductor device includes a substrate, and a plurality of storage structures stacked on the substrate. Each of the plurality of storage structures includes: a first dielectric layer; at least one channel layer arranged in the first dielectric layer and extending in a first direction, the first dielectric layer being provided with a plurality of first grooves isolating the at least one channel layer; and a capacitor structure covering a sidewall and a bottom surface of each of the plurality of first grooves.

Abstract: A semiconductor structure and a forming method thereof are provided. The forming method of the semiconductor structure comprises: providing a substrate comprising a first area for forming a P-channel Metal Oxide Semiconductor (PMOS) transistor and a second area for forming an N-channel Metal Oxide Semiconductor (NMOS) transistor; forming a channel layer on the surface of the first area of the substrate; adjusting the oxidation rate of the channel layer to reduce the difference between the oxidation rate of the channel layer and the oxidation rate of the substrate; and oxidizing the surfaces of the channel layer and the second area of the substrate to form a first transition oxide layer covering the surface of the channel layer and a second transition oxide layer covering the surface of the second area of the substrate.

Abstract: An information playback method and device, a computer readable storage medium, and an electronic device, relating to the technical field of computers. Said method comprises: performing identification on a spatial image in a 3D model and obtaining an information display device and a display area in the spatial image (201); determining the display position information corresponding to the display area (202); overlaying an information playback layer in the display area according to the display position information so as to play back display information in the information playback layer (203). By overlaying an information playback layer on the information display device in a 3D model, further information exchange can be implemented in the 3D model, so that user can experience a more reality-like scenario in the 3D model, thereby enhancing user experience.

Abstract: A system comprising engine driven pumps, control units, a rate control algorithm, and a trained algorithmic model. The control units store operation variables for the engine driven pumps. The rate control algorithm includes an instruction set to read the operation variables for the engine driven pumps. The instruction set comprises a trained algorithmic model with a parameter space based on historical operation variables. The trained algorithmic model determines an optimal distribution rate based on an objective. The instruction set generates rate control variables based on the determined optimal distribution rate. Each rate control variable comprises a selected control unit identifier and a rate value. The instruction set distributes each rate control variable based on the selected control unit identifier. The trained algorithmic model determine the optimal distribution rate using an objective that defines a desired mixture between a first fuel and a second fuel.

Abstract: A method for generating a center of mass (CoM) trajectory includes determining an actual pose of a center of mass (CoM), a pose of a left foot, and a pose of a right pose of a robot; determining a first pose tracking vector of the robot according to the actual pose of the CoM and the pose of the left foot, and determining a second pose tracking vector of the robot according to the actual pose of the CoM and the pose of the right foot; and controlling a desired pose of the CoM of the robot to alternately track the pose of the left foot and the pose of the right foot, according to the first pose tracking vector and the second pose tracking vector, so as to generate a desired CoM trajectory of the robot.

Abstract: A biped robot control methods and a biped robot using the same as well as a computer readable storage medium are provided. The method includes: obtaining an initial distance between a centroid of a double inverted pendulum model of the biped robot and a support point of the biped robot, an initial moving speed of the centroid and an initial displacement of the centroid; calculating a measured value of a stable point of the doable inverted pendulum model based on the initial distance and the initial moving speed; calculating a control output quantity based on the initial moving speed and the measured value of the stable point; calculating a desired displacement of the centroid of the double-inverted pendulum model based on the initial moving speed, the initial displacement, and the control output quantity; and controlling the biped robot to move laterally according to the desired displacement.

Abstract: A gait planning method and a robot using the same as well as a computer readable storage medium are provided. The method includes: determining a reference leg length l0 and a leg length variation range A of a robot; performing a trajectory planning on a length of at least one of the legs of the robot using; an equation including the reference leg length, the leg length variation range, and a preset recurrent excitation function of a time variable t. In this manner, the trajectory planning for the leg length of the robot during motion is performed according to the characteristics of motion scene such as robot jumping or running so that the change of the leg length of the robot is adapted to the motion process, which greatly improves the stability of the robot in the motion scene such as jumping or running.

Abstract: Embodiments of the present application provide a semiconductor device and a method of manufacturing semiconductor device. The semiconductor device includes a substrate, a silicon-germanium (SiGe) epitaxial layer, a protective layer, and a positive-channel metal-oxide semiconductor (PMOS) gate; a surface of the substrate includes at least a PMOS region; the SiGe epitaxial layer is grown on the surface of the substrate and located in the PMOS region; the protective layer covers a surface of the SiGe epitaxial layer; the PMOS gate is located on a surface of the protective layer.

Abstract: The present disclosure relates to the technical field of semiconductor manufacturing, and provides a method of manufacturing a semiconductor structure. The method of manufacturing a semiconductor structure includes: providing a substrate; forming a mask layer on the substrate; removing a part of the mask layer on a non-array region; forming a first oxide layer on the non-array region; removing a part of the first oxide layer on a first transistor region, to expose a top surface of the first transistor region; forming an epitaxial layer on the exposed top surface of the first transistor region; removing a part of the first oxide layer on a second transistor region; and forming a second oxide layer on the second transistor region and the epitaxial layer.