Patents by Inventor Jie Cao

Jie Cao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160326634
    Abstract: A tin oxide sputtering target includes uniformly mixed elemental Sn and SnO2. An atomic ratio of Sn atoms and O atoms in the tin oxide sputtering target satisfies 1:2<Sn:O?2:1. A method for making a tin oxide sputtering target includes steps of: providing Sn powder and SnO2 powder; mixing the Sn powder and the SnO2 powder to form a mixture, an atomic ratio of Sn atoms and O atoms in the mixture satisfies 1:2<Sn:O?2:1; and press-molding and sintering the mixture to obtain a tin oxide sputtering target, the sintering is performed in an inert atmosphere.
    Type: Application
    Filed: September 1, 2015
    Publication date: November 10, 2016
    Inventors: DA-MING ZHUANG, MING ZHAO, LI GUO, MING-JIE CAO, XIAO-LONG LI, RU-JUN SUN
  • Publication number: 20160329196
    Abstract: A method for making a SnO thin film includes steps of: providing a substrate and a tin oxide sputtering target; spacing the substrate and the tin oxide sputtering target from each other; and sputtering the SnO thin film on the substrate by using a magnetron sputtering method. The tin oxide sputtering target comprises uniformly mixed elemental Sn and SnO2. An atomic ratio of Sn atoms and O atoms in the tin oxide sputtering target satisfies 1:2<Sn:O?2:1.
    Type: Application
    Filed: September 1, 2015
    Publication date: November 10, 2016
    Inventors: DA-MING ZHUANG, MING ZHAO, LI GUO, MING-JIE CAO, LIANG-QI OUYANG, LENG ZHANG
  • Publication number: 20160329209
    Abstract: An oxide semiconductor film includes indium (In), cerium (Ce), zinc (Zn) and oxygen (0) elements, and a molar ratio of the In, Ce, and Zn as In:Ce:Zn is in a range of 2:(0.5 to 2):1. A method for making a oxide semiconductor film includes a step of forming an oxide film on a substrate by using a sputtering method and a sputtering target comprising In2CexZnO4+2x, wherein x=0.5˜2.
    Type: Application
    Filed: June 24, 2015
    Publication date: November 10, 2016
    Inventors: DA-MING ZHUANG, MING ZHAO, MING-JIE CAO, LI GUO, ZE-DONG GAO, YAO-WEI WEI
  • Publication number: 20160326633
    Abstract: A sputtering target includes an indium cerium zinc oxide represented by In2CexZnO4+2x, wherein x=0.5˜2. A method for making a sputtering target includes steps of: mixing indium oxide (In2O3) powder, cerium oxide (CeO2) powder, and zinc oxide (ZnO) powder to form a mixture, a molar ratio of indium (In), cerium (Ce), and zinc (Zn) as In:Ce:Zn in the mixture is 2:(0.5 to 2):1; and sintering the mixture at a temperature in a range from about 1250° C. to about 1650° C.
    Type: Application
    Filed: June 24, 2015
    Publication date: November 10, 2016
    Inventors: DA-MING ZHUANG, MING ZHAO, MING-JIE CAO, LI GUO, SHI-LU ZHAN, XIAO-LONG LI
  • Publication number: 20160329433
    Abstract: A thin film transistor includes a source electrode, a drain electrode, a semiconducting layer, an insulating layer, and a gate electrode. The drain electrode is spaced from the drain electrode. The semiconducting layer is electrically connected to the drain electrode and the source electrode. The semiconducting layer is an oxide semiconductor film comprising indium (In), cerium (Ce), zinc (Zn) and oxygen (O) elements, and a molar ratio of In, Ce, and Zn as In:Ce:Zn is in a range of 2:(0.5 to 2):1. The gate electrode is insulated from the semiconducting layer, the source electrode, and the drain electrode by the insulating layer.
    Type: Application
    Filed: June 24, 2015
    Publication date: November 10, 2016
    Inventors: DA-MING ZHUANG, MING ZHAO, MING-JIE CAO, LI GUO, ZE-DONG GAO, YAO-WEI WEI
  • Patent number: 9442676
    Abstract: The present disclosure discloses a method for determining a drive letter, including: obtaining a number of a port connecting a redundant array of independent disk RAID controller to an exchange chip and a location number, of a disk, meeting a report condition in each RAID group under the control of the RAID controller, where the location number, of the disk, meeting the report condition is a location number, of a disk, on a preset location after location numbers of all disks included in each RAID group when each RAID group is configured, are sorted according to a preset sequence; and determining a drive letter corresponding to each RAID group according to the number of the port connecting the RAID controller to the exchange chip and the location number, of the disk, meeting the report condition in each RAID group.
    Type: Grant
    Filed: October 23, 2013
    Date of Patent: September 13, 2016
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Huabing Ling, Xin Qiu, Rong Luo, Zhijun Wei, Jie Cao, Kaitian Du
  • Publication number: 20150372589
    Abstract: Provided are a driving circuit and its operation method and a display apparatus. The driving circuit comprises a boost circuit unit, a load unit and a voltage monitoring unit, the load unit is connected to a power source providing an initial input voltage, the boost circuit unit is connected to both the load unit and the voltage monitoring unit, the load unit is connected to the voltage monitoring unit; the load unit provides a resistor of fixed resistance value; and the voltage monitoring unit determines whether an actual voltage input into the boost circuit unit is smaller than a predetermined voltage, and generates a reset signal which is used to control the driving circuit to restart if it is determined that the actual voltage is smaller than the predetermined voltage.
    Type: Application
    Filed: July 22, 2014
    Publication date: December 24, 2015
    Applicants: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhengxin ZHANG, Shuai XU, Jie CAO, Zhiyong WANG
  • Publication number: 20150322276
    Abstract: This invention is a flexible conductive ink composition comprising (A) a resin binder, (B) silver-plated core conductive particles, and (C) conductive particles having a surface area at least 1.0 m2/g.
    Type: Application
    Filed: July 21, 2015
    Publication date: November 12, 2015
    Inventors: Jie Cao, Jose Garcia-Miralles, Allison Yue Xiao, Rudie Oldenzijl, Gunther Dreezen, Qili Wu, Jianping Chen
  • Patent number: 8935494
    Abstract: Methods, apparatus, and products for backing up an image in a computing system that includes computer memory, including: receiving, by a backup image manager, an image for one or more computing devices within the computing system; identifying, by the backup image manager, available protected computer memory within the computing system, wherein the available protected computer memory within the computing system is restricted from alteration by a user of the computing system; slicing, by the backup image manager, the image into a plurality of image slices; and storing, by the backup image manger, one or more of the image slices in the available protected computer memory.
    Type: Grant
    Filed: July 27, 2012
    Date of Patent: January 13, 2015
    Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
    Inventors: Fred A. Bower, III, Ke Jie Cao, Le Wei Ji, Ye Xu, Bin Qi Zhang
  • Patent number: 8861699
    Abstract: The present invention is directed to a display method and an electronic device. The method comprises acquiring a first display instruction; in response to the first display instruction, displaying the second ID identification on the display unit, and displaying M first content identifications simultaneously, wherein, the first content identification is used for characterizing the communication content of the call process of the first ID identification and the second ID identification, and M is a positive integer greater than or equal to one.
    Type: Grant
    Filed: July 31, 2013
    Date of Patent: October 14, 2014
    Assignee: Lenovo (Beijing) Co., Ltd.
    Inventors: Jie Cao, Chaohong Xie
  • Publication number: 20140295200
    Abstract: Silver-plated copper particles in which any exposed copper not plated with silver are coated with a polymer or with a chelating compound capable of preventing oxidation of the exposed copper. A method for preventing oxidation of any exposed copper on silver-plated copper particles and for improving the conductivity of silver-plated copper particles comprises coating a polymer or a copper-chelating compound onto the exposed copper on the silver-plated copper particles.
    Type: Application
    Filed: June 16, 2014
    Publication date: October 2, 2014
    Inventors: Jose Garcia-Miralles, Jie Cao, Allison Vue Xiao, Ciaran McArdle, David Farrell
  • Publication number: 20140295066
    Abstract: A one-pot process for the electroless-plating of silver onto graphite powder is disclosed. No powder pretreatment steps for the graphite, which typically require filtration, washing or rinsing, are required. The inventive process comprises mixing together three reactant compositions in water: an aqueous graphite activation composition comprising graphite powder and a functional silane, a silver-plating composition comprising a silver salt and a silver complexing agent, and a reducing agent composition.
    Type: Application
    Filed: June 12, 2014
    Publication date: October 2, 2014
    Inventors: Jie Cao, Wenhua Huang, Allison Yue Xiao
  • Publication number: 20140190736
    Abstract: A radiation-curable adhesive/sealant composition comprises a radiation-curable rubber resin, one or more photoinitiators or photosensitizers, and optionally, one or more inorganic or organic fillers.
    Type: Application
    Filed: August 3, 2012
    Publication date: July 10, 2014
    Inventors: Jie Cao, Donald E. Herr
  • Patent number: 8723539
    Abstract: A test card includes a power interface, a controller, a test interface, and a test point. The test interface includes a power pin, a start pin, and a data signal pin. The power interface is connected to the controller and the power pin, and also connected to an external power to receive a work voltage. The controller transmits a turn-on signal to the start pin. The test point is connected to the data signal pin. When an interface of a motherboard is connected to the test interface, the power pin, the start pin, and the data signal pin are connected to corresponding pins of the interface of the motherboard. The motherboard outputs a data signal to the test point through the motherboard interface and the test interface after the controller receives the turn-on signal.
    Type: Grant
    Filed: October 27, 2011
    Date of Patent: May 13, 2014
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Xiao-Gang Yin, Wan-Hong Zhang, Zhao-Jie Cao, Guo-Yi Chen
  • Publication number: 20140047180
    Abstract: The present disclosure discloses a method for determining a drive letter, including: obtaining a number of a port connecting a redundant array of independent disk RAID controller to an exchange chip and a location number, of a disk, meeting a report condition in each RAID group under the control of the RAID controller, where the location number, of the disk, meeting the report condition is a location number, of a disk, on a preset location after location numbers of all disks included in each RAID group when each RAID group is configured, are sorted according to a preset sequence; and determining a drive letter corresponding to each RAID group according to the number of the port connecting the RAID controller to the exchange chip and the location number, of the disk, meeting the report condition in each RAID group.
    Type: Application
    Filed: October 23, 2013
    Publication date: February 13, 2014
    Applicant: Huawei Technologies Co., Ltd.
    Inventors: Huabing Ling, Xin Qiu, Rong Luo, Zhijun Wei, Jie Cao, Kaitian Du
  • Publication number: 20140037079
    Abstract: The present invention is directed to a display method and an electronic device. The method comprises acquiring a first display instruction; in response to the first display instruction, displaying the second ID identification on the display unit, and displaying M first content identifications simultaneously, wherein, the first content identification is used for characterizing the communication content of the call process of the first ID identification and the second ID identification, and M is a positive integer greater than or equal to one.
    Type: Application
    Filed: July 31, 2013
    Publication date: February 6, 2014
    Applicant: Lenovo (Beijing) Co., Ltd.
    Inventors: Jie CAO, Chaohong XIE
  • Publication number: 20140032862
    Abstract: Methods, apparatus, and products for backing up an image in a computing system that includes computer memory, including: receiving, by a backup image manager, an image for one or more computing devices within the computing system; identifying, by the backup image manager, available protected computer memory within the computing system, wherein the available protected computer memory within the computing system is restricted from alteration by a user of the computing system; slicing, by the backup image manager, the image into a plurality of image slices; and storing, by the backup image manger, one or more of the image slices in the available protected computer memory.
    Type: Application
    Filed: July 27, 2012
    Publication date: January 30, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Fred A. Bower, III, Ke Jie Cao, Le Wei Ji, Ye Xu, Bin Qi Zhang
  • Patent number: 8607101
    Abstract: An RS-485 port test apparatus includes an RS-485 connector, a micro control unit (MCU), a multiprotocol transceiver, and a display. The RS-485 connector receives a first test code signal from a test RS-485 port of an electronic device. The multiprotocol transceiver receives the first test code signal from the RS-485 connector, converts the first test code signal to a second test code signal which can be identified by the MCU, and transmits the second signal to the MCU. The MCU receives the second test code signal and displays the second test code signal by the display. The MCU sends back the second test code signal to the multiprotocol transceiver. The multiprotocol transceiver converts the second test code signal to the first test code and transmits the first test code to the test RS-485 port of the electronic device through the RS-485 connector.
    Type: Grant
    Filed: July 14, 2010
    Date of Patent: December 10, 2013
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventor: Zhao-Jie Cao
  • Publication number: 20130069681
    Abstract: A test card includes a power interface, a controller, a test interface, and a test point. The test interface includes a power pin, a start pin, and a data signal pin. The power interface is connected to the controller and the power pin, and also connected to an external power to receive a work voltage. The controller transmits a turn-on signal to the start pin. The test point is connected to the data signal pin. When an interface of a motherboard is connected to the test interface, the power pin, the start pin, and the data signal pin are connected to corresponding pins of the interface of the motherboard. The motherboard outputs a data signal to the test point through the motherboard interface and the test interface after the controller receives the turn-on signal.
    Type: Application
    Filed: October 27, 2011
    Publication date: March 21, 2013
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD.
    Inventors: XIAO-GANG YIN, WAN-HONG ZHANG, ZHAO-JIE CAO, GUO-YI CHEN
  • Publication number: 20130017717
    Abstract: A power on self test card includes a connector module, a logic unit, a microchip, and a display module. The connector module includes a first connector, a second connector, and a third connector. The connector module enables the power on self test card to electrically connect to different types of low pin count buses on various motherboards via either the first connector, the second connector, or the third connector.
    Type: Application
    Filed: December 28, 2011
    Publication date: January 17, 2013
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD
    Inventor: ZHAO-JIE CAO