Patents by Inventor Jie Chang

Jie Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10437706
    Abstract: The present invention provides a debugging system and method for an embedded device, including: an embedded device, including a processing unit and a memory unit, where the memory unit includes a staging area used to store debugging data; a mobile storage device, including a debugging data control unit and a storage unit; and a computer, electrically connected to the embedded device and the mobile storage device. The debugging data control unit transmits a debugging demand message to the embedded device by using the computer. The embedded device transmits the debugging data in the staging area back to the computer. The computer transmits the debugging data to the mobile storage device and stores the debugging data in the storage unit.
    Type: Grant
    Filed: August 22, 2017
    Date of Patent: October 8, 2019
    Assignee: PRIMAX ELECTRONICS LTD.
    Inventors: Shi-Jie Zhang, Che-Yen Huang, Chen-Ming Chang
  • Publication number: 20190305107
    Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a gate structure, a source/drain structure, a dielectric layer, a contact plug. The gate structure is positioned over a fin structure. The source/drain structure is positioned in the fin structure and adjacent to the gate structure. The dielectric layer is positioned over the gate structure and the source/drain structure. The contact plug is positioned passing through the dielectric layer. The contact plug includes a first metal compound including one of group III elements, group IV elements, group V elements or a combination thereof.
    Type: Application
    Filed: March 29, 2018
    Publication date: October 3, 2019
    Inventors: Kuo-Ju CHEN, Su-Hao LIU, Chun-Hao KUNG, Liang-Yin CHEN, Huicheng CHANG, Kei-Wei CHEN, Hui-Chi HUANG, Kao-Feng LIAO, Chih-Hung CHEN, Jie-Huang HUANG, Lun-Kuang TAN, Wei-Ming YOU
  • Publication number: 20190286603
    Abstract: An electronic device for communicating with an external device includes a connector, a controller, a first switch element, a second switch element, a first voltage source, a second voltage source, a third voltage source, and a fourth voltage source. When the external device is coupled to the connector, the connector receives a device existence voltage from the external device. The controller generates a first control signal and a second control signal according to the device existence voltage. The first switch element couples the first voltage source or the second voltage source to the connector according to the first control signal. The second switch element couples the third voltage source or the fourth voltage source to an output node according to the second control signal.
    Type: Application
    Filed: June 1, 2018
    Publication date: September 19, 2019
    Inventors: Li-Min CHANG, Kai Jie LAI, Chia-Hung YEN, Po Yu CHEN
  • Patent number: 10394298
    Abstract: An electronic device for communicating with an external device includes a connector, a controller, a first switch element, a second switch element, a first voltage source, a second voltage source, a third voltage source, and a fourth voltage source. When the external device is coupled to the connector, the connector receives a device existence voltage from the external device. The controller generates a first control signal and a second control signal according to the device existence voltage. The first switch element couples the first voltage source or the second voltage source to the connector according to the first control signal. The second switch element couples the third voltage source or the fourth voltage source to an output node according to the second control signal.
    Type: Grant
    Filed: June 1, 2018
    Date of Patent: August 27, 2019
    Assignee: WIWYNN CORPORATION
    Inventors: Li-Min Chang, Kai Jie Lai, Chia-Hung Yen, Po Yu Chen
  • Patent number: 10397717
    Abstract: The present invention provides an acoustic diaphragm including: a cone and a surround mounted around the cone; wherein an amorphous titanium-zirconium film is formed on a cone substrate, a surround substrate, or both of the substrates. The present invention also provides a speaker containing the acoustic diaphragm.
    Type: Grant
    Filed: May 24, 2018
    Date of Patent: August 27, 2019
    Assignee: Ming Chi University of Technology
    Inventors: Jyh-Wei Lee, Jen-Chun Chang, Yi-Jie Liao
  • Patent number: 10396064
    Abstract: The present invention provides a layout pattern of a static random access memory (SRAM). The layout pattern includes a first inverter and a second inverter constituting a latch circuit, wherein the latch circuit includes four transistors, a first access transistor (PG1) and a second access transistor (PG2) being electrically connected to the latch circuit, wherein the first access transistor is electrically connected to a first word line and a first bit line, and the second access transistor is electrically connected to a second word line and a second bit line, the first access transistor has a first gate length, the first access transistor has a second gate length, and the first gate length is different from the second gate length, and two read transistors series connected to each other, wherein one of the two read transistors is connected to the latch circuit.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: August 27, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Jun-Jie Wang, Yu-Lin Wang, Tzu-Feng Chang, Wei-Chi Lee
  • Patent number: 10379875
    Abstract: A solid state storage device includes a control circuit and a non-volatile memory. The control circuit includes a first storage zone and a second storage zone. A boot code loader is stored in the first storage zone. The non-volatile memory includes a memory cell array. The memory cell array includes a third storage zone and a fourth storage zone. A specified program is stored in the third storage zone. The third storage zone contains a first block. A first page of the first block is divided into a first portion and a second portion. A first binary code of the specified program is repeatedly stored in plural bytes of the first portion of the first page. The one's complement of the first binary code is repeatedly stored in plural bytes of the second portion of the first page.
    Type: Grant
    Filed: January 16, 2018
    Date of Patent: August 13, 2019
    Assignees: LITE-ON ELECTRONICS (GUANGZHOU) LIMITED, LITE-ON TECHNOLOGY CORPORATION
    Inventors: Ping-Jie Chen, Sheng-Yu Chang, Chien-Chih Weng
  • Publication number: 20190237555
    Abstract: A semiconductor device includes a fin structure, disposed on a substrate, that horizontally extends along a direction; and a gate feature comprising a gate dielectric layer and at least a first metal gate layer overlaying the gate dielectric layer, wherein the gate dielectric layer and the first metal gate layer traverse the fin structure to overlay a central portion of the fin structure and further extend along the direction to overlay at least a side portion of the fin structure that is located outside a vertical projection of a sidewall of the gate feature.
    Type: Application
    Filed: April 8, 2019
    Publication date: August 1, 2019
    Inventors: Guan-Jie Shen, Chia-Der Chang, Chih-Hsiung Lin
  • Patent number: 10360699
    Abstract: Methods for correcting a count loss and PET systems are provided according to examples of the present disclosure. In one aspect, the PET system obtain scanning data of a subject to be detected for which random correction has been performed, obtain a first correction factor corresponding to the true coincidence count according to the single-photon count rates of the two Blocks corresponding to the true coincidence count, obtain a second correction factor corresponding to the true coincidence count according to the system single-photon count rate, and correct the true coincidence count according to the first correction factor and the second correction factor corresponding to the true coincidence count.
    Type: Grant
    Filed: October 25, 2017
    Date of Patent: July 23, 2019
    Assignee: Shenyang Neusoft Medical Systems Co., Ltd.
    Inventors: Shaolian Liu, Jie Chang, Ming Li
  • Publication number: 20190221493
    Abstract: In one general aspect, a package can include a first submodule including a first semiconductor die coupled to a first substrate and a first spacer, and disposed between the first spacer and the first substrate. The first submodule includes a second spacer disposed lateral to the first semiconductor die. The package includes a second submodule including a second semiconductor die coupled to a second substrate and a third spacer, and disposed between the third spacer and the second substrate. The second submodule includes a fourth spacer disposed lateral to the second semiconductor die. The package includes an inter-module layer disposed between the first submodule and the second submodule. The first spacer of the first submodule is electrically coupled to the fourth spacer of the second-submodule via the inter-module layer. The second spacer of the first submodule is electrically coupled to the third spacer of the second-submodule via the inter-module layer.
    Type: Application
    Filed: January 18, 2018
    Publication date: July 18, 2019
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Jie CHANG, HuiBin CHEN, Keunhyuk LEE, Jerome TEYSSEYRE
  • Publication number: 20190214749
    Abstract: Implementations of semiconductor packages may include: one or more die electrically coupled to a lead frame. The lead frame may be included within a housing. The semiconductor package may also include a set of signal leads extending from the housing, a set of power leads extending from the housing, and a plurality of press fit pins each fixedly coupled to the set of signal leads and the set of power leads. The set of signal leads and the set of power leads may be configured to couple with a substrate.
    Type: Application
    Filed: January 9, 2018
    Publication date: July 11, 2019
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Jie CHANG, Huibin CHEN, Tiburcio MALDO, Keunhyuk LEE
  • Publication number: 20190196955
    Abstract: A solid state drive is connected with a host. The solid state drive includes a non-volatile memory and a first flash translation layer. The non-volatile memory includes a first storage zone and a second storage zone. The first storage zone includes a boot area. An operating system is stored in the boot area. The first flash translation layer receives a first command and a first logical block address from the host. The first flash translation layer converts the first logical block address into a first physical block address, and the solid state drive accesses the first storage zone according to the first physical block address. The solid state drive receives a second command and a second physical block address from the host, and the solid state drive accesses the second storage zone according to the second physical block address.
    Type: Application
    Filed: January 25, 2018
    Publication date: June 27, 2019
    Inventors: Sheng-Yu CHANG, Ping-Jie CHEN, Chien-Chih WENG
  • Patent number: 10334023
    Abstract: The present invention discloses a content distribution method, system and a server. In one embodiment, the method includes: receiving a content distribution request form a client; obtaining all receiving ends designated by the content distribution request, and marking at least a portion of the receiving ends with a first status code; judging whether all the at least a portion of the receiving ends complete the distribution task, if not, controlling an internal distribution process until all the at least a portion of the receiving ends complete the distribution task.
    Type: Grant
    Filed: August 1, 2014
    Date of Patent: June 25, 2019
    Assignee: Tencent Technology (Shenzhen) Company Limited
    Inventors: Jie Chen, Hong Chang Zhou, Pu Cai, Sheng Yu Yin, Xiao Jie Dong
  • Patent number: 10323963
    Abstract: A flexible optical measuring device comprises an optical distance measuring module, an optical fiber adapter and an optical coupling module. The optical distance measuring module comprises a light source, an optical receiver and a computing unit. The optical fiber adapter is disposed and connected between the optical distance measuring module and the optical coupling module. The optical coupling module comprises a first optical fiber, a two-in-one optical coupler, a detector and a second optical fiber. A measuring beam is emitted from the light source and reaches the detector. The measuring beam then passes through the detector to the object and forms a reflected beam which is reflected back to the detector, then enters the second optical fiber and passes through the optical receiver and the optical receiver outputs a measurement signal. The computing unit calculates the distance between the object and a terminal of the detector accordingly.
    Type: Grant
    Filed: December 7, 2017
    Date of Patent: June 18, 2019
    Assignee: NATIONAL APPLIED RESEARCH LABORATORIES
    Inventors: Tai-Shan Liao, Chi-Hung Huang, Chun-Li Chang, Shih-Jie Chou
  • Publication number: 20190181880
    Abstract: Disclosed is a successive approximation register (SAR) quantizer and a continuous-time sigma-delta modulator (CTSDM) using the SAR quantizer. The SAR quantizer is capable of generating M highly-significant bits as a digital output signal, and generating L lowly-significant bit(s) for the execution of noise shaping operation. Therefore, the SAR quantizer and the CTSDM can reduce the demand for the circuit area of a digital-to-analog converter and lower the delay of a critical path, so as to improve the performance and cut the cost.
    Type: Application
    Filed: October 25, 2018
    Publication date: June 13, 2019
    Inventors: BI-CHING HUANG, YU-CHANG CHEN, CHIH-LUNG CHEN, JIE-FAN LAI
  • Patent number: 10318217
    Abstract: An implementation method of a virtual print-out system is provided. The method includes setting the number of printing module step; each of the printing modules being in information linking with each of the print-out devices step; inputting rule information step; triggering to print out document logic step; and changing the pointing of the print-out device step, and wherein the virtual print-out system can be simultaneously connected with a plurality of physical print-out devices at different work stations, and the virtual print-out system has plural pieces of rule information preset therein. In this way, the output content of the work station in trouble can be moved quickly to the other work station for printing. Therefore, new store operation or division of labor mode can be achieved by this rapid change of print-out location.
    Type: Grant
    Filed: February 13, 2018
    Date of Patent: June 11, 2019
    Assignee: ICHEF CO., LTD.
    Inventors: Ming-Cheng Ho, Yi-Han Chang, Pei-Yao Ding, Teng-Hao Chang, Min-Hsuan Kao, Tien-Che Tsai, Xi-Jie Tan
  • Patent number: 10319118
    Abstract: Methods, systems, and machine-readable storage mediums for reconstructing a PET image are provided. In one aspect, a method includes: determining a plurality of LORs associated with multiple-coincidence data in coincidence data detected by a PET device through scanning, obtaining a respective line integral value along each of the LORs according to a time difference between two single events corresponding to the LOR, allocating the multiple-coincidence data to the LORs according to the respective line integral values of the LORs to obtain respective multiple allocation data on the LORs, correcting respective double-coincidence data in the coincidence data corresponding to each of the LORs based on the respective multiple allocation data on the LOR to obtain data of the LOR, and reconstructing an image according to the data of each of the LORs.
    Type: Grant
    Filed: October 25, 2017
    Date of Patent: June 11, 2019
    Assignee: Shenyang Neusoft Medical Systems Co., Ltd.
    Inventors: Zhipeng Sun, Jie Chang
  • Publication number: 20190157148
    Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a gate structure, a source/drain structure, a first contact plug and a first via plug. The gate structure is positioned over a fin structure. The source/drain structure is positioned in the fin structure and adjacent to the gate structure. The first contact plug is positioned over the source/drain structure. The first via plug is positioned over the first contact plug. The first via plug includes a first group IV element.
    Type: Application
    Filed: June 28, 2018
    Publication date: May 23, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tung-Po HSIEH, Su-Hao LIU, Hong-Chih LIU, Jing-Huei HUANG, Jie-Huang HUANG, Lun-Kuang TAN, Huicheng CHANG, Liang-Yin CHEN, Kuo-Ju CHEN
  • Publication number: 20190155612
    Abstract: A solid state storage device includes a control circuit and a non-volatile memory. The control circuit includes a first storage zone and a second storage zone. A boot code loader is stored in the first storage zone. The non-volatile memory includes a memory cell array. The memory cell array includes a third storage zone and a fourth storage zone. A specified program is stored in the third storage zone. The third storage zone contains a first block. A first page of the first block is divided into a first portion and a second portion. A first binary code of the specified program is repeatedly stored in plural bytes of the first portion of the first page. The one's complement of the first binary code is repeatedly stored in plural bytes of the second portion of the first page.
    Type: Application
    Filed: January 16, 2018
    Publication date: May 23, 2019
    Inventors: Ping-Jie CHEN, Sheng-Yu Chang, Chien-Chih Weng
  • Publication number: 20190146362
    Abstract: A lithography system is provided. The lithography system includes a mask and an optical module. The optical module is configured to optically form an invisible pellicle over the mask to protect the mask from contaminant particles.
    Type: Application
    Filed: February 27, 2018
    Publication date: May 16, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chiu-Hsiang CHEN, Shih-Ming CHANG, Chih-Jie LEE, Han-Wei WU, Yung-Sung YEN, Ru-Gun LIU