Patents by Inventor Jie Xia

Jie Xia has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11825750
    Abstract: A micro-electromechanical system (MEMS) device and a method of forming the same, the MEMS device includes a composite substrate, a cavity, a piezoelectric stacking structure and a proof mass. The composite substrate includes a first semiconductor layer, a bonding layer and a second semiconductor layer from bottom to top. The cavity is disposed in the composite substrate, and the cavity is extended from the second semiconductor layer into the first semiconductor layer and not penetrated the first semiconductor layer. The piezoelectric stacking structure is disposed on the composite substrate, with the piezoelectric stacking structure having a suspended region over the cavity. The proof mass is disposed in the cavity to connect to the piezoelectric stacking structure.
    Type: Grant
    Filed: October 29, 2020
    Date of Patent: November 21, 2023
    Assignee: Vanguard International Semiconductor Corporation
    Inventor: Jia Jie Xia
  • Publication number: 20230346534
    Abstract: A hybrid braided stent includes a stent body (20). The stent body (20) is a single-layer structure. The stent body (20) is a tubular structure formed by interweaving a plurality of filaments. The end areas of at least two of the plurality of filaments are different.
    Type: Application
    Filed: April 6, 2021
    Publication date: November 2, 2023
    Inventors: Liqun JIAO, Shuang LI, Jie XIA, Liyou GUO
  • Patent number: 11767217
    Abstract: A method of forming a MEMS device includes providing a substrate having a device stopper. The device stopper is integral to the substrate and formed of the substrate material. A thermal dielectric isolation layer may be arranged over the device stopper and the substrate. A device cavity may be formed in the substrate and the thermal dielectric isolation layer. The thermal dielectric isolation layer and the device stopper at least partially surround the device cavity. An active device layer may be formed over the thermal dielectric isolation layer and the device cavity.
    Type: Grant
    Filed: January 23, 2022
    Date of Patent: September 26, 2023
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR SINGAPORE PTE. LTD.
    Inventors: Ranganathan Nagarajan, Jia Jie Xia, Rakesh Kumar, Bevita Kallupalathinkal Chandran
  • Patent number: 11759823
    Abstract: A PMUT includes a substrate, a membrane, and a sacrificial layer. The substrate has a cavity penetrating the substrate. The membrane is disposed over the cavity and includes a first piezoelectric layer, a bottom electrode, a top electrode, and a second piezoelectric layer. The first piezoelectric layer is disposed over the cavity and includes an anchor portion, where the anchor portion of the first piezoelectric layer is in direct contact with the substrate. The top and bottom electrodes are disposed over the first piezoelectric layer. The second piezoelectric layer is disposed between the bottom electrode and the top electrode. The sacrificial layer is disposed between the substrate and the first piezoelectric layer, and a vertical projection of the sacrificial layer does not overlap a vertical projection of portions of the membrane disposed over the cavity.
    Type: Grant
    Filed: July 23, 2020
    Date of Patent: September 19, 2023
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: You Qian, Rakesh Kumar, Jia Jie Xia
  • Publication number: 20230125526
    Abstract: A covered stent(20) is provided, including a stent body(21) and a filter membrane(22). The stent body(21) has a proximal end(211) and a distal end(212). The proximal end(211) is configured to be arranged upstream in the blood vessel with respect to the distal end(212). The filter membrane(22) has a mounting portion(222) and a free portion(221). The mounting portion(222) is connected with the stent body(21), and the free portion(221) is connected with the mounting portion(222) and free from the stent body(21).
    Type: Application
    Filed: April 6, 2021
    Publication date: April 27, 2023
    Inventors: Shuang LI, Liyou GUO, Jie XIA
  • Publication number: 20230116973
    Abstract: Provided is an embolic protection device with dual-layer filter meshes, including an elastic base frame, a first filter mesh and a second filter mesh. The two ends of the first filter mesh are the first open end and the first closed end respectively. The distance between the first closed end and the elastic base frame is greater than the distance between the first open end and the elastic base frame. The first open end is connected with the elastic base frame, and the first filter mesh is provided with a plurality of first filtering holes. The second filter mesh is provided with a plurality of second filtering holes.
    Type: Application
    Filed: April 6, 2021
    Publication date: April 20, 2023
    Inventors: Bin YANG, Liqun JIAO, Liyou GUO, Jie XIA, Shuang LI
  • Patent number: 11631800
    Abstract: In a non-limiting embodiment, a device may include a substrate, and a hybrid active structure disposed over the substrate. The hybrid active structure may include an anchor region and a free region. The hybrid active structure may be connected to the substrate at least at the anchor region. The anchor region may include at least a segment of a piezoelectric stack portion. The piezoelectric stack portion may include a first electrode layer, a piezoelectric layer over the first electrode layer, and a second electrode layer over the piezoelectric layer. The free region may include at least a segment of a mechanical portion. The piezoelectric stack portion may overlap the mechanical portion at edges of the piezoelectric stack portion.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: April 18, 2023
    Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Jia Jie Xia, Ranganathan Nagarajan, Bevita Kallupalathinkal Chandran, Miles Jacob Gehm
  • Patent number: 11575081
    Abstract: A MEMS structure may include a substrate, a first metal layer arranged over the substrate, an aluminum nitride layer at least partially arranged over the first metal layer and a second metal layer including one or more patterns arranged over the aluminum nitride layer. The first metal layer may include an electrode area configured for external electrical connection and one or more isolated areas configured to be electrically isolated from the electrode area and further configured to be electrically isolated from external electrical connection. Each pattern of the second metal layer may be arranged to at least partially overlap with one of the isolated area(s) of the first metal layer.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: February 7, 2023
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR SINGAPORE PTE. LTD.
    Inventors: Bevita Kallupalathinkal Chandran, Jia Jie Xia, Tze Sheong Neoh
  • Patent number: 11498097
    Abstract: A piezoelectric micromachined ultrasonic transducer (PMUT) includes a substrate, a stopper, and a membrane, where the substrate and the stopper are composed of same single-crystalline material. The substrate has a cavity penetrating the substrate, and the stopper protrudes from a top surface of the substrate and surrounds the edge of the cavity. The membrane is disposed over the cavity and attached to the stopper.
    Type: Grant
    Filed: May 21, 2020
    Date of Patent: November 15, 2022
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Rakesh Kumar, Jia Jie Xia, You Qian
  • Publication number: 20220144625
    Abstract: A method of forming a MEMS device includes providing a substrate having a device stopper. The device stopper is integral to the substrate and formed of the substrate material. A thermal dielectric isolation layer may be arranged over the device stopper and the substrate. A device cavity may be formed in the substrate and the thermal dielectric isolation layer. The thermal dielectric isolation layer and the device stopper at least partially surround the device cavity. An active device layer may be formed over the thermal dielectric isolation layer and the device cavity.
    Type: Application
    Filed: January 23, 2022
    Publication date: May 12, 2022
    Applicant: VANGUARD INTERNATIONAL SEMICONDUCTOR SINGAPORE PTE. LTD.
    Inventors: Ranganathan NAGARAJAN, Jia Jie Xia, RAKESH KUMAR, Bevita KALLUPALATHINKAL CHANDRAN
  • Publication number: 20220140225
    Abstract: A micro-electromechanical system (MEMS) device and a method of forming the same, the MEMS device includes a composite substrate, a cavity, a piezoelectric stacking structure and a proof mass. The composite substrate includes a first semiconductor layer, a bonding layer and a second semiconductor layer from bottom to top. The cavity is disposed in the composite substrate, and the cavity is extended from the second semiconductor layer into the first semiconductor layer and not penetrated the first semiconductor layer. The piezoelectric stacking structure is disposed on the composite substrate, with the piezoelectric stacking structure having a suspended region over the cavity. The proof mass is disposed in the cavity to connect to the piezoelectric stacking structure.
    Type: Application
    Filed: October 29, 2020
    Publication date: May 5, 2022
    Inventor: Jia Jie Xia
  • Patent number: 11267696
    Abstract: In a non-limiting embodiment, a MEMS device may include a substrate having a device stopper. The device stopper may be integral to the substrate and formed of the substrate material. A thermal dielectric isolation layer may be arranged over the device stopper and the substrate. A device cavity may extend through the substrate and the thermal dielectric isolation layer. The thermal dielectric isolation layer and the device stopper at least partially surround the device cavity. An active device layer may be arranged over the thermal dielectric isolation layer and the device cavity.
    Type: Grant
    Filed: November 6, 2019
    Date of Patent: March 8, 2022
    Assignee: VANGUARD INIERNATIONAL SEMICONDUCTOR SINGAPORE PTE. LTD.
    Inventors: Ranganathan Nagarajan, Jia Jie Xia, Rakesh Kumar, Bevita Kallupalathinkal Chandran
  • Publication number: 20220066699
    Abstract: Disclosed are a data read/write method and apparatus, and an exchange chip and a storage medium. The method comprises: when the current clock cycle arrives, a kernel acquiring a read/write instruction that needs to be executed in the current clock cycle; the kernel acquiring a target storage area associated with the read/write instruction, wherein the target storage area is an unoccupied storage area in at least two storage areas in a random access memory (RAM); and the kernel performing, according to the read/write instruction, data reading and writing on the target storage area in the current clock cycle.
    Type: Application
    Filed: June 5, 2019
    Publication date: March 3, 2022
    Inventors: Jie XIA, Jun XU, Guobing TENG
  • Publication number: 20220048072
    Abstract: A PMUT includes a substrate, a stopper, and a multi-layered structure, where the substrate includes a corner, and a cavity is disposed in the substrate. The stopper is in contact with the corner of the substrate and the cavity. The multi-layered structure is disposed over the cavity and attached to the stopper and the multi-layered structure includes at least one through hole in contact with the cavity.
    Type: Application
    Filed: August 14, 2020
    Publication date: February 17, 2022
    Inventors: You Qian, Joan Josep Giner de Haro, RAKESH KUMAR, Jia Jie Xia
  • Publication number: 20220023915
    Abstract: A PMUT includes a substrate, a membrane, and a sacrificial layer. The substrate has a cavity penetrating the substrate. The membrane is disposed over the cavity and includes a first piezoelectric layer, a bottom electrode, a top electrode, and a second piezoelectric layer. The first piezoelectric layer is disposed over the cavity and includes an anchor portion, where the anchor portion of the first piezoelectric layer is in direct contact with the substrate. The top and bottom electrodes are disposed over the first piezoelectric layer. The second piezoelectric layer is disposed between the bottom electrode and the top electrode. The sacrificial layer is disposed between the substrate and the first piezoelectric layer, and a vertical projection of the sacrificial layer does not overlap a vertical projection of portions of the membrane disposed over the cavity.
    Type: Application
    Filed: July 23, 2020
    Publication date: January 27, 2022
    Inventors: You Qian, RAKESH KUMAR, Jia Jie Xia
  • Publication number: 20220024753
    Abstract: The present disclosure related to a micro-electromechanical system (MEMS) device and a method of forming the same. The MEMS device includes a substrate, a cavity, an interconnection structure and a proof mass. The substrate includes a first surface and a second surface opposite to the first surface. The cavity is disposed in the substrate to extend between the first surface and the second surface. The interconnection structure is disposed on the first surface of the substrate, over the cavity. The proof mass is disposed on the interconnection structure, wherein the proof mass is partially suspended over the interconnection structure.
    Type: Application
    Filed: July 23, 2020
    Publication date: January 27, 2022
    Inventor: Jia Jie Xia
  • Publication number: 20220024754
    Abstract: The present disclosure relates to a micro-electromechanical system (MEMS) device and a method of forming the same. The MEMS device includes a substrate, a cavity, an interconnection structure and a proof mass. The substrate includes a first surface and a second surface opposite to the first surface. The cavity is disposed in the substrate, extending between the first surface and the second surface. The interconnection structure is disposed on the first surface of the substrate, over the cavity. The proof mass is disposed in the cavity, connected to the interconnection structure, the proof mass having a thickness which is smaller than a thickness of the substrate.
    Type: Application
    Filed: July 23, 2020
    Publication date: January 27, 2022
    Inventors: Jia Jie Xia, Rakesh Kumar
  • Publication number: 20210362189
    Abstract: A piezoelectric micromachined ultrasonic transducer (PMUT) includes a substrate, a stopper, and a membrane, where the substrate and the stopper are composed of same single-crystalline material. The substrate has a cavity penetrating the substrate, and the stopper protrudes from a top surface of the substrate and surrounds the edge of the cavity. The membrane is disposed over the cavity and attached to the stopper.
    Type: Application
    Filed: May 21, 2020
    Publication date: November 25, 2021
    Inventors: RAKESH KUMAR, Jia Jie Xia, You Qian
  • Publication number: 20210159387
    Abstract: A MEMS structure may include a substrate, a first metal layer arranged over the substrate, an aluminum nitride layer at least partially arranged over the first metal layer and a second metal layer including one or more patterns arranged over the aluminum nitride layer. The first metal layer may include an electrode area configured for external electrical connection and one or more isolated areas configured to be electrically isolated from the electrode area and further configured to be electrically isolated from external electrical connection. Each pattern of the second metal layer may be arranged to at least partially overlap with one of the isolated area(s) of the first metal layer.
    Type: Application
    Filed: November 26, 2019
    Publication date: May 27, 2021
    Inventors: Bevita KALLUPALATHINKAL CHANDRAN, Jia Jie XIA, Tze Sheong NEOH
  • Publication number: 20210130162
    Abstract: In a non-limiting embodiment, a MEMS device may include a substrate having a device stopper. The device stopper may be integral to the substrate and formed of the substrate material. A thermal dielectric isolation layer may be arranged over the device stopper and the substrate. A device cavity may extend through the substrate and the thermal dielectric isolation layer. The thermal dielectric isolation layer and the device stopper at least partially surround the device cavity. An active device layer may be arranged over the thermal dielectric isolation layer and the device cavity.
    Type: Application
    Filed: November 6, 2019
    Publication date: May 6, 2021
    Inventors: Ranganathan NAGARAJAN, Jia Jie XIA, Rakesh KUMAR, Bevita KALLUPALATHINKAL CHANDRAN