Patents by Inventor Jie Zhang

Jie Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070189980
    Abstract: The present invention is drawn to adhesive solidifying formulations, methods of drug delivery, and solidified layers for topical delivery of drugs for treating alopecia. The formulation can include a drug for treating alopecia, a solvent vehicle, and a solidifying agent. The solvent vehicle can include a volatile solvent system having one or more volatile solvent, and a non-volatile solvent system having one or more non-volatile solvent which is capable of facilitating the delivery of the drug at therapeutically effective rates over a sustained period of time. The formulation can have a viscosity suitable for application to a skin surface as a layer prior to evaporation of the volatile solvents system. When applied to the skin, the formulation can form a solidified layer after at least a portion of the volatile solvent system is evaporated.
    Type: Application
    Filed: December 14, 2006
    Publication date: August 16, 2007
    Inventors: Jie Zhang, Kevin Wamer, Sanjay Sharma
  • Publication number: 20070190124
    Abstract: The present invention is drawn to adhesive solidifying formulations, methods of drug delivery, and solidified layers for dermal delivery of a drug. The formulation can include a drug, a solvent vehicle, and at least two solidifying agents. The solvent vehicle can include a volatile solvent system including at least one volatile solvent, and a non-volatile solvent system including at least one non-volatile solvent, wherein at least one non-volatile solvent is flux-enabling non-volatile solvent(s) capable of facilitating the delivery of the drug at therapeutically effective rates over a sustained period of time. The formulation can have a viscosity suitable for application to a skin surface prior to evaporation of the volatile solvents system. When applied to the skin, the formulation can form a solidified layer after at least a portion of the volatile solvent system is evaporated.
    Type: Application
    Filed: December 14, 2006
    Publication date: August 16, 2007
    Inventors: Jie Zhang, Kevin Warner, Sanjay Sharma
  • Publication number: 20070189977
    Abstract: The present invention is drawn to sprayable formulations, methods of drug delivery, and resultant solidified layers for dermal delivery of a drug. The formulation can include a drug, a non-volatile solvent system, a solidifying agent, and a propellant. The formulation can have an initial viscosity suitable to be expelled out of a pressurized or manual pump container and applied onto a skin surface as a layer. When applied to the skin, the formulation can form a solidified layer after at least a portion of the propellant is evaporated.
    Type: Application
    Filed: December 14, 2006
    Publication date: August 16, 2007
    Inventors: Jie Zhang, Kevin Warner, Sanja Sharma
  • Publication number: 20070189978
    Abstract: The present invention is drawn to solidifying formulations for dermal delivery of a drug for treating musculoskeletal pain, inflammation, joint pain, etc. The formulation can include a drug selected from certain drug classes, a solvent vehicle, and a solidifying agent. The solvent vehicle can include a volatile solvent system having one or more volatile solvent, and a non-volatile solvent system having one or more non-volatile solvent, wherein the evaporation of at least some of the volatile solvent converts the formulation on the skin into a solidified layer and the non-volatile solvent system is capable of facilitating the topical delivery of the drug(s) at therapeutically effective rates over a sustained period of time.
    Type: Application
    Filed: December 14, 2006
    Publication date: August 16, 2007
    Inventors: Jie Zhang, Kevin Warner, Sanjay Sharma
  • Patent number: 7253094
    Abstract: A method for processing a semiconductor topography which includes removing metal oxide layers from the bottom of contact openings is provided. In some embodiments, the method may include etching openings within a dielectric layer to expose conductive and silicon surfaces within the semiconductor topography is provided. In such cases, the method further includes exposing the semiconductor topography to an etch process adapted to remove metal oxide material from the conductive surfaces without substantially removing material from the silicon surfaces. In some cases, the etch chemistry used for the etch process may include sulfuric acid. In addition or alternatively, the etch chemistry may include hydrogen peroxide. In any case, the etch chemistry may be distinct from chemistries used to remove residual matter generated from the etch process used to form the openings within the dielectric and/or the removal of the masking layer used to pattern the openings.
    Type: Grant
    Filed: November 19, 2004
    Date of Patent: August 7, 2007
    Assignee: Cypress Semiconductor Corp.
    Inventors: Jie Zhang, Vinay Krishna, Chan-Lon Yang
  • Patent number: 7253611
    Abstract: This invention relates to a magnetic displacement measurement device, which comprises a ruler body and a vernier, wherein a magnetic main ruler is fixed on the ruler body, and a secondary ruler is fixed on the vernier; the secondary ruler comprises a magnetic sensor and a measurement circuit thereon; said magnetic sensor is composed of magnetoresistances; said measurement circuit comprises at least two measurement bridges composed of magnetoresistances; the movement distance of the vernier is displayed on the display screen of the device after being detected by the magnetic sensor and being processed by the measurement circuit. The magnetic displacement measurement device provided by the invention not only can normally work in the wet and oil polluted environment, but also has the advantages of simple structure, convenient manufacture, low price, low power consumption and high precision.
    Type: Grant
    Filed: November 8, 2002
    Date of Patent: August 7, 2007
    Assignee: Beijing Aerospace Feng Guang Electronic Technical Corp. Ltd.
    Inventors: Liyao Ma, Yinghua Chen, Yingchun Jiang, Jie Zhang
  • Patent number: 7252516
    Abstract: A motherboard includes a first circuit board, a second circuit board, and a connecting member. The connecting member movably connects the first circuit board and the second circuit board, and the connecting member is capable of adjusting a relative position of the first circuit board to the second circuit board.
    Type: Grant
    Filed: January 20, 2007
    Date of Patent: August 7, 2007
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Jie Zhang, Xiong-Dong Peng, Ke-Cheng Lin, Chien-Li Tsai
  • Publication number: 20070174010
    Abstract: Disclosed are embodiments for generating visual patterns that exhibit interesting group dynamics. Embodiments include methods and systems for synthesizing collective attribute modeling, such as collective behavior, using physics-inspired rules. In embodiments, multi-state energy functions allows for encoding a rich set of behavior with few control parameters. A disturbance-based control scheme allows for smooth transitions between the various stable configurations and exhibits interesting and complex dynamic behavior. Moreover, in embodiments, the disturbance propagation computation is global, allowing for very fast implementation.
    Type: Application
    Filed: November 10, 2006
    Publication date: July 26, 2007
    Inventors: Kiran Bhat, Jie Zhang, Anoop K. Bhattacharjya
  • Patent number: 7244626
    Abstract: Two or more semiconductor devices (21 and 22) are formed on a substrate (20) and are each comprised of a plurality of printed components (23 and 24). At least one such printed component (25) is shared by both such semiconductor devices.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: July 17, 2007
    Assignee: Motorola, Inc.
    Inventors: Hakeem B. Adewole, Paul W. Brazis, Daniel R. Gamota, Jerzy Wielgus, Jie Zhang
  • Patent number: 7235557
    Abstract: This invention relates to compounds, pharmaceutical compositions, and methods of using the disclosed compounds for inhibiting PARP.
    Type: Grant
    Filed: February 21, 2006
    Date of Patent: June 26, 2007
    Assignee: MGI GP, Inc.
    Inventors: Dana Victor Ferraris, Jia-He Li, Vincent Kalish, Jie Zhang
  • Patent number: 7230098
    Abstract: Aminopyridine and aminopyrazine compounds of formula (1), compositions including these compounds, and methods of their use are provided.
    Type: Grant
    Filed: February 26, 2004
    Date of Patent: June 12, 2007
    Assignee: Sugen, Inc.
    Inventors: Jingrong Jean Cui, Dilip Bhumralkar, Iriny Botrous, Ji Yu Chu, Lee A. Funk, Cathleen Elizabeth Hanau, G. Davis Harris, Lei Jia, Joanne Johnson, Stephen A. Kolodziej, Pei-Pei Kung, Xiaoyuan (Sharon) Li, Jason (Qishen) Lin, Jerry Jialun Meng, Mitchell David Nambu, Christopher G. Nelson, Mason Alan Pairish, Hong Shen, Michelle Tran-Dube, Allison Walter, Fang-Jie Zhang, Jennifer Zhang
  • Publication number: 20070120372
    Abstract: A latch mechanism includes a latching member and a button. The latching member is slidably installed in a cover unit. The latching member includes a hook for engaging with a base unit, a groove is defined in the latching member, and a slanted surface is defined adjoining the groove. The button is movably fixed to the cover unit. The button includes a pushing portion received in the groove of the latching member and engaging with the slanted surface adjoining the groove. The button can be operated to drive the latching member to slide for disengaging the hook from the base unit.
    Type: Application
    Filed: September 1, 2006
    Publication date: May 31, 2007
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Jie Zhang, Chien-Li Tsai, Hung-Chun Lu, Wen-Kang Lo
  • Publication number: 20070115622
    Abstract: A latch mechanism for fixing a cover unit to a base unit of a foldable electronic device in a closed position is provided. The latch mechanism includes a locking member, an operating member, and at least one resilient member. The base unit includes a pair of recessed portions. The locking member is adapted for be pivotably received in the cover unit. The locking member includes a pair of locking portions for engaging with the corresponding recessed portions of the base unit. The operating member is adapted for be slidably mounted to the cover unit. The operating member includes at least one latch slidable toward the locking member to drive the locking member to pivot. The resilient member is connectable with the operating member and adapted for engage with the cover unit of the foldable electronic device, for urging the operating member away from the locking member.
    Type: Application
    Filed: September 15, 2006
    Publication date: May 24, 2007
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Jie Zhang, Chien-Li Tsai, Ke-Cheng Lin, Hsuan-Chen Chen
  • Publication number: 20070094165
    Abstract: One facilitates determination of a path that comprises a plurality of specific locations (201). In an optional though preferred embodiment these specific locations comprise locations where a given functional ink will preferably be printed using a continuous printing spray. Also in an optional though preferred embodiment this path will also avoid at least one predetermined area (701) where such a functional ink should not be printed. In a preferred approach this process (100) generally provides for identifying (101) these specific locations and further identifying (102), when applicable, the one or more predetermined areas to be avoided.
    Type: Application
    Filed: October 26, 2005
    Publication date: April 26, 2007
    Inventors: Julius Gyorfi, Daniel Gamota, Swee Mok, John Szczech, Mansour Toloo, Jie Zhang
  • Publication number: 20070090869
    Abstract: A power source (201) and a printed transistor circuit (202) are combined with one another in a stacked and integral configuration. In a preferred though optional configuration this combination can further comprise a substrate (200) of choice. The power source can comprise a technology of choice such as, but not limited, to, a battery or a photovoltaic element. These elements can be combined (104) using a joining technology of choice such as, but not limited to, laminating these elements together or printing one upon the other.
    Type: Application
    Filed: October 26, 2005
    Publication date: April 26, 2007
    Inventors: Hakeem Adewole, Paul Brazis, Gabriela Dyrc, Daniel Gamota, Jie Zhang
  • Publication number: 20070090858
    Abstract: An inverter circuit (500) having a drive transistor (102) that operably couples to a voltage bias input (101) (and where that drive transistor controls the inverter circuit output by opening and closing a connection between the output (105) and ground (104)) is further operably coupled to a feedback switch (401). In a preferred approach the feedback switch is itself also operably coupled to the voltage bias input and the output and preferably serves, when the drive transistor is switched “off,” to responsively couple the voltage bias input to the drive transistor in such a way as to cause a gate terminal of the drive transistor to have its polarity relative to a source terminal of the drive transistor reversed and hence permit the inverter circuit to operate across a substantially full potential operating range of the drive transistor.
    Type: Application
    Filed: October 26, 2005
    Publication date: April 26, 2007
    Inventors: Paul Brazis, Daniel Gamota, Kin Tsui, John Szczech, Jie Zhang
  • Publication number: 20070094624
    Abstract: An apparatus (200) such as a semiconductor device comprises a gate electrode (201) and at least a first electrode (202). The first electrode preferably has an established perimeter that at least partially overlaps with respect to the gate electrode to thereby form a corresponding transistor channel. In a preferred approach the first electrode has a surface area that is reduced notwithstanding the aforementioned established perimeter. This, in turn, aids in reducing any corresponding parasitic capacitance. This reduction in surface area may be accomplished, for example, by providing openings (203) through certain portions of the first electrode.
    Type: Application
    Filed: October 26, 2005
    Publication date: April 26, 2007
    Inventors: Paul Brazis, Daniel Gamota, Krishna Kalyanasundaram, Jie Zhang
  • Publication number: 20070089626
    Abstract: A functional ink (200) suitable for use as a dielectric layer (303) in a printed semiconductor device (300) comprises a dielectric carrier (201) and a plurality of dielectric particles (202) sized less than about 1,000 nanometers that are disposed within the dielectric carrier. In a preferred approach the dielectric carrier comprises a dielectric resin and the dielectric particles comprise a ferroelectric material (such as, but not limited to, BaTiO3. So provided, this functional ink can be applied to a substrate (301) of choice through a printing technique of choice to thereby provide a resultant printed semiconductor device, such as a field effect transistor, having a relatively thin dielectric layer comprised of this functional ink.
    Type: Application
    Filed: October 26, 2005
    Publication date: April 26, 2007
    Inventors: Amjad Rasul, Paul Brazis, Daniel Gamota, Andrew Skipor, Jie Zhang
  • Publication number: 20070089540
    Abstract: A printing platform receives (102) (preferably in-line with a semiconductor device printing process (101)) a substrate having at least one semiconductor device printed thereon and further having a test structure printed thereon, which test structure comprises at least one printed semiconductor layer. These teachings then provide for the automatic testing (103) of the test structure with respect to at least one static (i.e., relatively unchanging) electrical characteristic metric. The static electrical characteristic metric (or metrics) of choice will likely vary with the application setting but can include, for example, a measure of electrical resistance, a measure of electrical reactance, and/or a measure of electrical continuity. Optionally (though preferably) the semiconductor device printing process itself is then adjusted (105) as a function, at least in part, of this metric.
    Type: Application
    Filed: October 26, 2005
    Publication date: April 26, 2007
    Inventors: Paul Brazis, Daniel Gamota, Krishna Kalyanasundaram, Jie Zhang, Krishna Jonnalagadda
  • Publication number: 20070090950
    Abstract: An object (201) (such as a containment mechanism) supports both a functional electrical circuit (203) and an electrical circuit (202) to which the functional electrical circuit is responsive. In a preferred approach the functional electrical circuit has both a low power state of operation and a higher power state of operation. Upon detecting (104) that an area of connectivity of the electrical circuit has been severed (via, for example, corresponding manipulation of the object itself), the functional electrical circuit responsively operates (106) using the higher power state of operation.
    Type: Application
    Filed: October 26, 2005
    Publication date: April 26, 2007
    Inventors: Mansour Toloo, Hakeem Adewole, Paul Brazis, Daniel Gamota, Julius Gyorfi, Swee Mok, John Szczech, Jie Zhang