Patents by Inventor Jiehui SHU

Jiehui SHU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090315121
    Abstract: An integrated circuit is provided having a substrate and a transistor in an active region of the substrate. The substrate also has an isolation region having a dielectric material. In one embodiment, a pre-metal dielectric (PMD) layer is disposed over the substrate and the transistor. At least one of the isolation region or the PMD layer includes O3-TEOS having a first stress. A cap layer is disposed over the O3-TEOS in the isolation region or the PMD layer. The cap layer prevents degradation of the first stress of the O3-TEOS.
    Type: Application
    Filed: June 19, 2008
    Publication date: December 24, 2009
    Applicant: Chartered Semiconductor Manufacturing, Ltd.
    Inventors: Luona GOH, Jeff Jiehui SHU, Huang LIU, Wei LU