Abstract: A display panel and a display device are provided. The display panel includes a pixel circuit. An operation process of the pixel circuit includes a first data refresh period, a data adjustment stage, and a second data refresh period set in sequence, the data adjustment stage includes a first data adjustment stage and a second data adjustment stage set in sequence. The first data adjustment stage includes T1 first sub-data adjustment stages set in sequence, each first sub-data adjustment stage includes m1 data writing frames and n1 holding frames, T1?1, m1?0, n1?0, and m1+n1?1. The second data adjustment stage includes T2 second sub-data adjustment stages set in sequence, each second sub-data adjustment stage includes m2 data writing frames and n2 holding frames, T2?1, m2?0, n2?0, and m2+n2?1. T1>T2, T1/T2=(m2+n2)/(m1+n1).

Abstract: A display panel includes a pixel circuit. An operation process of the pixel circuit includes a first data refresh period, a data adjustment stage, and a second data refresh period set in sequence, the data adjustment stage includes a first data adjustment stage, a second data adjustment stage, and a third data adjustment stage set in sequence. The first data adjustment stage includes T1 first sub-data adjustment stages set in sequence, each first sub-data adjustment stage includes m1 data writing frames and n1 holding frames. The second data adjustment stage includes T2 second sub-data adjustment stages set in sequence, each second sub-data adjustment stage includes m2 data writing frames and n2 holding frames. The third data adjustment stage includes T3 third sub-data adjustment stages set in sequence, each third sub-data adjustment stage includes m3 data writing frames and n3 holding stages set in sequence.

Abstract: Provided is a display panel. The display panel includes a pixel driving circuit including a drive transistor, a data write module, a light emission control module, a threshold compensation module and a bias adjustment module. The control terminal of the drive transistor is connected to the first node. The first terminal of the drive transistor is connected to a third node. The second terminal of the drive transistor is connected to a second node. The light emission control module is connected in series with the drive transistor and connected in series with a light-emitting element. The threshold compensation module is connected in series between the control terminal of the drive transistor and the second terminal of the drive transistor. The first terminal of the bias adjustment module is connected to a bias signal terminal. The second terminal is connected to the second terminal of the drive transistor.

Abstract: The embodiments of the present application provide a pixel circuit and a driving method thereof, a display panel and a display device. The pixel circuit includes: a driving module; a first bias module configured to provide a first bias signal; wherein a light-emitting cycle of the light-emitting element comprises a refresh frame or a hold frame, each of the refresh frame and the hold frame comprises a first stage and a second stage, the first stage comprises one or more bias stages, and the second stage comprises a light-emitting stage, and wherein in the bias stages, the first bias module is turned on, and the first bias signal is transmitted to the driving module; wherein a turn-on duration of the first bias module in the hold frame is greater than a turn-on duration of the first bias module in the refresh frame.

Abstract: A display panel and an electronic device are provided. The display panel includes an array substrate including a substrate, a pixel circuit disposed on the substrate, and a plurality of signal lines distributed in parallel and disposed on a side of the pixel circuit away from the substrate. The plurality of signal lines are connected to wirings below the signal lines through first conductive holes. The display panel also includes a display array including a plurality of sub-pixels and located on a side of the plurality of signal lines away from the substrate. In a direction perpendicular to the substrate, the signal lines include overlap portions overlapping first electrodes of the plurality of sub-pixels; at least two overlap portions correspond to sub-pixels of a same emission color and include first conductive holes; and orthographic projections of the at least two overlap portions on the substrate are same.

Abstract: Provided are a display panel, a driving method, and a display device. The display panel includes: a gate driving circuit, a pixel driving circuit, and a light-emitting component. The pixel driving circuit includes a driving transistor, a data writing module, a threshold compensation module, and a light-emitting control module. A transistor in the threshold compensation module is a P-type transistor and a transistor in the light-emitting control module is an N-type transistor, or the transistor in the threshold compensation module is an N-type transistor and the transistor in the light-emitting control module is P-type transistor. A control terminal of the threshold compensation module and a control terminal of the light-emitting control module are electrically connected to a same gate driving circuit.

Abstract: Provided are a display panel and a display apparatus. The display panel includes a driving array layer having functional layers and insulation layers. The driving array layer includes a first transistor, a second transistor, a first capacitor including a first plate and a second plate, and a second capacitor including a third plate and a fourth plate. An active layer of the first transistor contains silicon, and an active layer of the second transistor contains oxide semiconductor. The first plate and the second plate are located in two of the functional layers, respectively, and the third plate and the fourth plate are located in two of the functional layers, respectively.

Abstract: Provided are a display panel and a display apparatus. The display panel includes a driving array layer having functional layers and insulation layers. The driving array layer includes a first transistor, a second transistor, a first capacitor including a first plate and a second plate, and a second capacitor including a third plate and a fourth plate. An active layer of the first transistor contains silicon, and an active layer of the second transistor contains oxide semiconductor. The first plate and the second plate are located in two of the functional layers, respectively, and the third plate and the fourth plate are located in two of the functional layers, respectively.

Abstract: Provided are a display panel and a driving method. The display panel includes a pixel driving circuit including a drive transistor, a data write module, a light emission control module, a threshold compensation module and a bias adjustment module. The control terminal of the drive transistor is connected to the first node. The first terminal of the drive transistor is connected to a third node. The second terminal of the drive transistor is connected to a second node. The light emission control module is connected in series with the drive transistor and connected in series with a light-emitting element. The threshold compensation module is connected in series between the control terminal of the drive transistor and the second terminal of the drive transistor. The first terminal of the bias adjustment module is connected to a bias signal terminal. The second terminal is connected to the second terminal of the drive transistor.

Abstract: The present application discloses a display panel, an integrated chip and a display apparatus. The display panel includes: a first display area and a second display area; and pixel circuits including first pixel circuits and second pixel circuits, wherein the first pixel circuits are configured to provide driving currents to light emitting elements of the first display area, and the second pixel circuits are configured to provide driving currents to light emitting elements of the second display area, the pixel circuits receive a bias adjustment signal, the bias adjustment signal includes a first bias adjustment signal and a second bias adjustment signal, the first pixel circuits receive the first bias adjustment signal, and the second pixel circuits receive the second bias adjustment signals, a voltage value of the first bias adjustment signal is V1, and a voltage value of the second bias adjustment signal is V2, wherein V1?V2.

Abstract: A display panel, a display driving method and a display pixel driving circuit therefor are provided. In the display driving method, the light emitting signal includes multiple pulse signals, and the variation trend of the pulse-off durations of the pulse signals is consistent with the variation trend of the light emitting brightness of the light emitting element during the light emitting period, that is, the pulse-off durations decreases sequentially with the decrease of the light emitting brightness of the light emitting element, or sequentially increases with the increase of the light emitting brightness of the light emitting element. Therefore, the flicker problem in the display panel when emitting light can be solved, and improving the image display quality.

Abstract: A display panel and a display device are provided. The display panel includes a pixel circuit, a light-emitting element, and a signal line group. The pixel circuit includes a driving transistor, a data writing transistor, and a first transistor. The first electrode of the first transistor in a first metal layer is connected to a gate of the driving transistor. A side of the first electrode of the first transistor facing the first electrode of the data writing transistor is a first edge and a side of a first electrode of the data writing transistor facing the first electrode of the first transistor is a second edge. Orthographically projected on a plane parallel to the display panel, at least a partial region of at least one signal line is located between the first edge and the second edge, and is arranged in a layer different from the first metal layer.

Abstract: A display panel includes a pixel circuit. An operation process of the pixel circuit includes a first data refresh period, a data adjustment stage, and a second data refresh period set in sequence, the data adjustment stage includes a first data adjustment stage. The first data adjustment stage includes T1 first sub-data adjustment stages set in sequence, each first sub-data adjustment stage includes m1 data writing frames and n1 holding frames. The operation process of the pixel circuit further includes a first data refresh frequency F21 and a second data refresh frequency F22, and F21<F22. When the pixel circuit is operated at the first data refresh frequency F21, the first data adjustment stage includes T11 first sub-data adjustment stages set in sequence. When the pixel circuit is operated at the second data refresh frequency F22, the first data adjustment stage includes T21 first sub-data adjustment stages set in sequence. T11>T21.

Abstract: Provided are a display panel, a driving method, and a display device. The display panel includes: a gate driving circuit, a pixel driving circuit, and a light-emitting component. The pixel driving circuit includes a driving transistor, a data writing module, a threshold compensation module, and a light-emitting control module. A control terminal of the threshold compensation module and a control terminal of the light-emitting control module are electrically connected to a same gate driving circuit. The light-emitting control module includes a first light-emitting control unit and a second light-emitting control unit. The pixel driving circuit further comprises a blocking module which is electrically connected between the first power signal terminal and the first terminal of the driving transistor, and is connected in series to the first light-emitting control unit.

Abstract: Provided are a display panel and a display device. The display panel includes a first display region, a second display region and pixel circuits. The pixel circuits include a first pixel circuit and a second pixel circuit. The first pixel circuit is configured to provide a drive current for a light-emitting element in the first display region. The second pixel circuit is configured to provide a drive current for a light-emitting element in the second display region. The pixel circuits further include at least one bias adjustment module, each of which is configured to provide a bias adjustment signal for a respective one drive transistor. A preset electrode of a drive transistor in the first pixel circuit is connected to one bias adjustment module and a preset electrode of a drive transistor in the second pixel circuit is connected to no bias adjustment module.

Abstract: A display panel, a display driving method and a display pixel driving circuit therefor are provided. In the display driving method, the light emitting signal includes multiple pulse signals, and the variation trend of the pulse-off durations of the pulse signals is consistent with the variation trend of the light emitting brightness of the light emitting element during the light emitting period, that is, the pulse-off durations decreases sequentially with the decrease of the light emitting brightness of the light emitting element, or sequentially increases with the increase of the light emitting brightness of the light emitting element. Therefore, the flicker problem in the display panel when emitting light can be solved, and improving the image display quality.

Abstract: Provided are a method for driving a display panel, the method comprises a plurality of picture update periods, wherein at least one of the plurality of picture update periods comprises a first data write stage, a second data write stage, and a data retention stage; at least one of the first data write stage precedes at least one of the second data write stage; at the first data write stage, a gate scanning signal is provided for and a first data voltage is written to a pixel unit; at the second data write stage, the gate scanning signal is provided for and a second data voltage is written to the pixel unit, wherein the first data voltage is less than the second data voltage.

Abstract: A display panel includes a pixel circuit, a driving circuit, and a clock signal line. The driving circuit is configured to provide a control signal to the pixel circuit. The clock signal line is configured to provide a clock signal for the driving circuit. A data refresh period of the pixel circuit includes a data writing stage and a holding stage, and the holding stage includes N stages arranged in sequence, N?1. When the pixel circuit is operated in the data writing stage, a clock pulse frequency of the clock signal is a first frequency F1. When the pixel circuit is operated in the holding stage, in at least one stage of the N stages, the clock pulse frequency of the clock signal is a second frequency F2, F1>F2>0. The pixel circuit includes a driving transistor, a first transistor, and a second transistor.

Abstract: A display panel includes a pixel circuit, a driving circuit, and a clock signal line. The driving circuit is configured to provide a control signal to the pixel circuit. The clock signal line is configured to provide a clock signal for the driving circuit. A data refresh period of the pixel circuit includes a data writing stage and a holding stage. The holding stage includes N stages arranged in sequence, N?1. When the pixel circuit is operated in the data writing stage, a clock pulse frequency of the clock signal is a first frequency F1. When the pixel circuit is operated in the holding stage, in at least one stage of the N stages, the clock pulse frequency of the clock signal is a second frequency F2.

Abstract: A display panel includes a pixel circuit and a light-emitting element. The pixel circuit includes a data write device, a drive device and a bias adjustment device. The display panel includes a bias adjustment signal line, at least one of a reset signal line or an initialization signal line. At least one side frame of the display panel includes a bias adjustment signal bus, at least one of a reset signal bus or an initialization signal bus. The bias adjustment signal bus and the reset signal bus are disposed in a same layer, in a case where the bias adjustment signal bus is father away from a display region of the display panel than the reset signal bus, the bias adjustment signal bus is electrically connected to a corresponding bias adjustment signal line through a bridge disposed in a different layer from the bias adjustment signal bus.