Abstract: Provided are a display panel and a display apparatus. The display panel includes a driving array layer having functional layers and insulation layers. The driving array layer includes a first transistor, a second transistor, a first capacitor including a first plate and a second plate, and a second capacitor including a third plate and a fourth plate. An active layer of the first transistor contains silicon, and an active layer of the second transistor contains oxide semiconductor. The first plate and the second plate are located in two of the functional layers, respectively, and the third plate and the fourth plate are located in two of the functional layers, respectively.

Abstract: A display panel includes a pixel circuit and a light-emitting element. The pixel circuit includes a driving module, a data-writing module, and a compensation module, and a reset module. The driving module includes a driving transistor. The data-writing module is connected to a source of the driving transistor and configured to selectively provide a data signal for the driving transistor. The compensation module is connected between a gate and a drain of the driving transistor. The reset module is connected between the drain of the driving transistor and a reset signal terminal and configured to provide a reset signal for the gate of the driving transistor. The reset module is used as a bias module. An operating process of the pixel circuit includes a reset stage and a bias stage.

Abstract: A display panel includes a pixel circuit and a light-emitting element. The pixel circuit includes a data-writing module, a driving module, and a compensation module. The driving module is configured to provide a driving current for the light-emitting element, wherein the driving module includes a driving transistor, and the driving transistor is an NMOS transistor. The data-writing module is configured to selectively provide a data signal for the driving module. The compensation module is configured to compensate a threshold voltage of the driving transistor. An operational process of the pixel circuit includes a bias stage. In the bias stage, the compensation module is turned off, the driving transistor receives a bias signal, and the bias signal is configured to adjust a bias state of the driving transistor.

Abstract: A display panel includes a pixel circuit and a light-emitting element. The pixel circuit includes a data-writing module, a driving module, and a compensation module. The driving module is configured to provide a driving current for the light-emitting element, wherein the driving module includes a driving transistor, and the driving transistor is an NMOS transistor. The data-writing module is configured to selectively provide a data signal for the driving module. The compensation module is configured to compensate a threshold voltage of the driving transistor. An operational process of the pixel circuit includes a bias stage. In the bias stage, the compensation module is turned off, the driving transistor receives a bias signal, and the bias signal is configured to adjust a bias state of the driving transistor.

Abstract: A display panel and a display device are provided. The display panel includes a pixel circuit, a driving circuit configured to provide a control signal for the pixel circuit, and a clock signal line configured to provide a clock signal for the driving circuit. A data refresh period of the pixel circuit includes a data writing stage and a holding stage, the holding stage includes N stage arranged in sequence and N>1. When the pixel circuit is operated in the data writing stage, the clock pulse frequency of the clock signal is a first frequency F1; when the pixel circuit is operated in the holding stage, in at least one of the N stages, the clock pulse frequency of the clock signal is a second frequency F2; and F1>F2>0.

Abstract: A display panel and a display device are provided. The display panel includes: a pixel circuit including a driving transistor, a first transistor, and a second transistor; a light-emitting element; a first signal line connected to a gate of the first transistor; a second signal line connected to a gate of the second transistor; and a first capacitor. A source or drain of the first transistor is connected to a gate of the driving transistor; and a source or drain of the second transistor is connected to a source or drain of the driving transistor. When being projected on a surface of the display panel, the second signal line is located between the gate of the driving transistor and the first signal line, or the first signal line and the second signal line are located at two sides of the gate of the driving transistor respectively.

Abstract: A display panel and a display device are provided. The display panel includes a pixel circuit, a light-emitting element, and a signal line group. The pixel circuit includes a driving transistor, a data writing transistor, and a first transistor. The first electrode of the first transistor in a first metal layer is connected to a gate of the driving transistor. A side of the first electrode of the first transistor facing the first electrode of the data writing transistor is a first edge and a side of a first electrode of the data writing transistor facing the first electrode of the first transistor is a second edge. Orthographically projected on a plane parallel to the display panel, at least a partial region of at least one signal line is located between the first edge and the second edge, and is arranged in a layer different from the first metal layer.

Abstract: A display panel and a display device are provided. The display panel includes a pixel circuit; and a light-emitting element. The operation process of the pixel circuit includes a first data refresh period, a data adjustment stage, and a second data refresh period set in sequence. The data adjustment stage includes T1 first sub-data adjustment stages set in sequence and T2 second sub-data adjustment stages set in sequence. A quantity of the data writing frames in the first sub-data adjustment stage is greater than a quantity of the data writing frames in the second sub-data adjustment stage. A quantity of the holding frames in the first sub-data adjustment stage is smaller than a quantity of the holding frames in the second sub-data adjustment stage.

Abstract: A display panel and a display device are provided in the present disclosure. The display panel includes drive circuits and pixel circuits, where the drive circuits provide control signals for the pixel circuits, the pixel circuits provide drive currents for light-emitting elements of the display panel, and the drive circuits include a first drive circuit and a second drive circuit; and further includes signal line groups. The signal line groups include a first signal line group and a second signal line group. Along the second direction, a width of the first drive circuit is W1, a width of the second drive circuit is W2, a total width of the M0 signal lines in the first signal line group is D1, a total width of the N0 signal lines in the second signal line group is D2, W2>W1, D2>D1, and D2/W2>D1/W1.

Abstract: Provided are a display panel and a display apparatus. The display panel includes a driving array layer having functional layers and insulation layers. The driving array layer includes a first transistor, a second transistor, a first capacitor including a first plate and a second plate, and a second capacitor including a third plate and a fourth plate. An active layer of the first transistor contains silicon, and an active layer of the second transistor contains oxide semiconductor. The first plate and the second plate are located in two of the functional layers, respectively, and the third plate and the fourth plate are located in two of the functional layers, respectively.

Abstract: A display panel and a display device are provided. The display panel includes a pixel circuit and a light-emitting element. The pixel circuit includes a driving module, a data-writing module, and a light-emitting controller. The driving module is configured to provide a driving current for the light-emitting element, and the driving module includes a driving transistor. The data-writing module is configured to selectively provide a data signal for the driving transistor. The light-emitting controller is configured to selectively allow the light-emitting element to enter a light-emitting stage. One end of the light-emitting controller is connected to a first power signal terminal for receiving a first power signal. The pixel circuit further includes a latch module and a first scanning signal line. The first scanning signal line is configured to receive a first scanning signal. The latch module is connected between a gate of the driving transistor and the first scanning signal line.

Abstract: A display panel, a driving method, and a display device are provided. The display panel includes a pixel circuit and a light-emitting element. The pixel circuit includes a data-writing module, a driving module, a compensation module, and a first light-emission controller. The driving module is configured to provide driving current for the light-emitting element. The driving module includes a driving transistor, and the driving transistor is an NMOS transistor. The data-writing module is connected between a data-signal input terminal and a first terminal of the driving transistor for selectively providing a data signal for the driving module. The compensation module is configured to compensate a threshold voltage of the driving transistor. The first light-emission controller is connected between a first power signal terminal and a second terminal of the driving transistor for selectively providing a first power signal to the driving module.

Abstract: A shift register and a display device are provided. A first control device, a second control device and an output device of the shift register all receive a first power signal and a second power signal as working power signals. The first control device controls a signal of a first node and a signal of a second node in response to a first drive signal. The second control device controls the signal of the first node in response to a second drive signal. The output device outputs a third drive signal in response to the signal of the first node or the signal of the second node, and the third drive signal is generated and outputted by utilizing the first drive signal and the second drive signal, and simplifying a circuit configuration of the shift register for generating the third drive signal.

Abstract: Provided are an inverter circuit structure, a gate driving circuit and a display panel. The inverter circuit structure includes a PMOS transistor and an NMOS transistor, and further includes a first active layer, a gate layer, a second active layer, a first insulating layer between the gate layer and the first active layer, and a second insulating layer between the gate layer and the second active layer. An orthographic projection of the gate on the first active layer is a first region, and a portion of the first active layer in the first region has substantially a same thickness. An orthographic projection of the gate on the second active layer is a second region, and a portion of the second active layer in the second region has substantially a same thickness.

Abstract: Provided is a display panel. The display panel includes a pixel driving circuit which including a drive transistor, a data write module, a light emission control module, a threshold compensation module and a bias adjustment module. The control terminal of the drive transistor is connected to the first node. The first terminal of the drive transistor is connected to a third node. The second terminal of the drive transistor is connected to a second node. The light emission control module is connected in series with the drive transistor and connected in series with a light-emitting element. The threshold compensation module is connected in series between the control terminal of the drive transistor and the second terminal of the drive transistor. The first terminal of the bias adjustment module is connected to a bias signal terminal and the second terminal is connected to the second terminal of the drive transistor.

Abstract: Provided are a method for driving a display panel and a display device. In the method for driving a display panel, at least one picture update period includes a data write stage, a data retention stage, and a data compensation stage; at least one of the data compensation stage precedes at least one of the data write stage; at the data compensation stage, a gate scanning signal is provided for and a compensation data voltage is written to a pixel unit; at the data write stage, the gate scanning signal is provided for and the target data voltage is written to the pixel unit, where the compensation data voltage is less than the target data voltage; and at the data retention stage, no data voltage is written to the pixel unit.

Abstract: Provided are a display panel and a driving method. The display panel includes a pixel driving circuit including a drive transistor, a data write module, a light emission control module, a threshold compensation module and a bias adjustment module. The control terminal of the drive transistor is connected to the first node. The first terminal of the drive transistor is connected to a third node. The second terminal of the drive transistor is connected to a second node. The light emission control module is connected in series with the drive transistor and connected in series with a light-emitting element. The threshold compensation module is connected in series between the control terminal of the drive transistor and the second terminal of the drive transistor. The first terminal of the bias adjustment module is connected to a bias signal terminal. The second terminal is connected to the second terminal of the drive transistor.

Abstract: A display panel, a display driving method and a display pixel driving circuit therefor are provided. In the display driving method, the light emitting signal includes multiple pulse signals, and the variation trend of the pulse-off durations of the pulse signals is consistent with the variation trend of the light emitting brightness of the light emitting element during the light emitting period, that is, the pulse-off durations decreases sequentially with the decrease of the light emitting brightness of the light emitting element, or sequentially increases with the increase of the light emitting brightness of the light emitting element. Therefore, the flicker problem in the display panel when emitting light can be solved, and improving the image display quality.

Abstract: Provided are a pixel driving circuit, a display panel and a driving method. The pixel driving circuit includes a drive transistor, a data write module, a light emission control module, a threshold compensation module and a bias adjustment module. The control terminal of the drive transistor is connected to the first node. The first terminal of the drive transistor is connected to a third node. The second terminal of the drive transistor is connected to a second node. The light emission control module is connected in series with the drive transistor and connected in series with a light-emitting element. The threshold compensation module is connected in series between the control terminal of the drive transistor and the second terminal of the drive transistor. The first terminal of the bias adjustment module is connected to a bias signal terminal. The second terminal of the bias adjustment module is connected to the second terminal of the drive transistor.

Abstract: Provided are a display panel, a driving method thereof, and a display device. The display panel includes a pixel circuit and a light-emitting element; where the pixel circuit includes a drive module, a data writing module, a light emission control module, and a bias module; where the drive module is configured to provide the light-emitting element with a drive current and includes a drive transistor; the data writing module is connected to a source of the drive transistor and configured to selectively provide the drive module with a data signal; the light emission control module is configured to selectively allow the light-emitting element to enter a light-emitting stage; the bias module is connected between a drain of the drive transistor and the light emission control signal line.