Abstract: An improved and new process, used for the elimination of copper line damage, copper defects, non-uniformity improvement, with low dishing and erosion, in damacene processing, is disclosed. This invention relates to a method of fabrication used for semiconductor integrated circuit devices, and more specifically to the elimination of copper line damage for damascene processing, by depositing a multilayer interface material, consisting of a mechanically hard film and a soft film, over a low dielectric constant, interlevel metal dielectric (IMD), and subsequently chemical mechanical polishing (CMP) back the excess material to planarize the surface.

Abstract: A ventilated platen/polishing pad assembly for chemical mechanical polishing copper conductors on a semiconductor wafer is disclosed. The ventilated platen is constructed by a platen having a multiplicity of apertures through a thickness of the platen, and a polishing pad that has a multiplicity of apertures for fluid communication with the multiplicity of apertures in the platen such that a gas can flow through the ventilated platen and the ventilated polishing pad to mix with a polishing slurry solution dispensed on top of the polishing pad. When an oxidizing gas is mixed with the slurry solution, the mass transfer process during the chemical mechanical polishing can be improved and thus improving the polishing uniformity of the copper surface.

Abstract: A method of simultaneously forming differential gate oxide for both high and low voltage transistors using a two-step wet oxidation process is described. A semiconductor substrate is provided wherein active areas of the substrate are isolated from other active areas and wherein there is at least one low voltage area in which a low voltage transistor will be formed and at least one high voltage area in which a high voltage transistor will be formed. The surface of the semiconductor substrate is wet oxidized to form a first layer of gate oxide on the surface of the semiconductor substrate in the active areas. The low voltage active area is covered with a mask. The surface of the semiconductor substrate is wet oxidized again where it is not covered by the mask to form a second layer of gate oxide under the first gate oxide layer in the high voltage active area. The mask is removed.

Abstract: A wafer boat including a partition which separates vertically adjacent wafer slots in the wafer boat and at least partially shields each wafer from the backside emissivity of the adjacently overlying wafer in order to form oxide layers of substantially uniform thickness on the wafers during thermal oxidation processing. Each of the partitions may be constructed of quartz. In another embodiment, each wafer is at least partially shielded from the backside emissivity of the adjacently overlying wafer by separating or partitioning the wafers using a bare or uncoated wafer.

Abstract: A method including operating an ion implanted to implanting ions in a semiconductor wafer at a first ion dose level; performing a first thermal wave measurement to obtain the first thermal wave value; placing the semiconductor wafer in a rapid thermal annealing furnace and operating the furnace to rapidly heat the semiconductor wafer at a first rate for a first time period and so that the wafer is heated with intent of achieving a wafer temperature of 500° C.; performing a second thermal wave measurement to obtain a second thermal wave value; comparing the difference between the first thermal wave value and the second thermal wave value to a target range of 376.5-382.5 and rejecting the wafer as being outside of an acceptable specification if the difference is outside of the target range.

Abstract: A method and apparatus comprising a wafer platform which rotates a semiconductor wafer at a predetermined speed while being moved in a linear motion with respect to a stationary water jet nozzle spraying a water or fluid jet onto the wafer during a wafer scrubbing process. The coupled rotary and linear motions of the wafer facilitates through washing or rinsing of the wafer surface and spreads impact energy of water or fluid sprayed onto a wafer surface over a large surface area on the wafer, resulting in a substantial reduction of particles remaining at the center of the wafer after the wafer scrubbing operation and preventing or minimizing the likelihood of impact damage to the wafer during the wafer scrubbing process. In another embodiment, the water or fluid jet nozzle moves along a horizontal axis while the spinning wafer remains stationary.

Abstract: A method of monitoring and adjusting the position of a wafer with respect to an ion beam including setting the position of a wafer holder so that a wafer to be held therein is positioned at a tilt angle of 45 degrees and a twist angle of 45 degrees with respect to the path of an ion beam; positioning a n-type wafer without screen oxide in the wafer holder; implanting boron species into a region of the wafer at 160 KeV and a dose level of 5.0×1013 atoms/cm2; periodically measuring the sheet resistivity of a implanted wafer and readjusting the wafer tilt angle when the sheet resistivity is greater than 30 ohms/square.

Abstract: An electrostatic charge-free solvent-type dryer for drying semiconductor wafers after a wet bench process is disclosed in a preferred embodiment and in an alternate embodiment. In the preferred embodiment, the electrostatic charge-free solvent-type dryer is constructed by a tank body, a wafer carrier, an elevator means, a tank cover and a conduit for feeding the flow of solvent vapor. At least one of the tank cover, the conduit for feeding the flow of solvent vapor and the plurality of partition plates is fabricated of a non-electrostatic material such that electrostatic charge is not generated in the flow of solvent vapor. In the alternate embodiment, a deionizer is further provided in the tank cavity for producing a flux of positive ions to neutralize any negative ions that are possibly produced in the flow of solvent vapor.

Abstract: The invention teaches a new method of applying slurry during the process of chemical mechanical polishing of copper surfaces. By varying the rate of slurry deposition, starting out with a low rate of slurry flow that is increased as the polishing process proceeds, the invention obtains good planarity for copper surfaces while saving on the amount of slurry that is being used for the copper surface polishing process.

Abstract: A method for preventing oxide layer peeling in a high temperature annealing process including providing a plurality of spaced apart stacked semiconductor wafers for carrying out a high temperature annealing process including ambient nitrogen gas the plurality of spaced apart stacked semiconductor wafers stacked such that a process surface including an oxide layer of at least one semiconductor wafer is adjacent to a backside surface of another semiconductor wafer said backside surface having a layer of silicon nitride formed thereon prior to carrying out the high temperature annealing process; and, carrying out the high temperature annealing process.

Abstract: A method for preventing oxide layer peeling in a high temperature annealing process including providing a plurality of spaced apart stacked semiconductor wafers for carrying out a high temperature annealing process including ambient nitrogen gas the plurality of spaced apart stacked semiconductor wafers stacked such that a process surface including an oxide layer of at least one semiconductor wafer is adjacent to a backside surface of another semiconductor wafer said backside surface having a layer of silicon nitride formed thereon prior to carrying out the high temperature annealing process; and, carrying out the high temperature annealing process.

Abstract: A process for performing CMP in two steps is described. After trenches have been formed and over-filled with copper, in a first embodiment of the invention a hard pad is used initially to remove most of the copper until a point is reached where dishing effects would begin to appear. A soft pad is then substituted and CMP continued until all copper has been removed, except in the trenches. In a second embodiment, CMP is initiated using a pad to which high-pressure is applied and which rotates relatively slowly. As before, this combination is used until the point is reached where dishing effects would begin to appear. Then, relatively low pressure in combination with relatively high rotational speed is used until all copper has been removed, except in the trenches. Both of these embodiments result in trenches which are just-filled with copper, with little or no dishing effects, and with all traces of copper removed everywhere except in the trenches themselves.

Abstract: A method for cleaning a silicon-based substrate in an ammonia-containing solution without incurring any damages to the silicon surface by NH4OH vapor is described. The method can be conducted by first providing a silicon-based substrate that has a silicon surface, then forming a silicon oxide layer of very small thickness, i.e. less than 10 Å, on the silicon surface. The silicon-based substrate can then be cleaned in an ammonia-containing solution without incurring any surface damage to the silicon, i.e. such as the formation of silicon holes. The present invention novel method can be carried out by either adding an additional oxidation tank before the SC-1 cleaning tank, or adding an oxidant to a quick dump rinse tank prior to the SC-1 cleaning process.

Abstract: The invention teaches a new method of applying slurry during the process of chemical mechanical polishing of copper surfaces. By varying the rate of slurry deposition, starting out with a low rate of slurry flow that is increased as the polishing process proceeds, the invention obtains good planarity for copper surfaces while saving on the amount of slurry that is being used for the copper surface polishing process.

Abstract: A method for cleaning a silicon wafer by a wet bench method with improved cleaning efficiency and without oxide formation is disclosed. In the method, the wafer may first be cleaned in a first cleaning solution that includes a base or an acid, and then the wafer is rinsed in a second solution that includes DI water and ozone. The ozone concentration in the DI water may be between about 1 ppm and about 20 ppm, and preferably between about 3 ppm and about 10 ppm. A diluted HF cleaning step may be utilized after the ozone/DI water rinsing step to remove any possible oxide formation on the silicon surface before a final rinsing step and drying step.

Abstract: An apparatus and a method for cleaning wafers by a wet bench technique without incurring ammonia vapor damages to the wafer surface are provided. The apparatus of a wet cleaning tank consists of a tank body for holding a quantity of a cleaning solution therein; a conduit mounted through and vertical to a bottom wall of the tank body for feeding an ammonia-containing solution into the tank body through an outlet; and a cup-shaped container mounted in an upside-down position over the outlet of the conduit for blocking ammonia vapor generated by the ammonia-containing solution from reaching an upper cavity of the tank body.

Abstract: The invention teaches the addition of copper lines, these copper lines to be added to isolated copper lines or to selected copper lines within a collection of copper lines. The invention also teaches the addition of copper end caps to isolated copper lines or to selected copper lines within a collection of copper lines. The invention further teaches the widening of copper lines for isolated copper lines or selected copper lines within a collection of copper lines.

Abstract: An electrostatic charge-free solvent-type dryer for drying semiconductor wafers after a wet bench process is disclosed in a preferred embodiment and in an alternate embodiment. In the preferred embodiment, the electrostatic charge-free solvent-type dryer is constructed by a tank body, a wafer carrier, an elevator means, a tank cover and a conduit for feeding the flow of solvent vapor. At least one of the tank cover, the conduit for feeding the flow of solvent vapor and the plurality of partition plates is fabricated of a non-electrostatic material such that electrostatic charge is not generated in the flow of solvent vapor. In the alternate embodiment, a deionizer is further provided in the tank cavity for producing a flux of positive ions to neutralize any negative ions that are possibly produced in the flow of solvent vapor.

Abstract: A linear chemical mechanical polishing apparatus that is equipped with a programmable pneumatic support platen and a method for controlling the polishing profile on a wafer surface during a linear CMP process are disclosed. The programmable pneumatic support platen is positioned juxtaposed to a bottom surface of a continuous belt for the linear CMP apparatus and positioned corresponding to a position of the wafer carrier so as to force the polishing pad against the wafer surface to be polished. The support platen has a predetermined thickness, a plurality of apertures through the thickness and a plurality of openings in a top surface in fluid communication with a gas source through the plurality of apertures. The method for controlling the polishing profile can be carried out by flowing a gas flow through the plurality of apertures and the plurality of openings to force an intimate contact between the wafer surface to be polished and the polishing pad.

Abstract: A ventilated platen/polishing pad assembly for chemical mechanical polishing copper conductors on a semiconductor wafer is disclosed. The ventilated platen is constructed by a platen having a multiplicity of apertures through a thickness of the platen, and a polishing pad that has a multiplicity of apertures for fluid communication with the multiplicity of apertures in the platen such that a gas can flow through the ventilated platen and the ventilated polishing pad to mix with a polishing slurry solution dispensed on top of the polishing pad. When an oxidizing gas is mixed with the slurry solution, the mass transfer process during the chemical mechanical polishing can be improved and thus improving the polishing uniformity of the copper surface.