Patents by Inventor JiHoon Oh

JiHoon Oh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110095403
    Abstract: A semiconductor device has an interconnect structure with a cavity formed partially through the interconnect structure. A first semiconductor die is mounted in the cavity. A first TSV is formed through the first semiconductor die. An adhesive layer is deposited over the interconnect structure and first semiconductor die. A shielding layer is mounted over the first semiconductor die. The shielding layer is secured to the first semiconductor die with the adhesive layer and grounded through the first TSV and interconnect structure to block electromagnetic interference. A second semiconductor die is mounted to the shielding layer and electrically connected to the interconnect structure. A second TSV is formed through the second semiconductor die. An encapsulant is deposited over the shielding layer, second semiconductor die, and interconnect structure. A slot is formed through the shielding layer for the encapsulant to flow into the cavity and cover the first semiconductor die.
    Type: Application
    Filed: October 23, 2009
    Publication date: April 28, 2011
    Applicant: STATS CHIPPAC, LTD.
    Inventors: SinJae Lee, JinGwan Kim, JiHoon Oh, JaeHyun Lim, KyuWon Lee
  • Publication number: 20110037165
    Abstract: A semiconductor device is made by forming a heat spreader over a temporary carrier. A semiconductor die is mounted to the heat spreader. A first polymer layer is formed over the semiconductor die and heat spreader. A first conductive layer is formed over the first polymer layer. The first conductive layer is connected to the heat spreader and contact pads on the semiconductor die. A second polymer layer is formed over the first conductive layer. A second conductive layer is formed over the second polymer layer. The second conductive layer is electrically connected to the first conductive layer. Bumps are formed through a solder masking layer on the second conductive layer. The temporary carrier is removed. The heat spreader dissipates heat from the semiconductor die and provides shielding from inter-device interference. The heat spreader is grounded through the first and second conductive layers.
    Type: Application
    Filed: August 14, 2009
    Publication date: February 17, 2011
    Applicant: STATS CHIPPAC, LTD.
    Inventors: JiHoon Oh, SinJae Lee, JinGwan Kim
  • Patent number: 7683469
    Abstract: A package-on-package system includes: providing a base substrate; mounting an integrated circuit on the base substrate; positioning a stacking interposer over the integrated circuit; and forming a heat spreader base around the integrated circuit by coupling the base substrate and the stacking interposer to the heat spreader base.
    Type: Grant
    Filed: May 30, 2008
    Date of Patent: March 23, 2010
    Assignee: Stats Chippac Ltd.
    Inventors: JiHoon Oh, KyuWon Lee, Jaehyun Lim, JongVin Park, SinJae Lee
  • Publication number: 20100025835
    Abstract: An integrated circuit package stacking system includes: forming a flexible substrate by: providing an insulating material, forming a stacking pad on the insulating material, forming a coupling pad on the insulating material, and forming a trace between the stacking pad and the coupling pad; providing a package substrate; coupling an integrated circuit to the package substrate; and applying a conductive adhesive on the package substrate for positioning the flexible substrate over the integrated circuit and coupling the flexible substrate on the conductive adhesive.
    Type: Application
    Filed: August 1, 2008
    Publication date: February 4, 2010
    Inventors: JiHoon Oh, JinGwan Kim, Jaehyun Lim, SunYoung Chun, KyuWon Lee, SinJae Lee, JongVin Park
  • Publication number: 20090294941
    Abstract: A package-on-package system includes: providing a base substrate; mounting an integrated circuit on the base substrate; positioning a stacking interposer over the integrated circuit; and forming a heat spreader base around the integrated circuit by coupling the base substrate and the stacking interposer to the heat spreader base.
    Type: Application
    Filed: May 30, 2008
    Publication date: December 3, 2009
    Inventors: JiHoon Oh, KyuWon Lee, Jaehyun Lim, JongVin Park, SinJae Lee