Patents by Inventor Jijun Sun
Jijun Sun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10886331Abstract: A method of manufacturing a magnetoresistive device may include forming a first ferromagnetic region, forming an intermediate region on or above the first ferromagnetic region. The intermediate region may be formed of a dielectric material and include nitrogen. The method may also include forming a second ferromagnetic region on or above the intermediate region.Type: GrantFiled: April 10, 2019Date of Patent: January 5, 2021Assignee: Everspin Technologies, Inc.Inventor: Jijun Sun
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Publication number: 20200343300Abstract: A magnetoresistive device may include a first ferromagnetic region, a second ferromagnetic region, and an intermediate region positioned between the first ferromagnetic region and the second ferromagnetic region. The intermediate region may be formed of a dielectric material and comprise at least two different metal oxides.Type: ApplicationFiled: April 26, 2019Publication date: October 29, 2020Applicant: Everspin Technologies, Inc.Inventors: Sanjeev AGGARWAL, Jijun SUN
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Patent number: 10811597Abstract: A magnetoresistive device with a magnetically fixed region having at least two ferromagnetic regions coupled together by an antiferromagnetic coupling region. At least one of the two ferromagnetic regions includes multiple alternating metal layers and magnetic layers and one or more interfacial layers. Wherein, each metal layer includes at least one of platinum, palladium, nickel, or gold, and the interfacial layers include at least one of an oxide, iron, or an alloy including cobalt and iron.Type: GrantFiled: May 14, 2019Date of Patent: October 20, 2020Assignee: Everspin Technologies, Inc.Inventor: Jijun Sun
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Publication number: 20200328252Abstract: A method of manufacturing a magnetoresistive device may include forming a first ferromagnetic region, forming an intermediate region on or above the first ferromagnetic region. The intermediate region may be formed of a dielectric material and include nitrogen. The method may also include forming a second ferromagnetic region on or above the intermediate region.Type: ApplicationFiled: April 10, 2019Publication date: October 15, 2020Applicant: Everspin Technologies, Inc.Inventor: Jijun SUN
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Publication number: 20200266235Abstract: A magnetoresistive stack/structure and method of manufacturing same comprising wherein the stack/structure includes a seed region, a fixed magnetic region disposed on and in contact with the seed region, a dielectric layer(s) disposed on the fixed magnetic region and a free magnetic region disposed on the dielectric layer(s). In one embodiment, the seed region comprises an alloy including nickel and chromium having (i) a thickness greater than or equal to 40 Angstroms (+/?10%) and less than or equal to 60 Angstroms (+/?10%), and (ii) a material composition or content of chromium within a range of 25-60 atomic percent (+/?10%) or 30-50 atomic percent (+/?10%).Type: ApplicationFiled: May 8, 2020Publication date: August 20, 2020Applicant: Everspin Technologies, Inc.Inventors: Jijun SUN, Sanjeev AGGARWAL, Han-Jong CHIA, Jon M. SLAUGHTER, Renu WHIG
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Publication number: 20200235288Abstract: The present disclosure is drawn to, among other things, a magnetoresistive device and a magnetoresistive memory comprising a plurality of such magnetoresistive devices. In some aspects, a magnetoresistive device may include a magnetically fixed region, a magnetically free region above or below the magnetically fixed region, and an intermediate region positioned between the magnetically fixed region and the magnetically free region, wherein the intermediate region includes a first dielectric material. The magnetoresistive device may also include encapsulation layers formed on opposing side walls of the magnetically free region, wherein the encapsulation layers include the first dielectric material.Type: ApplicationFiled: January 16, 2020Publication date: July 23, 2020Applicant: Everspin Technologies, Inc.Inventors: Sumio IKEGAWA, Han Kyu LEE, Sanjeev AGGARWAL, Jijun SUN, Syed M. ALAM, Thomas ANDRE
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Patent number: 10692926Abstract: A magnetoresistive stack/structure and method of manufacturing same comprising wherein the stack/structure includes a seed region, a fixed magnetic region disposed on and in contact with the seed region, a dielectric layer(s) disposed on the fixed magnetic region and a free magnetic region disposed on the dielectric layer(s). In one embodiment, the seed region comprises an alloy including nickel and chromium having (i) a thickness greater than or equal to 40 Angstroms (+/?10%) and less than or equal to 60 Angstroms (+/?10%), and (ii) a material composition or content of chromium within a range of 25-60 atomic percent (+/?10%) or 30-50 atomic percent (+/?10%).Type: GrantFiled: October 15, 2019Date of Patent: June 23, 2020Assignee: Everspin Technologies, Inc.Inventors: Jijun Sun, Sanjeev Aggarwal, Han-Jong Chia, Jon M. Slaughter, Renu Whig
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Patent number: 10622554Abstract: A magnetoresistive element (e.g., a spin-torque magnetoresistive memory element) includes a fixed magnetic layer, a free magnetic layer, having a high-iron alloy interface region located along a surface of the free magnetic layer, wherein the high-iron alloy interface region has at least 50% iron by atomic composition, and a first dielectric, disposed between the fixed magnetic layer and the free magnetic layer. The magnetoresistive element further includes a second dielectric, having a first surface that is in contact with the surface of the free magnetic layer, and an electrode, disposed between the second dielectric and a conductor. The electrode includes: (i) a non-ferromagnetic portion having a surface that is in contact with a second surface of the second dielectric, and (ii) a second portion having at least one ferromagnetic material disposed between the non-ferromagnetic portion of the electrode and the conductor.Type: GrantFiled: May 22, 2019Date of Patent: April 14, 2020Assignee: Everspin Technologies, Inc.Inventors: Renu Whig, Jijun Sun, Nicholas Rizzo, Jon Slaughter, Dimitri Houssameddine, Frederick Mancoff
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Publication number: 20200043979Abstract: A magnetoresistive stack/structure and method of manufacturing same comprising wherein the stack/structure includes a seed region, a fixed magnetic region disposed on and in contact with the seed region, a dielectric layer(s) disposed on the fixed magnetic region and a free magnetic region disposed on the dielectric layer(s). In one embodiment, the seed region comprises an alloy including nickel and chromium having (i) a thickness greater than or equal to 40 Angstroms (+/?10%) and less than or equal to 60 Angstroms (+/?10%), and (ii) a material composition or content of chromium within a range of 25-60 atomic percent (+/?10%) or 30-50 atomic percent (+/?10%).Type: ApplicationFiled: October 15, 2019Publication date: February 6, 2020Applicant: Everspin Technologies, Inc.Inventors: Jijun SUN, Sanjeev AGGARWAL, Han-Jong CHIA, Jon M. SLAUGHTER, Renu WHIG
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Publication number: 20200035909Abstract: Spin-Hall (SH) material is provided near free regions of magnetoresistive devices that include magnetic tunnel junctions. Current flowing through such SH material injects spin current into the free regions such that spin torque is applied to the free regions. The spin torque generated from SH material can be used to switch the free region or to act as an assist to spin-transfer torque generated by current flowing vertically through the magnetic tunnel junction, in order to improve the reliability, endurance, or both of the magnetoresistive device. Further, one or more additional regions or manufacturing steps may improve the switching efficiency and the thermal stability of magnetoresistive devices.Type: ApplicationFiled: July 23, 2019Publication date: January 30, 2020Applicant: Everspin Technologies, Inc.Inventors: Jijun SUN, SHIMON, Han-Jong CHIA
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Patent number: 10516103Abstract: A magnetoresistive element (e.g., a spin-torque magnetoresistive memory element) includes a fixed magnetic layer, a free magnetic layer, having a high-iron alloy interface region located along a surface of the free magnetic layer, wherein the high-iron alloy interface region has at least 50% iron by atomic composition, and a first dielectric, disposed between the fixed magnetic layer and the free magnetic layer. The magnetoresistive element further includes a second dielectric, having a first surface that is in contact with the surface of the free magnetic layer, and an electrode, disposed between the second dielectric and a conductor. The electrode includes: (i) a non-ferromagnetic portion having a surface that is in contact with a second surface of the second dielectric, and (ii) a second portion having at least one ferromagnetic material disposed between the non-ferromagnetic portion of the electrode and the conductor.Type: GrantFiled: August 27, 2019Date of Patent: December 24, 2019Assignee: Everspin Technologies, Inc.Inventors: Renu Whig, Jijun Sun, Nicholas Rizzo, Jon Slaughter, Dimitri Houssameddine, Frederick Mancoff
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Publication number: 20190386212Abstract: A magnetoresistive element (e.g., a spin-torque magnetoresistive memory element) includes a fixed magnetic layer, a free magnetic layer, having a high-iron alloy interface region located along a surface of the free magnetic layer, wherein the high-iron alloy interface region has at least 50% iron by atomic composition, and a first dielectric, disposed between the fixed magnetic layer and the free magnetic layer. The magnetoresistive element further includes a second dielectric, having a first surface that is in contact with the surface of the free magnetic layer, and an electrode, disposed between the second dielectric and a conductor. The electrode includes: (i) a non-ferromagnetic portion having a surface that is in contact with a second surface of the second dielectric, and (ii) a second portion having at least one ferromagnetic material disposed between the non-ferromagnetic portion of the electrode and the conductor.Type: ApplicationFiled: August 27, 2019Publication date: December 19, 2019Applicant: Everspin Technologies, Inc.Inventors: Renu WHIG, Jijun SUN, Nicholas RIZZO, Jon SLAUGHTER, Dimitri HOUSSAMEDDINE, Frederick MANCOFF
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Publication number: 20190355897Abstract: A magnetoresistive device with a magnetically fixed region having at least two ferromagnetic regions coupled together by an antiferromagnetic coupling region. At least one of the two ferromagnetic regions includes multiple alternating metal layers and magnetic layers and one or more interfacial layers. Wherein, each metal layer includes at least one of platinum, palladium, nickel, or gold, and the interfacial layers include at least one of an oxide, iron, or an alloy including cobalt and iron.Type: ApplicationFiled: May 14, 2019Publication date: November 21, 2019Applicant: Everspin Technologies, Inc.Inventor: Jijun SUN
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Patent number: 10483460Abstract: A method of manufacturing a magnetoresistive stack/structure comprising etching through a second magnetic region to (i) provide sidewalls of the second magnetic region and (ii) expose a surface of a dielectric layer; depositing a first encapsulation layer on the sidewalls of the second magnetic region and over the dielectric layer; etching the first encapsulation layer which is disposed over the exposed surface of the dielectric layer. The method further includes (a) depositing a second encapsulation layer: (i) on the first encapsulation layer disposed on the sidewalls of the second magnetic region and (ii) over the exposed surface of the dielectric layer and (b) depositing a third encapsulation layer: (i) on the second encapsulation layer which is on the first encapsulation layer and the exposed surface of the dielectric layer. The method also includes etching the remaining layers of the stack/structure (via one or more etch processes).Type: GrantFiled: October 28, 2016Date of Patent: November 19, 2019Assignee: Everspin Technologies, Inc.Inventors: Kerry Joseph Nagel, Wenchin Lin, Sarin A. Deshpande, Jijun Sun, Sanjeev Aggarwal, Chaitanya Mudivarthi
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Patent number: 10483320Abstract: A magnetoresistive stack/structure and method of manufacturing same comprising wherein the stack/structure includes a seed region, a fixed magnetic region disposed on and in contact with the seed region, a dielectric layer(s) disposed on the fixed magnetic region and a free magnetic region disposed on the dielectric layer(s). In one embodiment, the seed region comprises an alloy including nickel and chromium having (i) a thickness greater than or equal to 40 Angstroms (+/?10%) and less than or equal to 60 Angstroms (+/?10%), and (ii) a material composition or content of chromium within a range of 25-60 atomic percent (+/?10%) or 30-50 atomic percent (+/?10%).Type: GrantFiled: November 19, 2018Date of Patent: November 19, 2019Assignee: Everspin Technologies, Inc.Inventors: Jijun Sun, Sanjeev Aggarwal, Han-Jong Chia, Jon M. Slaughter, Renu Whig
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Patent number: 10475986Abstract: A magnetoresistive device includes first and second ferromagnetic regions and an intermediate region formed of a dielectric material between the first and second ferromagnetic regions. A surface of the intermediate region at an interface between the intermediate region and at least one of the first and second ferromagnetic regions may be a plasma treated surface.Type: GrantFiled: April 19, 2018Date of Patent: November 12, 2019Assignee: EVERSPIN TECHNOLOGIES, INC.Inventor: Jijun Sun
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Publication number: 20190326506Abstract: A magnetoresistive device includes first and second ferromagnetic regions and an intermediate region formed of a dielectric material between the first and second ferromagnetic regions. A surface of the intermediate region at an interface between the intermediate region and at least one of the first and second ferromagnetic regions may be a plasma treated surface.Type: ApplicationFiled: April 19, 2018Publication date: October 24, 2019Applicant: Everspin Technologies, Inc.Inventor: Jijun SUN
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Publication number: 20190312198Abstract: Spin-orbit-torque (SOT) lines are provided near free regions in magnetoresistive devices that include magnetic tunnel junctions. Current flowing through such SOT lines injects spin current into the free regions such that spin torque is applied to the free regions. The spin torque generated from a SOT switching line can be used to switching the free region or to act as an assist to spin-transfer torque generated by current flowing vertically through the magnetic tunnel junction, in order to improve the reliability, endurance, or both of the magnetoresistive device. Further, one or more additional layers or regions may improve the SOT switching efficiency and the thermal stability of magnetoresistive devices including SOT lines.Type: ApplicationFiled: April 5, 2019Publication date: October 10, 2019Applicant: Everspin Technologies, Inc.Inventor: Jijun SUN
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Publication number: 20190305213Abstract: A magnetoresistive device may include a tunnel barrier region, a magnetically fixed region positioned on one side of the tunnel barrier region, and a magnetically free region positioned on an opposite side of the tunnel barrier region. The magnetically free region may include a plurality of ferromagnetic regions and at least one nonmagnetic insertion region.Type: ApplicationFiled: March 30, 2018Publication date: October 3, 2019Applicant: Everspin Technologies, Inc.Inventor: Jijun Sun
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Publication number: 20190280198Abstract: A magnetoresistive element (e.g., a spin-torque magnetoresistive memory element) includes a fixed magnetic layer, a free magnetic layer, having a high-iron alloy interface region located along a surface of the free magnetic layer, wherein the high-iron alloy interface region has at least 50% iron by atomic composition, and a first dielectric, disposed between the fixed magnetic layer and the free magnetic layer. The magnetoresistive element further includes a second dielectric, having a first surface that is in contact with the surface of the free magnetic layer, and an electrode, disposed between the second dielectric and a conductor. The electrode includes: (i) a non-ferromagnetic portion having a surface that is in contact with a second surface of the second dielectric, and (ii) a second portion having at least one ferromagnetic material disposed between the non-ferromagnetic portion of the electrode and the conductor.Type: ApplicationFiled: May 22, 2019Publication date: September 12, 2019Applicant: EVERSPIN TECHNOLOGIES, INC.Inventors: Renu WHIG, Jijun SUN, Nicholas RIZZO, Jon SLAUGHTER, Dimitri HOUSSAMEDDINE, Frederick MANCOFF