Abstract: Fault injection in dynamic random access memory (‘DRAM’) modules for performing built-in self-tests (‘BISTs’) including establishing, in the mode registers of the DRAM modules by the memory controller through the shared address bus, an injection of a fault into one or more signal lines of a DRAM module, the fault characterized by a fault type; writing data by the memory controller through a data bus to the DRAM modules, the data identifying a particular DRAM module; and responsive to receiving the data, injecting, by the particular DRAM module, the fault characterized by the fault type into the one or more signal lines of the particular DRAM module.

Abstract: The present invention is a system and method for sensing the voltage at multiple sense points. The present invention acquires optimal feedback from a plurality of sources including those integrated on the same motherboard, for populated or unpopulated connectors and for adapter cards plugged into the connectors, for the purpose of controlling the voltage regulator output. The voltage regulator, connected to a logic system, provides voltage to those connectors needing the voltage.

Abstract: Methods, systems, and products are disclosed for dynamically allocating communication lanes for a plurality of sockets in a point-to-point, serial I/O expansion subsystem of a computing system, the expansion subsystem including an switch that supports a maximum number of enabled communication lanes, each socket having a same form factor, each socket connected to the switch using a same predefined number of communication lanes, that include: identifying, during a boot process for the computing system, each of the sockets in which an adapter is installed; determining, for each installed adapter, a maximum link width for that adapter; and enabling, for each of the sockets in which an adapter is installed, a set of communication lanes for communications between the adapter installed in that socket and the expansion subsystem switch in dependence upon the maximum link width for each adapter and the maximum number of enabled communication lanes supported by the switch.

Abstract: A power-managed server data processing system comprises a bus configured to communicatively couple a power-managed server with a data processing system resource and a bus controller coupled to the bus. The bus controller comprises bus control logic configured to process a plurality of access requests associated with the bus, and power management logic configured to inhibit processing of a current access request of the plurality of access requests by the bus control logic for a power management delay time period. The power management delay time period is determined utilizing a processing latency time period associated with a prior access request of the plurality of access requests.

Abstract: Fault injection in dynamic random access memory (‘DRAM’) modules for performing built-in self-tests (‘BISTs’) including establishing, in the mode registers of the DRAM modules by the memory controller through the shared address bus, an injection of a fault into one or more signal lines of a DRAM module, the fault characterized by a fault type; writing data by the memory controller through a data bus to the DRAM modules, the data identifying a particular DRAM module; and responsive to receiving the data, injecting, by the particular DRAM module, the fault characterized by the fault type into the one or more signal lines of the particular DRAM module.

Abstract: Methods, systems, and products are disclosed for dynamically allocating communication lanes for a plurality of sockets in a point-to-point, serial I/O expansion subsystem of a computing system, the expansion subsystem including an switch that supports a maximum number of enabled communication lanes, each socket having a same form factor, each socket connected to the switch using a same predefined number of communication lanes, that include: identifying, during a boot process for the computing system, each of the sockets in which an adapter is installed; determining, for each installed adapter, a maximum link width for that adapter; and enabling, for each of the sockets in which an adapter is installed, a set of communication lanes for communications between the adapter installed in that socket and the expansion subsystem switch in dependence upon the maximum link width for each adapter and the maximum number of enabled communication lanes supported by the switch.

Abstract: The present invention is a system and method for sensing the voltage at multiple sense points. The present invention acquires optimal feedback from a plurality of sources including those integrated on the same motherboard, for populated or unpopulated connectors and for adapter cards plugged into the connectors, for the purpose of controlling the voltage regulator output. The voltage regulator, connected to a logic system, provides voltage to those connectors needing the voltage.

Abstract: A hierarchical power management system comprises first and second power management controllers, a power management command combination element, a power management command terminator, a power-managed data processing system element, and a power management bus coupled between the power management controllers, power management command combination element, and power management command terminator.

Abstract: A power management server and method for managing power consumption is disclosed. According to one embodiment, a power management server data processing system is provided, where the power management server data processing system comprises a power management communication port to communicatively couple the power management server data processing system to a power-managed server data processing system and a system management processor coupled to the power management communication port. In the described embodiment, the system management processor comprises power management logic configured to receive power management data from the power-managed server data processing system, to generate a power management command utilizing the power management data, and to transmit the power management command to the power-managed server data processing system utilizing the power management communication port. Moreover, the power management data of the described embodiment comprises power management capability data.

Abstract: A distributed method and system for managing power usage among server data processing systems are disclosed. According to one embodiment, a server data processing system of a plurality of server data processing systems is provided, where the server data processing system comprises a power management communication port to communicatively couple the server data processing system to all other server data processing systems of the plurality of server data processing systems and a system management processor coupled to the power management communication port. In the described embodiment, the system management processor comprises communication logic configured to monitor power usage of all the other server data processing systems of the plurality, and power management logic configured to perform a power management operation on the server data processing system based upon the monitored power usage.

Abstract: A power management server and method for managing power consumption is disclosed. According to one embodiment, a power management server data processing system is provided, where the power management server data processing system comprises a power management communication port to communicatively couple the power management server data processing system to a power-managed server data processing system and a system management processor coupled to the power management communication port. In the described embodiment, the system management processor comprises power management logic configured to receive power management data from the power-managed server data processing system, to generate a power management command utilizing the power management data, and to transmit the power management command to the power-managed server data processing system utilizing the power management communication port. Moreover, the power management data of the described embodiment comprises power management capability data.

Abstract: A power-managed server and method for managing power consumption is disclosed. According to one embodiment, a power-managed server data processing system is provided among a plurality of server data processing systems which comprises a power management communication port to communicatively couple the power-managed server data processing system to a power management server data processing system of the plurality of server data processing systems. The power-managed server data processing system of the described embodiment further comprises a system management processor coupled to the power management communication port which comprises power-managed logic configured to transmit power management data to the power management server data processing system and to receive a power management command utilizing the power management communication port. Moreover, the power management command is generated utilizing the power management data, and the power management data comprises power management capability data.

Abstract: A cooling system includes a cooling fan with an outlet and an inlet and a shroud surrounding at least a portion of the cooling fan. The cooling fan includes a plurality of fan blades, and each fan blade includes an inlet portion and an outlet portion that define an outer periphery of the fan blade. The outlet portion has a profile defined by a radial distance, perpendicular from a central axis of the fan, increasing in a direction towards the outlet. The average angle, relative to a central axis of the fan, of either a profile of the outlet portion or a profile of a portion of the shroud surrounding the outlet portion is between about ±15° of an average angle to the central axis at which a flow of fluid exits the outer periphery of the fan blades or between about 20° and about 70°.

Abstract: A heat sink for distributing a thermal load is disclosed that includes two or more base plates connected and oriented around a central axis of the heat sink, at least one base plate receiving the thermal load, each base plate having thermal transport paths, the thermal transport paths oriented among the base plates so as to have the capability of accepting thermal transports having a plurality of lengths for thermal distribution between at least two base plates, heat-dissipating fins connected to each base plate, the heat-dissipating fins spaced apart in parallel and extending from each base plate towards the central axis of the heat sink, and a thermal transport connected between the base plate receiving the thermal load and at least one other base plate so as to distribute the thermal load among the base plates of the heat sink.

Abstract: A heat sink device for conventional memory modules, such as DIMMs, that is configured to be positioned between adjacent memory modules mounted in substantially parallel connectors on a printed circuit board. Each heat sink device includes thermally conductive first and second members configured to thermally couple with electronic components of a conventional memory module. The first and second members may be resiliently biased away from one another so that the resilient bias causes the members to abut respective electronic components when placed between adjacent memory modules. A separate wedge, or a lever-mounted wedge, may be provided for insertion between the members to urge them away from one another and into abutting relationship with electronic components on facing surfaces of the adjacent memory modules. When abutting opposing electronic components, a single heat sink device facilitates heat dissipation from both of the adjacent memory modules.

Abstract: A system, method and device for managing power distribution on a shared bus system that interconnects multiple devices each containing a signal termination component are disclosed herein. In one embodiment, the method of the invention includes detecting and communicating thermal indicia of one or more of the devices in the shared bus system to a memory controller device. The memory controller includes an on-die termination control circuit for setting and resetting the enablement of the signal termination components of the one or more devices. In a preferred embodiment, the on-die termination control circuit sets and resets the enablement of the signal termination components in accordance with the determined thermal indicia.