Abstract: A connector housing assembly configured to ensure proper coupling of components to align terminal cavities and terminal slots, lowering the chances that terminal cavities and terminal cavities obstruct, or possibly bend, terminal blades from a male connector is provided. The connector housing assembly includes a connector housing, a terminal position assurance (TPA), and a male blade stabilizer (MBS). The connector housing, includes a plurality of terminal cavities. The TPA and MBS include a plurality of terminal slots. The TPA includes walls that are slidingly received by an aperture in the MBS. The walls and aperture are configured to ensure that the MBA is coupled with the proper TPA and in a proper orientation. When the components of the connector housing assembly are properly coupled, the terminal cavities of the connector housing and the terminal slots of the TPA and the MBS align allowing a terminal to be seated there within.

Abstract: A printed circuit board having embedded capacitors includes a double-sided copper-clad laminate including first circuit layers formed in the outer layers thereof, the first circuit layers including bottom electrodes and circuit patterns; dielectric layers formed by depositing alumina films on the first circuit layers by atomic layer deposition; second circuit layers formed on the dielectric layers and including top electrodes and circuit patterns; one-sided copper-clad laminates formed on the second circuit layers; blind via-holes and through-holes formed in predetermined portions of the one-sided copper-clad laminates; and plating layers formed in the blind via-holes and the through-holes. The manufacturing method of the printed circuit board is also disclosed.

Abstract: A printed circuit board having embedded chips, composed of a central layer having an embedded chip, an insulating layer formed on one surface or both surfaces of the central layer and having a via hole filled with conductive ink, and a circuit layer formed on the insulating layer and having a via hole and a circuit pattern electrically connected to the chip of the central layer through the via hole of the insulating layer. In addition, a method of fabricating a printed circuit board including embedded chips is provided.

Abstract: A semiconductor device has a silicon substrate, in which an active region is formed between two device isolation films and a gate is formed on the surface of the active region. The silicon substrate has a laterally etched portion in the active region below the surface of the active region on the side near the device isolation film. An insulating film is formed on the laterally etched portion of the silicon substrate. A conductive electrode is formed on the insulating film, through which an external voltage is applied to adjust a threshold voltage. The device isolation film is formed on the conductive electrode. None or some pockets of vacant cavity is present between the device isolation film and the conductive electrode.

Abstract: A nonvolatile semiconductor memory device is provided for a high-powered system without the need for an additional system setting process to set the system initialization state after power-on to the previous state. The nonvolatile semiconductor memory device comprises a pull-up driving unit configured to include a plurality of nonvolatile cells for storing inputted data and to pull up a storage node, a pull-down driving unit configured to pull down the storage node, and a plurality of data registers including a data input/output unit configured to selectively input/output data between a bit line and the storage node depending on a voltage applied to a word line.

Abstract: Disclosed is a stock account/order/market price inquiry service method using a mobile terminal that is able to perform a stock account/order/market price inquiry service through a mobile terminal using a stock chip. A stock account/order/market price inquiry service method comprising the steps of: (1) displaying a lower menu page on a mobile terminal of the stock account/order service after a PIN authentication; (2) generating an account/order service request message on the basis of stock chip information read from a stock chip and service request information corresponding to the lower menu and then transmitting the same to a relay server; and (3) receiving a service response message corresponding to service request message from the relay server and displaying the same on the screen of a mobile terminal.

Abstract: A nonvolatile ferroelectric memory device is provided so as to control read/write operations of a nonvolatile memory cell using a channel resistance of the memory cell which is differentiated by polarity states of a ferroelectric material. In the memory device, an insulating layer is formed on a bottom word line, and a floating channel layer comprising a N-type drain region, a P-type channel region and a N-type source region is formed on the insulating layer. Then, a ferroelectric layer is formed on the floating channel layer, and a word line is formed on the ferroelectric layer. As a result, the resistance state induced to the channel region is controlled depending on the polarity of the ferroelectric layer, thereby regulating the read/write operations of the memory cell array.

Abstract: A nonvolatile ferroelectric memory device is provided so as to control read/write operations of a nonvolatile memory cell using a channel resistance of the memory cell which is differentiated by polarity states of a ferroelectric material. In the memory device, an insulating layer is formed on a bottom word line, and a floating channel layer comprising a N-type drain region, a P-type channel region and a N-type source region is formed on the insulating layer. Then, a ferroelectric layer is formed on the floating channel layer, and a word line is formed on the ferroelectric layer. As a result, the resistance state induced to the channel region is controlled depending on the polarity of the ferroelectric layer, thereby regulating the read/write operations of the memory cell array.

Abstract: A radio frequency identification (RFID) device includes an antenna configured to transmit or receive a radio frequency signal to or from an external communication apparatus; an analog block configured to generate a first power voltage in response to the radio frequency signal; a digital block configured to receive the first power voltage from the analog block, to transmit a response signal to the analog block, and to output a memory control signal; and a memory configured to read/write data in response to the memory control signal, the memory including a high voltage generating unit for generating a second power voltage from the first power voltage, a first portion driven by the second power voltage, and a second portion driven by the first power voltage, wherein the level of the first power voltage is lower than that of the second power voltage.

Abstract: A nonvolatile ferroelectric memory device has a plurality of ferroelectric memory cells. The ferroelectric memory cells include a first double gate cell for storing a bit of datum, the first double gate cell including a ferroelectric layer and a floating channel layer, wherein a polarity state of the ferroelectric layer affects a resistance of the floating channel layer, the resistance of the floating channel layer corresponding to the bit of datum stored in the first double gate cell; and a second double gate cell selectively turned on by a potential on a selection line to supply a potential of a sense line to the first double gate cell to control read and write operations of the first double gate cell. The present invention also provides methods for operating the nonvolatile ferroelectric memory device.

Abstract: A nonvolatile ferroelectric memory device includes a bottom word line, an insulating layer formed on the bottom word line, a bit line including a floating channel region formed on the insulating layer, a tunnel oxide film formed on the floating channel region, a ferroelectric layer formed on the tunnel oxide film, wherein a change in a polarity of the ferroelectric layer induces a change in a resistance of the floating channel region, and a top word line formed on the ferroelectric layer in parallel with the bottom word line.

Abstract: A nonvolatile ferroelectric memory device includes a plurality of memory cells connected serially between a bit line and a sensing line, a first switching unit configured to selectively connect the memory cells to the bit line in response to a first selecting signal, and a second switching unit configured to selectively connect the memory cells to the sensing line in response to a second selecting signal. The first switching unit and the second switching unit have the same structure as that of the memory cell.

Abstract: A reformer that directly receives heat and performs an ATR catalyst reaction and an SR catalyst reaction. The reformer includes: a reforming reactor to reform hydrogen containing fuel into reformed gas having abundant hydrogen by performing an ATR catalyst reaction and an SR catalyst reaction; a heat source contacting one side of the reforming reactor and providing the reforming reactor with heat; and an air feeder to feed the reforming reactor with air by an air flow control unit. Thus, the ATR catalyst reaction featuring a relatively short preheating time is performed while the reformer is initially operated, so that hydrogen can be produced when the reformer is initially operated, thereby efficiently operating a fuel cell.

Abstract: The present invention discloses an improved DRAM of semiconductor device and method for manufacturing the same wherein an ONO (oxide-nitride-oxide) structure for trapping electrons or holes used in a non-volatile memory is employed in a gate insulating film of the DRAM to reduce impurity concentrations of a channel region and a well region.

Abstract: The present invention relates to a method for manufacturing a reflective multi-layered thin film mirror for an extreme ultraviolet radiation (EUV) exposure process that is one of the next generation exposure process masks using an atomic force microscope (AFM). This reflective multi-layered thin film mirror for extreme ultraviolet radiation (EUV) exposure process allows metal oxide structures with fixed height and width to be obtained using anodic oxidization phenomenon between the cantilever tip of a atomic force microscope and an absorber material during the patterning of an absorber layer on a multi-layered thin film of a substrate, followed by forming the ultra-fine line width absorber patterns via etching of the metal oxide structure.

Abstract: A RFID device has a nonvolatile ferroelectric memory including a memory cell array area supplied only with a high voltage and a peripheral area supplied with a low voltage, thereby reducing power consumption. The RFID device includes an antenna adapted and configured to transceive a radio frequency signal from an external communication apparatus, an analog block adapted and configured to generate a power voltage in response to the radio frequency signal received from the antenna, a digital block adapted and configured to receive the power voltage from the analog block, transmit a response signal to the analog block and output a memory control signal, and a memory adapted and configured to generate a high voltage with the power voltage and access data in response to the memory control signal.

Abstract: A nonvolatile latch circuit and a system on a chip with the same feature detection of change of latch data in an active period to store new data in a latch without an additional data storage time. The nonvolatile latch circuit does not require an additional data storage period but detects change of latch data in the active period to store new data in a nonvolatile latch unit. When power is accidentally off, new data are constantly stored in the nonvolatile latch unit, thereby preventing data loss and improving an operating speed without a booting time for restoring data.

Abstract: The present invention relates to a method of manufacturing a built-in type upper/lower electrode multi-layer part including alternately laminating a first ceramic sheet having a first internal electrode pattern formed thereon and a second ceramic sheet having a second internal electrode pattern formed thereon so as to form a first multi-layer sheet product; forming first and second via holes on the first multi-layer sheet product, the first and second via holes respectively connecting the first and second internal electrode patterns; respectively joining third and fourth ceramic sheets having no internal electrode pattern on the upper and lower portions of the first multi-layer sheet product so as to form a second multi-layer sheet product, the third and fourth ceramic sheets having third and fourth via holes formed to correspond to the first and second via holes; and filling a conductive paste in the first to fourth via holes.

Abstract: The present invention discloses improved semiconductor device and method for manufacturing wherein one side of a source and drain region and a portion of a channel region are disposed on a buried oxide layer formed on a semiconductor substrate and the side of the source and drain region and another portion of the channel region are disposed on a Si epitaxial layer formed on a semiconductor substrate.

Abstract: A nonvolatile semiconductor memory device obtained by combining a nonvolatile memory device with a SRAM is provided to improve operating speed and reliability. The nonvolatile semiconductor memory device includes a plurality of data registers. Preferably, each of the plurality of data registers includes a pull-up driving unit adapted and configured to pull up a storage node, a pull-down driving unit adapted and configured to pull down the storage node, a data input/output unit adapted and configured to selectively input and output data between a bit line and the storage node depending on a voltage applied to a word line, and a data storing unit adapted and configured to store data of the storage node depending on a voltage applied to a top word line and a bottom word line or to output the stored data to the storage node.